SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.98 | 84.98 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.17 | 85.17 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.17 | 85.17 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.17 | 85.17 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9358 | 84.98 |
Total Bits 0->1 | 5506 | 4686 | 85.11 |
Total Bits 1->0 | 5506 | 4672 | 84.85 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9358 | 84.98 |
Port Bits 0->1 | 5506 | 4686 | 85.11 |
Port Bits 1->0 | 5506 | 4672 | 84.85 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T143,T175,T138 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T92,*T93,*T94 | Yes | T92,T93,T94 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T86,*T39,*T95 | Yes | T86,T39,T95 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T39,T95,T96 | Yes | T39,T95,T96 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T39,*T176,*T177 | Yes | T39,T176,T177 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T92,T93,T155 | Yes | T92,T93,T94 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T40,*T38,*T178 | Yes | T40,T178,T179 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T92,*T93,*T94 | Yes | T92,T93,T94 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T39,*T92,*T93 | Yes | T39,T92,T93 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T86,*T39,*T95 | Yes | T86,T39,T95 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T39,T95,T96 | Yes | T39,T95,T96 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T45,T41,T79 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T41,T79 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T155 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T39,T92,T155 | Yes | T39,T92,T93 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T41,T79 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T120,T180,T181 | Yes | T120,T180,T181 | OUTPUT |
intr_otp_error_o | Yes | Yes | T120,T180,T181 | Yes | T120,T180,T181 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T182,T73,T97 | Yes | T182,T73,T97 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T45,T36,T41 | Yes | T45,T36,T41 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T73,T97,T183 | Yes | T73,T97,T183 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T182,T73,T97 | Yes | T182,T73,T97 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T45,T36,T41 | Yes | T45,T36,T41 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T73,T97,T183 | Yes | T73,T97,T183 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T27,T37,T148 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[4:0] | Yes | Yes | T184 | Yes | T185,T184,T186 | INPUT |
lc_otp_vendor_test_i.ctrl[7:5] | No | No | Yes | T186,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[8] | Yes | Yes | *T184 | Yes | T186,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[9] | No | No | Yes | T38,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | Yes | Yes | *T184 | Yes | T38,T186,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T38,T186,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | Yes | Yes | *T184 | Yes | T38,T185,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[14:13] | No | No | Yes | T38,T186,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[16:15] | Yes | Yes | T184 | Yes | T38,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[18:17] | No | No | Yes | T38,T186,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[21:19] | Yes | Yes | T184 | Yes | T184,T38,T186 | INPUT |
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[25:23] | Yes | Yes | T184 | Yes | T185,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T186 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | Yes | Yes | *T184 | Yes | T38,T186,T184 | INPUT |
lc_otp_vendor_test_i.ctrl[28] | No | No | Yes | T38 | INPUT | |
lc_otp_vendor_test_i.ctrl[31:29] | Yes | Yes | T184 | Yes | T185,T184,T38 | INPUT |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[16:0] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[19:18] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[20] | No | No | No | INPUT | ||
lc_otp_program_i.count[32:21] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[33] | No | No | No | INPUT | ||
lc_otp_program_i.count[39:34] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[40] | No | No | No | INPUT | ||
lc_otp_program_i.count[45:41] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[46] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:47] | Yes | Yes | *T6,*T80,*T187 | Yes | T182,T188,T150 | INPUT |
lc_otp_program_i.count[56] | No | No | No | INPUT | ||
lc_otp_program_i.count[66:57] | Yes | Yes | *T6,*T80,*T187 | Yes | T188,T150,T189 | INPUT |
lc_otp_program_i.count[69:67] | No | No | No | INPUT | ||
lc_otp_program_i.count[72:70] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[73] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:74] | Yes | Yes | T80,T187,T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[78:77] | Yes | Yes | T80,T187,T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[79] | No | No | No | INPUT | ||
lc_otp_program_i.count[80] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[81] | No | No | No | INPUT | ||
lc_otp_program_i.count[87:82] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[89:88] | No | No | No | INPUT | ||
lc_otp_program_i.count[95:90] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[96] | No | No | No | INPUT | ||
lc_otp_program_i.count[101:97] | Yes | Yes | T80,T187,T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[102] | No | No | No | INPUT | ||
lc_otp_program_i.count[105:103] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[107:106] | No | No | No | INPUT | ||
lc_otp_program_i.count[111:108] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T182 | INPUT |
lc_otp_program_i.count[112] | No | No | No | INPUT | ||
lc_otp_program_i.count[113] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[114] | No | No | No | INPUT | ||
lc_otp_program_i.count[116:115] | Yes | Yes | T9,T6,T27 | Yes | T9,T27,T182 | INPUT |
lc_otp_program_i.count[118:117] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:119] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[127] | No | No | No | INPUT | ||
lc_otp_program_i.count[134:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[135] | No | No | No | INPUT | ||
lc_otp_program_i.count[136] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[137] | No | No | No | INPUT | ||
lc_otp_program_i.count[143:138] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[144] | No | No | No | INPUT | ||
lc_otp_program_i.count[145] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[146] | No | No | No | INPUT | ||
lc_otp_program_i.count[153:147] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[154] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:155] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[163] | No | No | No | INPUT | ||
lc_otp_program_i.count[174:164] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[176:175] | No | No | No | INPUT | ||
lc_otp_program_i.count[181:177] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[182] | No | No | No | INPUT | ||
lc_otp_program_i.count[189:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[190] | No | No | No | INPUT | ||
lc_otp_program_i.count[191] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[192] | No | No | No | INPUT | ||
lc_otp_program_i.count[193] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[194] | No | No | No | INPUT | ||
lc_otp_program_i.count[202:195] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[203] | No | No | No | INPUT | ||
lc_otp_program_i.count[214:204] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[215] | No | No | No | INPUT | ||
lc_otp_program_i.count[228:216] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[229] | No | No | No | INPUT | ||
lc_otp_program_i.count[232:230] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[234:233] | No | No | No | INPUT | ||
lc_otp_program_i.count[248:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[249] | No | No | No | INPUT | ||
lc_otp_program_i.count[250] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[251] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[264:256] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[266:265] | No | No | No | INPUT | ||
lc_otp_program_i.count[274:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[275] | No | No | No | INPUT | ||
lc_otp_program_i.count[285:276] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[286] | No | No | No | INPUT | ||
lc_otp_program_i.count[289:287] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[290] | No | No | No | INPUT | ||
lc_otp_program_i.count[291] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[292] | No | No | No | INPUT | ||
lc_otp_program_i.count[293] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[294] | No | No | No | INPUT | ||
lc_otp_program_i.count[300:295] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | ||
lc_otp_program_i.count[305:303] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[306] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:307] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | ||
lc_otp_program_i.count[323:318] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[324] | No | No | No | INPUT | ||
lc_otp_program_i.count[337:325] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[338] | No | No | No | INPUT | ||
lc_otp_program_i.count[339] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[340] | No | No | No | INPUT | ||
lc_otp_program_i.count[364:341] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT |
lc_otp_program_i.count[365] | No | No | No | INPUT | ||
lc_otp_program_i.count[366] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT |
lc_otp_program_i.count[367] | No | No | No | INPUT | ||
lc_otp_program_i.count[375:368] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.count[376] | No | No | No | INPUT | ||
lc_otp_program_i.count[381:377] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT |
lc_otp_program_i.count[382] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T182,T190,T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.state[6:0] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[7] | No | No | No | INPUT | ||
lc_otp_program_i.state[8] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[9] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:10] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[30:29] | No | No | No | INPUT | ||
lc_otp_program_i.state[34:31] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[35] | No | No | No | INPUT | ||
lc_otp_program_i.state[36] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[37] | No | No | No | INPUT | ||
lc_otp_program_i.state[38] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T182 | INPUT |
lc_otp_program_i.state[39] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:40] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T182 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[52:44] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[53] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:54] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T188 | INPUT |
lc_otp_program_i.state[84:83] | No | No | No | INPUT | ||
lc_otp_program_i.state[86:85] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T192 | INPUT |
lc_otp_program_i.state[87] | No | No | No | INPUT | ||
lc_otp_program_i.state[88] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[89] | No | No | No | INPUT | ||
lc_otp_program_i.state[101:90] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[102] | No | No | No | INPUT | ||
lc_otp_program_i.state[109:103] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[110] | No | No | No | INPUT | ||
lc_otp_program_i.state[111] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[112] | No | No | No | INPUT | ||
lc_otp_program_i.state[114:113] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[115] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:116] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[140:138] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[141] | No | No | No | INPUT | ||
lc_otp_program_i.state[146:142] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.state[147] | No | No | No | INPUT | ||
lc_otp_program_i.state[148] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[151:150] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[152] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:153] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[164:156] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[165] | No | No | No | INPUT | ||
lc_otp_program_i.state[174:166] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[175] | No | No | No | INPUT | ||
lc_otp_program_i.state[181:176] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[182] | No | No | No | INPUT | ||
lc_otp_program_i.state[190:183] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[191] | No | No | No | INPUT | ||
lc_otp_program_i.state[209:192] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[210] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:211] | Yes | Yes | *T6,*T38,T36 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[213] | No | No | No | INPUT | ||
lc_otp_program_i.state[228:214] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[229] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:230] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT |
lc_otp_program_i.state[244] | No | No | No | INPUT | ||
lc_otp_program_i.state[245] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T40 | INPUT |
lc_otp_program_i.state[246] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:247] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[263:261] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.state[264] | No | No | No | INPUT | ||
lc_otp_program_i.state[269:265] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[285:271] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | INPUT |
lc_otp_program_i.state[286] | No | No | No | INPUT | ||
lc_otp_program_i.state[303:287] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT |
lc_otp_program_i.state[305:304] | No | No | No | INPUT | ||
lc_otp_program_i.state[310:306] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T40 | INPUT |
lc_otp_program_i.state[311] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:312] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT |
lc_otp_program_i.req | Yes | Yes | T36,T41,T80 | Yes | T36,T41,T80 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T36,T41,T80 | Yes | T36,T41,T80 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T194,T195,T196 | Yes | T194,T195,T196 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T40,T41 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T45,T41,T79 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T45,T79,T81 | Yes | T45,T36,T41 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T36,T41,T57 | Yes | T36,T41,T80 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T27,T40,T36 | Yes | T2,T3,T8 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T100 | Yes | T45,T36,T41 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT |
otp_lc_data_o.count[16:0] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[19:18] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[32:21] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[39:34] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[40] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[45:41] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:47] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[66:57] | Yes | Yes | *T6,*T80,*T187 | Yes | T188,T150,T189 | OUTPUT |
otp_lc_data_o.count[69:67] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72:70] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:74] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[78:77] | Yes | Yes | T80,T187,T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[80] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[87:82] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[89:88] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[95:90] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[101:97] | Yes | Yes | *T9,T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[105:103] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[107:106] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[111:108] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[113] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[116:115] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[118:117] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:119] | Yes | Yes | T9,*T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[134:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[136] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[143:138] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[145] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[153:147] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:155] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[174:164] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[176:175] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[181:177] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[189:183] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[193] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202:195] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[214:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[228:216] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[232:230] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[234:233] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[248:235] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[250] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:252] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[264:256] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[266:265] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[274:267] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[285:276] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[289:287] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[291] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[293] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[300:295] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[305:303] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:307] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[323:318] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[337:325] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[339] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[364:341] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[366] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[367] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[375:368] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[381:377] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.state[6:0] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[8] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:10] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[30:29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[34:31] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[36] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[38] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:40] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52:44] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:54] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T188 | OUTPUT |
otp_lc_data_o.state[84:83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[86:85] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T192 | OUTPUT |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[88] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[101:90] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[109:103] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[111] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[114:113] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:116] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[140:138] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[146:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[151:150] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:153] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[164:156] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[174:166] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[175] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[181:176] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[190:183] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[209:192] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:211] | Yes | Yes | *T6,*T38,T36 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[228:214] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.state[229] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:230] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | OUTPUT |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[245] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:247] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[263:261] | Yes | Yes | T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269:265] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[285:271] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | OUTPUT |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[303:287] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_lc_data_o.state[305:304] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[310:306] | Yes | Yes | *T45,T36,*T41 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:312] | Yes | Yes | T36,T80,T187 | Yes | T36,T188,T189 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T45,T79,T81 | Yes | T45,T36,T41 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T41,T79,T81 | Yes | T1,T2,T100 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T40,T41,T79 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T142,T200,T201 | Yes | T142,T200,T201 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T142,T200,T202 | Yes | T142,T200,T202 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T203,T204,T205 | Yes | T203,T204,T205 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T142,T200,T201 | Yes | T142,T200,T201 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T142,T200,T202 | Yes | T142,T200,T202 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T204,T205,T206 | Yes | T204,T205,T206 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T207,T175,T138 | Yes | T207,T175,T138 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T207,T175,T138 | Yes | T207,T175,T138 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T8 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[40:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[41] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:42] | Yes | Yes | *T208,*T150,*T203 | Yes | T208,T150,T203 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:71] | Yes | Yes | *T208,*T150,*T203 | Yes | T208,T150,T203 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[155:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[156] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:157] | Yes | Yes | T208,T150,T203 | Yes | T208,T150,T203 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T4 | Yes | T79,T81,T192 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T9,T23,T29 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T45,T41,T79 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9357 | 85.17 |
Total Bits 0->1 | 5493 | 4685 | 85.29 |
Total Bits 1->0 | 5493 | 4672 | 85.05 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9357 | 85.17 |
Port Bits 0->1 | 5493 | 4685 | 85.29 |
Port Bits 1->0 | 5493 | 4672 | 85.05 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T143,T175,T138 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T92,*T93,*T94 | Yes | T92,T93,T94 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T86,*T39,*T95 | Yes | T86,T39,T95 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T39,T95,T96 | Yes | T39,T95,T96 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T39,*T176,*T177 | Yes | T39,T176,T177 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T92,T93,T155 | Yes | T92,T93,T94 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T40,*T38,*T178 | Yes | T40,T178,T179 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T92,*T93,*T94 | Yes | T92,T93,T94 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T39,*T92,*T93 | Yes | T39,T92,T93 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T86,*T39,*T95 | Yes | T86,T39,T95 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T39,T95,T96 | Yes | T39,T95,T96 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T45,T41,T79 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T41,T79 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T155 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T39,T92,T155 | Yes | T39,T92,T93 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T41,T79 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T39,T92,T93 | Yes | T39,T92,T93 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T120,T180,T181 | Yes | T120,T180,T181 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T120,T180,T181 | Yes | T120,T180,T181 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T182,T73,T97 | Yes | T182,T73,T97 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T45,T36,T41 | Yes | T45,T36,T41 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T73,T97,T183 | Yes | T73,T97,T183 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T97,T98,T99 | Yes | T97,T98,T99 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T182,T73,T97 | Yes | T182,T73,T97 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T45,T36,T41 | Yes | T45,T36,T41 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T73,T97,T183 | Yes | T73,T97,T183 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T73,T97,T98 | Yes | T73,T97,T98 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T27,T37,T148 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[4:0] | Yes | Yes | T184 | Yes | T185,T184,T186 | INPUT | |
lc_otp_vendor_test_i.ctrl[7:5] | No | No | Yes | T186,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[8] | Yes | Yes | *T184 | Yes | T186,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[9] | No | No | Yes | T38,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[10] | Yes | Yes | *T184 | Yes | T38,T186,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T38,T186,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | Yes | Yes | *T184 | Yes | T38,T185,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[14:13] | No | No | Yes | T38,T186,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[16:15] | Yes | Yes | T184 | Yes | T38,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[18:17] | No | No | Yes | T38,T186,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[21:19] | Yes | Yes | T184 | Yes | T184,T38,T186 | INPUT | |
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25:23] | Yes | Yes | T184 | Yes | T185,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T186 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | Yes | Yes | *T184 | Yes | T38,T186,T184 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | Yes | T38 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | Yes | Yes | T184 | Yes | T185,T184,T38 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[16:0] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[19:18] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[20] | No | No | No | INPUT | |||
lc_otp_program_i.count[32:21] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[33] | No | No | No | INPUT | |||
lc_otp_program_i.count[39:34] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[40] | No | No | No | INPUT | |||
lc_otp_program_i.count[45:41] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[46] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:47] | Yes | Yes | *T6,*T80,*T187 | Yes | T182,T188,T150 | INPUT | |
lc_otp_program_i.count[56] | No | No | No | INPUT | |||
lc_otp_program_i.count[66:57] | Yes | Yes | *T6,*T80,*T187 | Yes | T188,T150,T189 | INPUT | |
lc_otp_program_i.count[69:67] | No | No | No | INPUT | |||
lc_otp_program_i.count[72:70] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[73] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:74] | Yes | Yes | T80,T187,T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[78:77] | Yes | Yes | T80,T187,T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[79] | No | No | No | INPUT | |||
lc_otp_program_i.count[80] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[81] | No | No | No | INPUT | |||
lc_otp_program_i.count[87:82] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[89:88] | No | No | No | INPUT | |||
lc_otp_program_i.count[95:90] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[96] | No | No | No | INPUT | |||
lc_otp_program_i.count[101:97] | Yes | Yes | T80,T187,T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[102] | No | No | No | INPUT | |||
lc_otp_program_i.count[105:103] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[107:106] | No | No | No | INPUT | |||
lc_otp_program_i.count[111:108] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T182 | INPUT | |
lc_otp_program_i.count[112] | No | No | No | INPUT | |||
lc_otp_program_i.count[113] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[114] | No | No | No | INPUT | |||
lc_otp_program_i.count[116:115] | Yes | Yes | T9,T6,T27 | Yes | T9,T27,T182 | INPUT | |
lc_otp_program_i.count[118:117] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:119] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[127] | No | No | No | INPUT | |||
lc_otp_program_i.count[134:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[135] | No | No | No | INPUT | |||
lc_otp_program_i.count[136] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[137] | No | No | No | INPUT | |||
lc_otp_program_i.count[143:138] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[144] | No | No | No | INPUT | |||
lc_otp_program_i.count[145] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[146] | No | No | No | INPUT | |||
lc_otp_program_i.count[153:147] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[154] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:155] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[163] | No | No | No | INPUT | |||
lc_otp_program_i.count[174:164] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[176:175] | No | No | No | INPUT | |||
lc_otp_program_i.count[181:177] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[182] | No | No | No | INPUT | |||
lc_otp_program_i.count[189:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[190] | No | No | No | INPUT | |||
lc_otp_program_i.count[191] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[192] | No | No | No | INPUT | |||
lc_otp_program_i.count[193] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[194] | No | No | No | INPUT | |||
lc_otp_program_i.count[202:195] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[203] | No | No | No | INPUT | |||
lc_otp_program_i.count[214:204] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[215] | No | No | No | INPUT | |||
lc_otp_program_i.count[228:216] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[229] | No | No | No | INPUT | |||
lc_otp_program_i.count[232:230] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[234:233] | No | No | No | INPUT | |||
lc_otp_program_i.count[248:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[249] | No | No | No | INPUT | |||
lc_otp_program_i.count[250] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[251] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[264:256] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[266:265] | No | No | No | INPUT | |||
lc_otp_program_i.count[274:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[275] | No | No | No | INPUT | |||
lc_otp_program_i.count[285:276] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[286] | No | No | No | INPUT | |||
lc_otp_program_i.count[289:287] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[290] | No | No | No | INPUT | |||
lc_otp_program_i.count[291] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[292] | No | No | No | INPUT | |||
lc_otp_program_i.count[293] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[294] | No | No | No | INPUT | |||
lc_otp_program_i.count[300:295] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | |||
lc_otp_program_i.count[305:303] | Yes | Yes | T80,T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[306] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:307] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | |||
lc_otp_program_i.count[323:318] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[324] | No | No | No | INPUT | |||
lc_otp_program_i.count[337:325] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[338] | No | No | No | INPUT | |||
lc_otp_program_i.count[339] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[340] | No | No | No | INPUT | |||
lc_otp_program_i.count[364:341] | Yes | Yes | *T80,*T187,*T188 | Yes | T80,T187,T188 | INPUT | |
lc_otp_program_i.count[365] | No | No | No | INPUT | |||
lc_otp_program_i.count[366] | Yes | Yes | *T80,*T187,*T182 | Yes | T80,T187,T182 | INPUT | |
lc_otp_program_i.count[367] | No | No | No | INPUT | |||
lc_otp_program_i.count[375:368] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.count[376] | No | No | No | INPUT | |||
lc_otp_program_i.count[381:377] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | INPUT | |
lc_otp_program_i.count[382] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T182,T190,T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.state[6:0] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[7] | No | No | No | INPUT | |||
lc_otp_program_i.state[8] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[9] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:10] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[30:29] | No | No | No | INPUT | |||
lc_otp_program_i.state[34:31] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[35] | No | No | No | INPUT | |||
lc_otp_program_i.state[36] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[37] | No | No | No | INPUT | |||
lc_otp_program_i.state[38] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T182 | INPUT | |
lc_otp_program_i.state[39] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:40] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T182 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[52:44] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[53] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:54] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T188 | INPUT | |
lc_otp_program_i.state[84:83] | No | No | No | INPUT | |||
lc_otp_program_i.state[86:85] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T192 | INPUT | |
lc_otp_program_i.state[87] | No | No | No | INPUT | |||
lc_otp_program_i.state[88] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[89] | No | No | No | INPUT | |||
lc_otp_program_i.state[101:90] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[102] | No | No | No | INPUT | |||
lc_otp_program_i.state[109:103] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[110] | No | No | No | INPUT | |||
lc_otp_program_i.state[111] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[112] | No | No | No | INPUT | |||
lc_otp_program_i.state[114:113] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[115] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:116] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[140:138] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[141] | No | No | No | INPUT | |||
lc_otp_program_i.state[146:142] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.state[147] | No | No | No | INPUT | |||
lc_otp_program_i.state[148] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[151:150] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[152] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:153] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[164:156] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[165] | No | No | No | INPUT | |||
lc_otp_program_i.state[174:166] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[175] | No | No | No | INPUT | |||
lc_otp_program_i.state[181:176] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[182] | No | No | No | INPUT | |||
lc_otp_program_i.state[190:183] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[191] | No | No | No | INPUT | |||
lc_otp_program_i.state[209:192] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[210] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:211] | Yes | Yes | *T6,*T38,T36 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[213] | No | No | No | INPUT | |||
lc_otp_program_i.state[228:214] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[229] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:230] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | INPUT | |
lc_otp_program_i.state[244] | No | No | No | INPUT | |||
lc_otp_program_i.state[245] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T40 | INPUT | |
lc_otp_program_i.state[246] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:247] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[263:261] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.state[264] | No | No | No | INPUT | |||
lc_otp_program_i.state[269:265] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[285:271] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | INPUT | |
lc_otp_program_i.state[286] | No | No | No | INPUT | |||
lc_otp_program_i.state[303:287] | Yes | Yes | *T182,*T190,*T191 | Yes | T182,T190,T191 | INPUT | |
lc_otp_program_i.state[305:304] | No | No | No | INPUT | |||
lc_otp_program_i.state[310:306] | Yes | Yes | *T9,*T6,*T27 | Yes | T9,T27,T40 | INPUT | |
lc_otp_program_i.state[311] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:312] | Yes | Yes | T36,T80,T187 | Yes | T36,T80,T187 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T36,T41,T80 | Yes | T36,T41,T80 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T36,T41,T80 | Yes | T36,T41,T80 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T194,T195,T196 | Yes | T194,T195,T196 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T40,T41 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T45,T41,T79 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T45,T79,T81 | Yes | T45,T36,T41 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T36,T41,T57 | Yes | T36,T41,T80 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T27,T40,T36 | Yes | T2,T3,T8 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T100 | Yes | T45,T36,T41 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT | |
otp_lc_data_o.count[16:0] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[19:18] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[32:21] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[39:34] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[40] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[45:41] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:47] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[66:57] | Yes | Yes | *T6,*T80,*T187 | Yes | T188,T150,T189 | OUTPUT | |
otp_lc_data_o.count[69:67] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72:70] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:74] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[78:77] | Yes | Yes | T80,T187,T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[79] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[80] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[87:82] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[89:88] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[95:90] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[101:97] | Yes | Yes | *T9,T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[105:103] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[107:106] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[111:108] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[113] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[114] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[116:115] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[118:117] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:119] | Yes | Yes | T9,*T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[134:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[136] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[143:138] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[145] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[153:147] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:155] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[174:164] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[176:175] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[181:177] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[189:183] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[193] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202:195] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[214:204] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[228:216] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[232:230] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[234:233] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[248:235] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[249] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[250] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:252] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[264:256] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[266:265] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[274:267] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[285:276] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[289:287] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[291] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[293] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[300:295] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[305:303] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:307] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[323:318] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[337:325] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[339] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[364:341] | Yes | Yes | *T80,*T187,*T188 | Yes | T188,T189,T176 | OUTPUT | |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[366] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[367] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[375:368] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[381:377] | Yes | Yes | *T36,*T41,*T57 | Yes | T36,T41,T57 | OUTPUT | |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.state[6:0] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[8] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:10] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[30:29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[34:31] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[36] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[38] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:40] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52:44] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:54] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T188 | OUTPUT | |
otp_lc_data_o.state[84:83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[86:85] | Yes | Yes | T6,T36,T80 | Yes | T36,T57,T192 | OUTPUT | |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[88] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[101:90] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[109:103] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[111] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[114:113] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:116] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[140:138] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[146:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148] | Yes | Yes | *T6,*T36,*T80 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[151:150] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[152] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:153] | Yes | Yes | *T6,T36,T80 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[164:156] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[174:166] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[175] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[181:176] | Yes | Yes | T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[190:183] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[191] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[209:192] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[210] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:211] | Yes | Yes | *T6,*T38,T36 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[228:214] | Yes | Yes | *T36,*T80,*T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.state[229] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:230] | Yes | Yes | *T6,*T38,*T36 | Yes | T36,T57,T193 | OUTPUT | |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[245] | Yes | Yes | *T45,*T40,*T36 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:247] | Yes | Yes | *T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[263:261] | Yes | Yes | T9,*T45,*T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269:265] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[285:271] | Yes | Yes | *T6,*T40,*T38 | Yes | T40,T36,T57 | OUTPUT | |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[303:287] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_lc_data_o.state[305:304] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[310:306] | Yes | Yes | *T45,T36,*T41 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:312] | Yes | Yes | T36,T80,T187 | Yes | T36,T188,T189 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T45,T79,T81 | Yes | T45,T36,T41 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T41,T79,T81 | Yes | T1,T2,T100 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T40,T197,T198 | Yes | T40,T199,T188 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T40,T41,T79 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T142,T200,T201 | Yes | T142,T200,T201 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T142,T200,T202 | Yes | T142,T200,T202 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T203,T204,T205 | Yes | T203,T204,T205 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T142,T200,T201 | Yes | T142,T200,T201 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T142,T200,T202 | Yes | T142,T200,T202 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T204,T205,T206 | Yes | T204,T205,T206 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T207,T175,T138 | Yes | T207,T175,T138 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T9,T45,T27 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T9,T5 | Yes | T2,T100,T9 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T100,T8,T9 | Yes | T8,T9,T45 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T207,T175,T138 | Yes | T207,T175,T138 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T8 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[1] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[40:2] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[41] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:42] | Yes | Yes | *T208,*T150,*T203 | Yes | T208,T150,T203 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[140:71] | Yes | Yes | *T208,*T150,*T203 | Yes | T208,T150,T203 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[155:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[156] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:157] | Yes | Yes | T208,T150,T203 | Yes | T208,T150,T203 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T4 | Yes | T79,T81,T192 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T9,T45,T27 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T9,T45,T27 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T45,T41,T79 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |