Unified Coverage Report :: Module :: pinmux

Module : pinmux

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
80.51	79.44	84.46	66.69		79.95	92.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/chip_earlgrey_asic-sim-vcs/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.top_earlgrey.u_pinmux_aon	90.83	98.93	84.46	98.84		79.95	92.00

Line Coverage for Module : pinmux

	Line No.	Total	Covered	Percent
TOTAL		1279	1016	79.44
CONT_ASSIGN	133	1	1	100.00
ALWAYS	162	45	45	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	249	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	0	0.00
CONT_ASSIGN	250	1	0	0.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	250	1	1	100.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	251	1	0	0.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	252	1	1	100.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	256	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	257	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	0	0.00
CONT_ASSIGN	258	1	0	0.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	258	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	259	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	272	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	273	1	1	100.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	274	1	0	0.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	275	1	1	100.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	279	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	280	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	281	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	282	1	1	100.00
CONT_ASSIGN	320	0	0
CONT_ASSIGN	321	1	1	100.00
CONT_ASSIGN	420	1	1	100.00
ALWAYS	423	15	15	100.00
CONT_ASSIGN	460	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	464	1	1	100.00
CONT_ASSIGN	474	1	1	100.00
CONT_ASSIGN	475	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	479	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	483	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	492	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	496	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	501	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	503	1	1	100.00
CONT_ASSIGN	511	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	515	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	519	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	0	0.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	528	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	532	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	537	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
CONT_ASSIGN	539	1	1	100.00
ALWAYS	552	3	2	66.67
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	558	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	572	1	1	100.00
CONT_ASSIGN	581	1	1	100.00
CONT_ASSIGN	586	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	591	1	1	100.00
CONT_ASSIGN	612	1	1	100.00
CONT_ASSIGN	612	1	0	0.00
CONT_ASSIGN	612	1	1	100.00
CONT_ASSIGN	612	1	0	0.00
CONT_ASSIGN	612	1	0	0.00
CONT_ASSIGN	612	1	1	100.00
CONT_ASSIGN	612	1	0	0.00
CONT_ASSIGN	612	1	0	0.00
CONT_ASSIGN	616	1	1	100.00

Click here to see the source line report.

---

Cond Coverage for Module : pinmux

	Total	Covered	Percent
Conditions	1975	1668	84.46
Logical	1975	1668	84.46
Non-Logical	0	0
Event	0	0

This module contains a very large number of conditions, so the report has been split into multiple pages, by source line number. Click on the line number range in the table below to see the condition coverage for that section of the module.

Line numbers	Percent
133-492	95.10
492	78.77
492-496	80.46
496-501	81.36
501-528	92.69
528-591	81.40

---

Toggle Coverage for Module : pinmux

	Total	Covered	Percent
Totals	713	395	55.40
Total Bits	3068	2046	66.69
Total Bits 0->1	1534	1024	66.75
Total Bits 1->0	1534	1022	66.62

Ports	713	395	55.40
Port Bits	3068	2046	66.69
Port Bits 0->1	1534	1024	66.75
Port Bits 1->0	1534	1022	66.62

Port Details

Name	Toggle	Toggle 1->0	Tests	Toggle 0->1	Tests	Direction
clk_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
rst_ni	Yes	Yes	T44,T45,T32	Yes	T1,T2,T3	INPUT
rst_sys_ni	Yes	Yes	T44,T45,T32	Yes	T1,T2,T3	INPUT
scanmode_i[3:0]	Unreachable	Unreachable		Unreachable		INPUT
clk_aon_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
rst_aon_ni	Yes	Yes	T44,T45,T32	Yes	T1,T2,T3	INPUT
pin_wkup_req_o	Yes	Yes	T5,T29,T76	Yes	T5,T29,T26	OUTPUT
usb_wkup_req_o	Yes	Yes	T9,T76,T77	Yes	T9,T76,T77	OUTPUT
sleep_en_i	Yes	Yes	T1,T2,T3	Yes	T13,T5,T29	INPUT
strap_en_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
strap_en_override_i	Unreachable	Unreachable		Unreachable		INPUT
lc_dft_en_i[3:0]	Yes	Yes	T44,T45,T58	Yes	T1,T2,T3	INPUT
lc_hw_debug_en_i[3:0]	Yes	Yes	T44,T45,T38	Yes	T1,T2,T3	INPUT
lc_check_byp_en_i[3:0]	Yes	Yes	T32,T33,T58	Yes	T32,T33,T58	INPUT
lc_escalate_en_i[3:0]	Yes	Yes	T44,T45,T84	Yes	T44,T45,T32	INPUT
pinmux_hw_debug_en_o[3:0]	Yes	Yes	T44,T45,T38	Yes	T1,T2,T3	OUTPUT
dft_strap_test_o.straps[1:0]	No	No		Yes	T85,T86,T87	OUTPUT
dft_strap_test_o.valid	Yes	Yes	T44,T45,T58	Yes	T1,T2,T3	OUTPUT
dft_hold_tap_sel_i	Unreachable	Unreachable		Unreachable		INPUT
lc_jtag_o.tdi	Yes	Yes	T36,T32,T33	Yes	T36,T32,T33	OUTPUT
lc_jtag_o.trst_n	Yes	Yes	T32,T33,T58	Yes	T36,T32,T33	OUTPUT
lc_jtag_o.tms	Yes	Yes	T36,T32,T33	Yes	T36,T32,T33	OUTPUT
lc_jtag_o.tck	Yes	Yes	T36,T32,T33	Yes	T36,T32,T33	OUTPUT
lc_jtag_i.tdo_oe	Yes	Yes	T36,T32,T33	Yes	T36,T32,T33	INPUT
lc_jtag_i.tdo	Yes	Yes	T36,T32,T33	Yes	T36,T32,T33	INPUT
rv_jtag_o.tdi	Yes	Yes	T86,T88,T89	Yes	T86,T88,T89	OUTPUT
rv_jtag_o.trst_n	Yes	Yes	T86,T89,T90	Yes	T86,T88,T89	OUTPUT
rv_jtag_o.tms	Yes	Yes	T86,T88,T89	Yes	T86,T88,T89	OUTPUT
rv_jtag_o.tck	Yes	Yes	T86,T88,T89	Yes	T86,T88,T89	OUTPUT
rv_jtag_i.tdo_oe	Yes	Yes	T86,T88,T89	Yes	T86,T88,T89	INPUT
rv_jtag_i.tdo	Yes	Yes	T86,T88,T89	Yes	T86,T88,T89	INPUT
dft_jtag_o.tdi	Yes	Yes	T85,T86,T91	Yes	T85,T86,T91	OUTPUT
dft_jtag_o.trst_n	Yes	Yes	T85,T86,T91	Yes	T85,T86,T91	OUTPUT
dft_jtag_o.tms	Yes	Yes	T85,T86,T91	Yes	T85,T86,T91	OUTPUT
dft_jtag_o.tck	Yes	Yes	T85,T86,T91	Yes	T85,T86,T91	OUTPUT
dft_jtag_i.tdo_oe	Yes	Yes	T85,T86,T92	Yes	T85,T86,T92	INPUT
dft_jtag_i.tdo	Yes	Yes	T85,T86,T92	Yes	T85,T86,T92	INPUT
usbdev_dppullup_en_i	Yes	Yes	T7,T8,T9	Yes	T7,T8,T9	INPUT
usbdev_dnpullup_en_i	Yes	Yes	T7,T9,T93	Yes	T7,T9,T93	INPUT
usb_dppullup_en_o	Yes	Yes	T7,T8,T9	Yes	T7,T8,T9	OUTPUT
usb_dnpullup_en_o	Yes	Yes	T7,T9,T93	Yes	T7,T9,T93	OUTPUT
usbdev_suspend_req_i	Yes	Yes	T9,T76,T77	Yes	T9,T76,T77	INPUT
usbdev_wake_ack_i	Yes	Yes	T9,T76,T77	Yes	T9,T76,T77	INPUT
usbdev_bus_not_idle_o	Yes	Yes	T76,T77,T94	Yes	T76,T77,T94	OUTPUT
usbdev_bus_reset_o	Yes	Yes	T9,T95	Yes	T9,T95	OUTPUT
usbdev_sense_lost_o	Yes	Yes	T76,T77,T94	Yes	T76,T77,T94	OUTPUT
usbdev_wake_detect_active_o	Yes	Yes	T9,T76,T77	Yes	T9,T76,T77	OUTPUT
tl_i.d_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_user.data_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_user.cmd_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_user.instr_type[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_user.rsvd[4:0]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_data[31:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_mask[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_address[11:0]	Yes	Yes	*T96,*T97,*T98	Yes	T96,T97,T98	INPUT
tl_i.a_address[16:12]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_address[18:17]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_i.a_address[21:19]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_address[22]	Yes	Yes	*T1,*T2,*T3	Yes	T1,T2,T3	INPUT
tl_i.a_address[29:23]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_address[30]	Yes	Yes	*T1,*T2,*T3	Yes	T1,T2,T3	INPUT
tl_i.a_address[31]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_source[5:0]	Yes	Yes	*T99,*T37,*T100	Yes	T99,T37,T100	INPUT
tl_i.a_source[7:6]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_size[1:0]	Yes	Yes	T96,T97,T98	Yes	T96,T97,T98	INPUT
tl_i.a_param[2:0]	Unreachable	Unreachable		Unreachable		INPUT
tl_i.a_opcode[2:0]	Yes	Yes	T37,T100,T101	Yes	T37,T100,T101	INPUT
tl_i.a_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
tl_o.a_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
tl_o.d_error	Yes	Yes	T97,T98,T102	Yes	T97,T98,T102	OUTPUT
tl_o.d_user.data_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
tl_o.d_user.rsp_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
tl_o.d_data[31:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
tl_o.d_sink	Yes	Yes	T96,T97,T98	Yes	T96,T97,T98	OUTPUT
tl_o.d_source[5:0]	Yes	Yes	*T69,*T97,*T98	Yes	T69,T96,T97	OUTPUT
tl_o.d_source[7:6]	Unreachable	Unreachable		Unreachable		OUTPUT
tl_o.d_size[1:0]	Yes	Yes	T96,T97,T98	Yes	T96,T97,T98	OUTPUT
tl_o.d_param[2:0]	Unreachable	Unreachable		Unreachable		OUTPUT
tl_o.d_opcode[0]	Yes	Yes	*T1,*T2,*T3	Yes	T1,T2,T3	OUTPUT
tl_o.d_opcode[2:1]	Unreachable	Unreachable		Unreachable		OUTPUT
tl_o.d_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
alert_rx_i[0].ack_n	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
alert_rx_i[0].ack_p	Yes	Yes	T78,T103,T104	Yes	T78,T103,T104	INPUT
alert_rx_i[0].ping_n	Yes	Yes	T103,T104,T105	Yes	T103,T104,T105	INPUT
alert_rx_i[0].ping_p	Yes	Yes	T103,T104,T105	Yes	T103,T104,T105	INPUT
alert_tx_o[0].alert_n	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
alert_tx_o[0].alert_p	Yes	Yes	T78,T103,T104	Yes	T78,T103,T104	OUTPUT
periph_to_mio_i[74:0]	Yes	Yes	T30,T22,T41	Yes	T29,T30,T22	INPUT
periph_to_mio_oe_i[74:0]	Yes	Yes	T30,T42,T101	Yes	T5,T29,T30	INPUT
mio_to_periph_o[56:0]	Yes	Yes	T5,T30,T41	Yes	T5,T30,T41	OUTPUT
periph_to_dio_i[11:0]	Yes	Yes	*T7,*T8,*T9	Yes	T8,T19,T40	INPUT
periph_to_dio_i[13:12]	No	No		No		INPUT
periph_to_dio_i[15:14]	Yes	Yes	T10,T11,T12	Yes	T10,T11,T12	INPUT
periph_to_dio_oe_i[15:0]	Yes	Yes	T8,T19,T40	Yes	T8,T19,T40	INPUT
dio_to_periph_o[15:0]	Yes	Yes	T7,T34,T8	Yes	T7,T8,T9	OUTPUT
mio_attr_o[0].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].keep_en	No	No		No		OUTPUT
mio_attr_o[0].schmitt_en	No	No		No		OUTPUT
mio_attr_o[0].od_en	No	No		No		OUTPUT
mio_attr_o[0].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[0].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[0].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[1].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].keep_en	No	No		No		OUTPUT
mio_attr_o[1].schmitt_en	No	No		No		OUTPUT
mio_attr_o[1].od_en	No	No		No		OUTPUT
mio_attr_o[1].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[1].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[1].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[2].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[2].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[2].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
mio_attr_o[2].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
mio_attr_o[2].keep_en	No	No		No		OUTPUT
mio_attr_o[2].schmitt_en	No	No		No		OUTPUT
mio_attr_o[2].od_en	No	No		No		OUTPUT
mio_attr_o[2].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[2].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[2].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[3].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].keep_en	No	No		No		OUTPUT
mio_attr_o[3].schmitt_en	No	No		No		OUTPUT
mio_attr_o[3].od_en	No	No		No		OUTPUT
mio_attr_o[3].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[3].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[3].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[4].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].keep_en	No	No		No		OUTPUT
mio_attr_o[4].schmitt_en	No	No		No		OUTPUT
mio_attr_o[4].od_en	No	No		No		OUTPUT
mio_attr_o[4].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[4].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[4].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[5].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].keep_en	No	No		No		OUTPUT
mio_attr_o[5].schmitt_en	No	No		No		OUTPUT
mio_attr_o[5].od_en	No	No		No		OUTPUT
mio_attr_o[5].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[5].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[5].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[6].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].keep_en	No	No		No		OUTPUT
mio_attr_o[6].schmitt_en	No	No		No		OUTPUT
mio_attr_o[6].od_en	No	No		No		OUTPUT
mio_attr_o[6].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[6].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[6].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[7].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[7].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[7].pull_en	Yes	Yes	T23,T24,T25	Yes	T14,T51,T52	OUTPUT
mio_attr_o[7].pull_select	Yes	Yes	T23,T24,T25	Yes	T14,T51,T52	OUTPUT
mio_attr_o[7].keep_en	No	No		No		OUTPUT
mio_attr_o[7].schmitt_en	No	No		No		OUTPUT
mio_attr_o[7].od_en	No	No		No		OUTPUT
mio_attr_o[7].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[7].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[7].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[7].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[8].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].keep_en	No	No		No		OUTPUT
mio_attr_o[8].schmitt_en	No	No		No		OUTPUT
mio_attr_o[8].od_en	No	No		No		OUTPUT
mio_attr_o[8].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[8].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[8].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[9].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[9].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[9].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
mio_attr_o[9].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
mio_attr_o[9].keep_en	No	No		No		OUTPUT
mio_attr_o[9].schmitt_en	No	No		No		OUTPUT
mio_attr_o[9].od_en	No	No		No		OUTPUT
mio_attr_o[9].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[9].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[9].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[9].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[10].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[10].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[10].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
mio_attr_o[10].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
mio_attr_o[10].keep_en	No	No		No		OUTPUT
mio_attr_o[10].schmitt_en	No	No		No		OUTPUT
mio_attr_o[10].od_en	No	No		No		OUTPUT
mio_attr_o[10].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[10].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[10].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[10].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[11].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].keep_en	No	No		No		OUTPUT
mio_attr_o[11].schmitt_en	No	No		No		OUTPUT
mio_attr_o[11].od_en	No	No		No		OUTPUT
mio_attr_o[11].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[11].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[11].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[12].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[12].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[12].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
mio_attr_o[12].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
mio_attr_o[12].keep_en	No	No		No		OUTPUT
mio_attr_o[12].schmitt_en	No	No		No		OUTPUT
mio_attr_o[12].od_en	No	No		No		OUTPUT
mio_attr_o[12].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[12].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[12].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[12].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[13].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[13].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[13].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[13].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[13].keep_en	No	No		No		OUTPUT
mio_attr_o[13].schmitt_en	No	No		No		OUTPUT
mio_attr_o[13].od_en	No	No		No		OUTPUT
mio_attr_o[13].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[13].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[13].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[13].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[14].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[14].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[14].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[14].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[14].keep_en	No	No		No		OUTPUT
mio_attr_o[14].schmitt_en	No	No		No		OUTPUT
mio_attr_o[14].od_en	No	No		No		OUTPUT
mio_attr_o[14].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[14].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[14].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[14].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[15].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[15].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[15].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[15].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T22,T47	OUTPUT
mio_attr_o[15].keep_en	No	No		No		OUTPUT
mio_attr_o[15].schmitt_en	No	No		No		OUTPUT
mio_attr_o[15].od_en	No	No		No		OUTPUT
mio_attr_o[15].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[15].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[15].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[15].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[16].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].keep_en	No	No		No		OUTPUT
mio_attr_o[16].schmitt_en	No	No		No		OUTPUT
mio_attr_o[16].od_en	No	No		No		OUTPUT
mio_attr_o[16].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[16].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[16].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[17].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].keep_en	No	No		No		OUTPUT
mio_attr_o[17].schmitt_en	No	No		No		OUTPUT
mio_attr_o[17].od_en	No	No		No		OUTPUT
mio_attr_o[17].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[17].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[17].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[18].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].keep_en	No	No		No		OUTPUT
mio_attr_o[18].schmitt_en	No	No		No		OUTPUT
mio_attr_o[18].od_en	No	No		No		OUTPUT
mio_attr_o[18].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[18].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[18].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[19].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].keep_en	No	No		No		OUTPUT
mio_attr_o[19].schmitt_en	No	No		No		OUTPUT
mio_attr_o[19].od_en	No	No		No		OUTPUT
mio_attr_o[19].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[19].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[19].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[20].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].keep_en	No	No		No		OUTPUT
mio_attr_o[20].schmitt_en	No	No		No		OUTPUT
mio_attr_o[20].od_en	No	No		No		OUTPUT
mio_attr_o[20].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[20].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[20].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[21].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].keep_en	No	No		No		OUTPUT
mio_attr_o[21].schmitt_en	No	No		No		OUTPUT
mio_attr_o[21].od_en	No	No		No		OUTPUT
mio_attr_o[21].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[21].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[21].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[22].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[22].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[22].pull_en	Yes	Yes	T53,T54,T55	Yes	T56,T53,T57	OUTPUT
mio_attr_o[22].pull_select	Yes	Yes	T56,T53,T57	Yes	T56,T53,T57	OUTPUT
mio_attr_o[22].keep_en	No	No		No		OUTPUT
mio_attr_o[22].schmitt_en	No	No		No		OUTPUT
mio_attr_o[22].od_en	No	No		No		OUTPUT
mio_attr_o[22].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[22].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[22].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[22].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[23].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[23].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[23].pull_en	Yes	Yes	T53,T54,T55	Yes	T56,T53,T57	OUTPUT
mio_attr_o[23].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[23].keep_en	No	No		No		OUTPUT
mio_attr_o[23].schmitt_en	No	No		No		OUTPUT
mio_attr_o[23].od_en	No	No		No		OUTPUT
mio_attr_o[23].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[23].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[23].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[23].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[24].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[24].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[24].pull_en	Yes	Yes	T53,T54,T55	Yes	T56,T53,T57	OUTPUT
mio_attr_o[24].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[24].keep_en	No	No		No		OUTPUT
mio_attr_o[24].schmitt_en	No	No		No		OUTPUT
mio_attr_o[24].od_en	No	No		No		OUTPUT
mio_attr_o[24].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[24].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[24].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[24].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[25].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[25].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[25].pull_en	Yes	Yes	T13,T44,T26	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].pull_select	Yes	Yes	T13,T44,T26	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].keep_en	No	No		No		OUTPUT
mio_attr_o[25].schmitt_en	No	No		No		OUTPUT
mio_attr_o[25].od_en	No	No		No		OUTPUT
mio_attr_o[25].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[25].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[25].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[25].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[26].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].keep_en	No	No		No		OUTPUT
mio_attr_o[26].schmitt_en	No	No		No		OUTPUT
mio_attr_o[26].od_en	No	No		No		OUTPUT
mio_attr_o[26].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[26].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[26].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[27].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].keep_en	No	No		No		OUTPUT
mio_attr_o[27].schmitt_en	No	No		No		OUTPUT
mio_attr_o[27].od_en	No	No		No		OUTPUT
mio_attr_o[27].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[27].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[27].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[28].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].keep_en	No	No		No		OUTPUT
mio_attr_o[28].schmitt_en	No	No		No		OUTPUT
mio_attr_o[28].od_en	No	No		No		OUTPUT
mio_attr_o[28].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[28].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[28].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[29].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].keep_en	No	No		No		OUTPUT
mio_attr_o[29].schmitt_en	No	No		No		OUTPUT
mio_attr_o[29].od_en	No	No		No		OUTPUT
mio_attr_o[29].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[29].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[29].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[30].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].keep_en	No	No		No		OUTPUT
mio_attr_o[30].schmitt_en	No	No		No		OUTPUT
mio_attr_o[30].od_en	No	No		No		OUTPUT
mio_attr_o[30].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[30].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[30].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[31].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].keep_en	No	No		No		OUTPUT
mio_attr_o[31].schmitt_en	No	No		No		OUTPUT
mio_attr_o[31].od_en	No	No		No		OUTPUT
mio_attr_o[31].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[31].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[31].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[32].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].keep_en	No	No		No		OUTPUT
mio_attr_o[32].schmitt_en	No	No		No		OUTPUT
mio_attr_o[32].od_en	No	No		No		OUTPUT
mio_attr_o[32].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[32].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[32].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[33].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].keep_en	No	No		No		OUTPUT
mio_attr_o[33].schmitt_en	No	No		No		OUTPUT
mio_attr_o[33].od_en	No	No		No		OUTPUT
mio_attr_o[33].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[33].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[33].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[34].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].keep_en	No	No		No		OUTPUT
mio_attr_o[34].schmitt_en	No	No		No		OUTPUT
mio_attr_o[34].od_en	No	No		No		OUTPUT
mio_attr_o[34].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[34].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[34].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[35].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].keep_en	No	No		No		OUTPUT
mio_attr_o[35].schmitt_en	No	No		No		OUTPUT
mio_attr_o[35].od_en	No	No		No		OUTPUT
mio_attr_o[35].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[35].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[35].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[36].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].keep_en	No	No		No		OUTPUT
mio_attr_o[36].schmitt_en	No	No		No		OUTPUT
mio_attr_o[36].od_en	No	No		No		OUTPUT
mio_attr_o[36].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[36].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[36].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[37].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].keep_en	No	No		No		OUTPUT
mio_attr_o[37].schmitt_en	No	No		No		OUTPUT
mio_attr_o[37].od_en	No	No		No		OUTPUT
mio_attr_o[37].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[37].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[37].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[38].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].keep_en	No	No		No		OUTPUT
mio_attr_o[38].schmitt_en	Yes	Yes	T32,T33,T58	Yes	T36,T32,T33	OUTPUT
mio_attr_o[38].od_en	No	No		No		OUTPUT
mio_attr_o[38].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[38].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[38].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[39].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].keep_en	No	No		No		OUTPUT
mio_attr_o[39].schmitt_en	Yes	Yes	T32,T33,T58	Yes	T36,T32,T33	OUTPUT
mio_attr_o[39].od_en	No	No		No		OUTPUT
mio_attr_o[39].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[39].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[39].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[40].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].keep_en	No	No		No		OUTPUT
mio_attr_o[40].schmitt_en	No	No		No		OUTPUT
mio_attr_o[40].od_en	No	No		No		OUTPUT
mio_attr_o[40].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[40].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[40].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[41].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].keep_en	No	No		No		OUTPUT
mio_attr_o[41].schmitt_en	No	No		No		OUTPUT
mio_attr_o[41].od_en	No	No		No		OUTPUT
mio_attr_o[41].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[41].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[41].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[42].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].keep_en	No	No		No		OUTPUT
mio_attr_o[42].schmitt_en	No	No		No		OUTPUT
mio_attr_o[42].od_en	No	No		No		OUTPUT
mio_attr_o[42].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[42].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[42].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[43].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].keep_en	No	No		No		OUTPUT
mio_attr_o[43].schmitt_en	No	No		No		OUTPUT
mio_attr_o[43].od_en	No	No		No		OUTPUT
mio_attr_o[43].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[43].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[43].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[44].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].keep_en	No	No		No		OUTPUT
mio_attr_o[44].schmitt_en	No	No		No		OUTPUT
mio_attr_o[44].od_en	No	No		No		OUTPUT
mio_attr_o[44].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[44].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[44].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[45].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].keep_en	No	No		No		OUTPUT
mio_attr_o[45].schmitt_en	No	No		No		OUTPUT
mio_attr_o[45].od_en	No	No		No		OUTPUT
mio_attr_o[45].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[45].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[45].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[46].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].keep_en	No	No		No		OUTPUT
mio_attr_o[46].schmitt_en	No	No		No		OUTPUT
mio_attr_o[46].od_en	No	No		No		OUTPUT
mio_attr_o[46].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[46].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
mio_attr_o[46].drive_strength[3:1]	No	No		No		OUTPUT
mio_out_o[46:0]	Yes	Yes	T29,T30,T41	Yes	T29,T30,T41	OUTPUT
mio_oe_o[46:0]	Yes	Yes	T30,T42,T43	Yes	T13,T29,T30	OUTPUT
mio_in_i[46:0]	Yes	Yes	T29,T30,T39	Yes	T29,T30,T39	INPUT
dio_attr_o[0].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[0].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[0].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[0].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[0].keep_en	No	No		No		OUTPUT
dio_attr_o[0].schmitt_en	No	No		No		OUTPUT
dio_attr_o[0].od_en	No	No		No		OUTPUT
dio_attr_o[0].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[0].drive_strength[0]	Yes	Yes	*T44,*T45,*T38	Yes	T1,T2,T3	OUTPUT
dio_attr_o[0].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[1].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[1].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[1].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[1].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[1].keep_en	No	No		No		OUTPUT
dio_attr_o[1].schmitt_en	No	No		No		OUTPUT
dio_attr_o[1].od_en	No	No		No		OUTPUT
dio_attr_o[1].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[1].drive_strength[0]	Yes	Yes	*T44,*T45,*T38	Yes	T1,T2,T3	OUTPUT
dio_attr_o[1].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[2].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[2].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[2].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[2].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[2].keep_en	No	No		No		OUTPUT
dio_attr_o[2].schmitt_en	No	No		No		OUTPUT
dio_attr_o[2].od_en	No	No		No		OUTPUT
dio_attr_o[2].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[2].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[2].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[3].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[3].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[3].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[3].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[3].keep_en	No	No		No		OUTPUT
dio_attr_o[3].schmitt_en	No	No		No		OUTPUT
dio_attr_o[3].od_en	No	No		No		OUTPUT
dio_attr_o[3].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[3].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[3].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[4].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[4].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[4].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[4].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[4].keep_en	No	No		No		OUTPUT
dio_attr_o[4].schmitt_en	No	No		No		OUTPUT
dio_attr_o[4].od_en	No	No		No		OUTPUT
dio_attr_o[4].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[4].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[4].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[4].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[5].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[5].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[5].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[5].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T11,T12	OUTPUT
dio_attr_o[5].keep_en	No	No		No		OUTPUT
dio_attr_o[5].schmitt_en	No	No		No		OUTPUT
dio_attr_o[5].od_en	No	No		No		OUTPUT
dio_attr_o[5].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[5].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[5].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[5].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[6].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].keep_en	No	No		No		OUTPUT
dio_attr_o[6].schmitt_en	No	No		No		OUTPUT
dio_attr_o[6].od_en	No	No		No		OUTPUT
dio_attr_o[6].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[6].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[6].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[7].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].keep_en	No	No		No		OUTPUT
dio_attr_o[7].schmitt_en	No	No		No		OUTPUT
dio_attr_o[7].od_en	No	No		No		OUTPUT
dio_attr_o[7].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[7].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[7].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[8].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].keep_en	No	No		No		OUTPUT
dio_attr_o[8].schmitt_en	No	No		No		OUTPUT
dio_attr_o[8].od_en	No	No		No		OUTPUT
dio_attr_o[8].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[8].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[8].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[9].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].keep_en	No	No		No		OUTPUT
dio_attr_o[9].schmitt_en	No	No		No		OUTPUT
dio_attr_o[9].od_en	No	No		No		OUTPUT
dio_attr_o[9].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[9].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[9].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[10].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[10].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T18,T49,T50	OUTPUT
dio_attr_o[10].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[10].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[10].keep_en	No	No		No		OUTPUT
dio_attr_o[10].schmitt_en	No	No		No		OUTPUT
dio_attr_o[10].od_en	No	No		No		OUTPUT
dio_attr_o[10].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[10].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[10].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[10].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[11].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[11].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T18,T49,T50	OUTPUT
dio_attr_o[11].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[11].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[11].keep_en	No	No		No		OUTPUT
dio_attr_o[11].schmitt_en	No	No		No		OUTPUT
dio_attr_o[11].od_en	No	No		No		OUTPUT
dio_attr_o[11].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[11].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[11].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[11].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[12].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[12].virt_od_en	No	No		No		OUTPUT
dio_attr_o[12].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[12].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[12].keep_en	No	No		No		OUTPUT
dio_attr_o[12].schmitt_en	No	No		No		OUTPUT
dio_attr_o[12].od_en	No	No		No		OUTPUT
dio_attr_o[12].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[12].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[12].drive_strength[3:0]	No	No		No		OUTPUT
dio_attr_o[13].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[13].virt_od_en	No	No		No		OUTPUT
dio_attr_o[13].pull_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[13].pull_select	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[13].keep_en	No	No		No		OUTPUT
dio_attr_o[13].schmitt_en	No	No		No		OUTPUT
dio_attr_o[13].od_en	No	No		No		OUTPUT
dio_attr_o[13].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[13].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[13].drive_strength[3:0]	No	No		No		OUTPUT
dio_attr_o[14].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[14].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[14].pull_en	Yes	Yes	T23,T24,T46	Yes	T10,T47,T48	OUTPUT
dio_attr_o[14].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
dio_attr_o[14].keep_en	No	No		No		OUTPUT
dio_attr_o[14].schmitt_en	No	No		No		OUTPUT
dio_attr_o[14].od_en	No	No		No		OUTPUT
dio_attr_o[14].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[14].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[14].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[14].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[15].invert	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[15].virt_od_en	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[15].pull_en	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
dio_attr_o[15].pull_select	Yes	Yes	T23,T24,T25	Yes	T10,T47,T48	OUTPUT
dio_attr_o[15].keep_en	No	No		No		OUTPUT
dio_attr_o[15].schmitt_en	No	No		No		OUTPUT
dio_attr_o[15].od_en	No	No		No		OUTPUT
dio_attr_o[15].input_disable	Yes	Yes	T23,T24,T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[15].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[15].drive_strength[0]	Yes	Yes	*T23,*T24,*T25	Yes	T23,T24,T25	OUTPUT
dio_attr_o[15].drive_strength[3:1]	No	No		No		OUTPUT
dio_out_o[11:0]	Yes	Yes	*T7,*T8,*T9	Yes	T8,T19,T40	OUTPUT
dio_out_o[13:12]	No	No		No		OUTPUT
dio_out_o[15:14]	Yes	Yes	T10,T11,T12	Yes	T10,T11,T12	OUTPUT
dio_oe_o[15:0]	Yes	Yes	T8,T19,T40	Yes	T13,T8,T19	OUTPUT
dio_in_i[15:0]	Yes	Yes	T7,T34,T8	Yes	T7,T8,T9	INPUT

*Tests covering at least one bit in the range

---

Branch Coverage for Module : pinmux

	Line No.	Total	Covered	Percent
Branches		778	622	79.95
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	2	50.00
TERNARY	496	4	2	50.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	3	75.00
TERNARY	496	4	3	75.00
TERNARY	479	2	2	100.00
TERNARY	483	2	2	100.00
TERNARY	492	4	4	100.00
TERNARY	496	4	4	100.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	2	50.00
TERNARY	532	4	2	50.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	2	50.00
TERNARY	532	4	2	50.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	4	100.00
TERNARY	532	4	4	100.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	4	100.00
TERNARY	532	4	4	100.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	2	50.00
TERNARY	532	4	2	50.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	1	25.00
TERNARY	532	4	1	25.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	3	75.00
TERNARY	532	4	3	75.00
TERNARY	515	2	2	100.00
TERNARY	519	2	2	100.00
TERNARY	528	4	2	50.00
TERNARY	532	4	2	50.00
TERNARY	591	2	2	100.00
TERNARY	591	2	1	50.00
TERNARY	591	2	2	100.00
TERNARY	591	2	2	100.00
TERNARY	591	2	1	50.00
TERNARY	591	2	2	100.00
TERNARY	591	2	2	100.00
TERNARY	591	2	1	50.00
IF	162	2	2	100.00
IF	423	2	2	100.00
IF	553	2	1	50.00

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T29,T81
0	1	-	Covered	T75,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T29,T81
0	1	-	Covered	T75,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T75,T20
0	1	-	Covered	T29,T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T75,T20
0	1	-	Covered	T29,T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T81
0	1	-	Covered	T13,T29,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T81
0	1	-	Covered	T13,T29,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T29,T75
0	1	-	Covered	T20,T81,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T29,T75
0	1	-	Covered	T20,T81,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T81
0	1	-	Covered	T29,T21,T81
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T81
0	1	-	Covered	T29,T21,T81
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T29,T75
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T29,T75
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T29,T75
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T21
0	1	-	Covered	T13,T29
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T75,T20,T21
0	1	-	Covered	T13,T29
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T29
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T29
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T29,T75
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T29,T75
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T69
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T69
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T21,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T21,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T20
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T21,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T21,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13
0	1	-	Covered	T20,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20,T69
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

479            assign mio_out[k] = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

483            assign mio_oe[k]  = reg2hw.mio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

492            assign mio_out_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
493                                         (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
494                                         (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

496            assign mio_oe_retreg_d[k] = (reg2hw.mio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
497                                        (reg2hw.mio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
498                                        (reg2hw.mio_pad_sleep_mode[k].q == 2) ? 1'b0 : mio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T13,T20,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21,T69
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21,T69
0	1	-	Covered	T13,T20
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T21
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T20,T21,T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T20,T82
0	1	-	Covered	T5,T82,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T20,T82
0	1	-	Covered	T5,T82,T21
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T5,T82
0	1	-	Covered	T5,T20,T82
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T5,T82
0	1	-	Covered	T5,T20,T82
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T20,T82
0	1	-	Covered	T13,T5,T82
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T20,T82
0	1	-	Covered	T13,T5,T82
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T5,T20
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T82,T21
0	1	-	Covered	T5,T82,T83
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T5,T82,T21
0	1	-	Covered	T5,T82,T83
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T13,T21
0	1	-	Covered	T20
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T21
0	1	-	Covered	T13
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Covered	T69

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T20
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

515            assign dio_out[k] = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

519            assign dio_oe[k]  = reg2hw.dio_pad_sleep_status[k].q ?
                                                                    -1-  
                                                                    ==>  
                                                                    ==>  

Branches:

-1-	Status	Tests
1	Covered	T13,T20,T21
0	Covered	T1,T2,T3

528            assign dio_out_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b0 :
                                                                                  -1-  
                                                                                  ==>  
529                                         (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                  -2-  
                                                                                  ==>  
530                                         (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_out[k];
                                                                                  -3-  
                                                                                  ==>  
                                                                                  ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

532            assign dio_oe_retreg_d[k] = (reg2hw.dio_pad_sleep_mode[k].q == 0) ? 1'b1 :
                                                                                 -1-  
                                                                                 ==>  
533                                        (reg2hw.dio_pad_sleep_mode[k].q == 1) ? 1'b1 :
                                                                                 -2-  
                                                                                 ==>  
534                                        (reg2hw.dio_pad_sleep_mode[k].q == 2) ? 1'b0 : dio_oe[k];
                                                                                 -3-  
                                                                                 ==>  
                                                                                 ==>  

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Covered	T69
0	0	1	Covered	T1,T2,T3
0	0	0	Not Covered

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Covered	T5,T82,T83
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Not Covered
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Covered	T28,T69
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Covered	T69
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Not Covered
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Covered	T26,T27
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Covered	T69
0	Covered	T1,T2,T3

591            assign pin_value = (reg2hw.wkup_detector[k].miodio.q)           ?
                                                                               -1-  
                                                                               ==>  
                                                                               ==>  

Branches:

-1-	Status	Tests
1	Not Covered
0	Covered	T1,T2,T3

162            if (!rst_ni) begin
               -1-  
163              dio_pad_attr_q <= '0;
                 ==>
164              mio_pad_attr_q <= '0;
165            end else begin
166              // dedicated pads
167              for (int kk = 0; kk < NDioPads; kk++) begin
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

423            if (!rst_ni) begin
               -1-  
424              sleep_en_q       <= 1'b0;
                 ==>
425              mio_out_retreg_q <= '0;
426              mio_oe_retreg_q  <= '0;
427              dio_out_retreg_q <= '0;
428              dio_oe_retreg_q  <= '0;
429            end else begin
430              sleep_en_q <= sleep_en_i;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

553                if (prim_mubi_pkg::mubi4_test_true_strict(scanmode_i)) begin
                   -1-  
554                  dio_wkup_no_scan[k] = 1'b0;
                     ==>
555                end
                   MISSING_ELSE
                   ==>

Branches:

-1-	Status	Tests
1	Not Covered
0	Covered	T13,T5,T14

---

Assert Coverage for Module : pinmux

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	25	25	100.00	23	92.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	25	25	100.00	23	92.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
AlertsKnown_A	123557908	122892284	0	0
AonWkupReqKnownO_A	1451211	1258188	0	0
DftJtagTckKnown_A	123557908	122892284	0	0
DftJtagTmsKnown_A	123557908	122892284	0	0
DftJtagTrstKnown_A	123557908	122892284	0	0
DftStrapsKnown_A	123557908	122892284	0	0
DioKnownO_A	123557908	122892284	0	0
DioOeKnownO_A	123557908	122892284	0	0
FpvSecCmBusIntegrity_A	123557908	0	0	0
FpvSecCmRegWeOnehotCheck_A	123557908	4	0	0
LcJtagTckKnown_A	123557908	122892284	0	0
LcJtagTmsKnown_A	123557908	122892284	0	0
LcJtagTrstKnown_A	123557908	122892284	0	0
MioKnownO_A	123557908	122892284	0	0
MioOeKnownO_A	123557908	122892284	0	0
PinmuxWkupStable_A	1451211	5651	0	0
PwrMgrStrapSampleOnce0_A	123557908	1674	0	0
PwrMgrStrapSampleOnce1_A	123557908	0	0	969
RvJtagTckKnown_A	123557908	122892284	0	0
RvJtagTmsKnown_A	123557908	122892284	0	0
RvJtagTrstKnown_A	123557908	122892284	0	0
TlAReadyKnownO_A	123557908	122892284	0	0
TlDValidKnownO_A	123557908	122892284	0	0
UsbWakeDetectActiveKnownO_A	1451211	1258188	0	0
UsbWkupReqKnownO_A	1451211	1258188	0	0

AlertsKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

AonWkupReqKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1451211	1258188	0	0
T1	342	169	0	0
T2	404	231	0	0
T3	325	153	0	0
T4	359	185	0	0
T5	558	386	0	0
T7	385	211	0	0
T10	434	262	0	0
T13	404	232	0	0
T106	344	170	0	0
T107	353	181	0	0

DftJtagTckKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

DftJtagTmsKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

DftJtagTrstKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

DftStrapsKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

DioKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

DioOeKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

FpvSecCmBusIntegrity_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	0	0	0

FpvSecCmRegWeOnehotCheck_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	4	0	0
T108	39628	1	0	0
T109	0	1	0	0
T110	0	1	0	0
T111	0	1	0	0
T112	104757	0	0	0
T113	67272	0	0	0
T114	55163	0	0	0
T115	278553	0	0	0
T116	34654	0	0	0
T117	57513	0	0	0
T118	34549	0	0	0
T119	45774	0	0	0
T120	142840	0	0	0

LcJtagTckKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

LcJtagTmsKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

LcJtagTrstKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

MioKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

MioOeKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

PinmuxWkupStable_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1451211	5651	0	0
T5	558	73	0	0
T6	382	0	0	0
T14	499	0	0	0
T26	939	511	0	0
T27	0	567	0	0
T29	490	22	0	0
T34	457	0	0	0
T36	341	0	0	0
T44	704	0	0	0
T72	717	0	0	0
T75	0	23	0	0
T76	0	25	0	0
T77	0	677	0	0
T82	0	72	0	0
T94	0	704	0	0
T107	353	0	0	0
T121	0	23	0	0

PwrMgrStrapSampleOnce0_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	1674	0	0
T1	10888	1	0	0
T2	16385	1	0	0
T3	19587	1	0	0
T4	21123	1	0	0
T5	35865	1	0	0
T7	20821	1	0	0
T10	27421	1	0	0
T13	22056	1	0	0
T106	22328	1	0	0
T107	20852	1	0	0

PwrMgrStrapSampleOnce1_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	0	0	969

RvJtagTckKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

RvJtagTmsKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

RvJtagTrstKnown_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

TlAReadyKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

TlDValidKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	123557908	122892284	0	0
T1	10888	10504	0	0
T2	16385	16041	0	0
T3	19587	18666	0	0
T4	21123	20381	0	0
T5	35865	35437	0	0
T7	20821	20229	0	0
T10	27421	26834	0	0
T13	22056	21473	0	0
T106	22328	21339	0	0
T107	20852	20097	0	0

UsbWakeDetectActiveKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1451211	1258188	0	0
T1	342	169	0	0
T2	404	231	0	0
T3	325	153	0	0
T4	359	185	0	0
T5	558	386	0	0
T7	385	211	0	0
T10	434	262	0	0
T13	404	232	0	0
T106	344	170	0	0
T107	353	181	0	0

UsbWkupReqKnownO_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1451211	1258188	0	0
T1	342	169	0	0
T2	404	231	0	0
T3	325	153	0	0
T4	359	185	0	0
T5	558	386	0	0
T7	385	211	0	0
T10	434	262	0	0
T13	404	232	0	0
T106	344	170	0	0
T107	353	181	0	0