Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142295	1			T91	7		T92	7		T93	99
values[2]	10362	1			T475	1		T537	1		T526	1
values[3]	3848	1			T561	48		T499	37		T636	141
values[4]	2119	1			T561	9		T499	15		T636	104
values[5]	1288	1			T499	7		T636	30		T677	7
values[6]	831	1			T499	7		T636	9		T677	5
values[7]	732	1			T499	14		T636	5		T677	9
values[8]	562	1			T499	14		T677	8		T842	8
values[9]	456	1			T499	6		T677	4		T842	5
values[10]	463	1			T499	2		T677	7		T842	11
values[11]	432	1			T499	13		T677	5		T842	5
values[12]	382	1			T499	15		T677	6		T842	4
values[13]	437	1			T499	6		T677	3		T842	6
values[14]	371	1			T499	11		T677	6		T842	9
values[15]	368	1			T499	6		T677	6		T842	11
values[16]	344	1			T499	2		T677	9		T842	10
values[17]	306	1			T499	4		T677	11		T842	7
values[18]	388	1			T499	13		T677	16		T842	5
values[19]	327	1			T499	7		T677	9		T842	12
values[20]	330	1			T499	7		T677	2		T842	5
values[21]	376	1			T499	14		T677	5		T842	8
values[22]	319	1			T499	5		T677	2		T842	6
values[23]	298	1			T499	8		T677	7		T842	3
values[24]	305	1			T499	7		T677	8		T842	6
values[25]	342	1			T499	5		T677	4		T842	6
values[26]	324	1			T499	9		T677	6		T842	8
values[27]	364	1			T499	15		T677	3		T842	11
values[28]	278	1			T499	7		T677	5		T842	5
values[29]	300	1			T499	4		T677	5		T842	7
values[30]	282	1			T499	4		T677	6		T842	12
values[31]	261	1			T499	5		T677	4		T842	6
values[32]	343	1			T499	9		T677	6		T842	14
values[33]	271	1			T499	3		T677	5		T842	3
values[34]	284	1			T499	13		T677	4		T842	9
values[35]	310	1			T499	4		T677	3		T842	5
values[36]	318	1			T499	4		T677	6		T842	7
values[37]	275	1			T499	5		T677	2		T842	10
values[38]	289	1			T499	13		T677	4		T842	5
values[39]	248	1			T499	8		T677	4		T842	8
values[40]	318	1			T499	12		T677	7		T842	8
values[41]	296	1			T499	9		T677	7		T842	5
values[42]	294	1			T499	6		T677	5		T842	4
values[43]	324	1			T499	6		T677	10		T842	9
values[44]	249	1			T499	3		T677	11		T842	8
values[45]	313	1			T499	19		T677	7		T842	4
values[46]	344	1			T499	26		T677	9		T842	4
values[47]	264	1			T499	10		T677	7		T842	5
values[48]	266	1			T499	7		T677	5		T842	8
values[49]	281	1			T499	11		T677	5		T842	10
values[50]	271	1			T499	4		T677	7		T842	15
values[51]	284	1			T499	8		T677	5		T842	17
values[52]	264	1			T499	4		T677	3		T842	8
values[53]	256	1			T499	13		T677	2		T842	3
values[54]	245	1			T499	6		T677	5		T842	14
values[55]	251	1			T499	4		T677	6		T842	2
values[56]	256	1			T499	10		T677	7		T842	5
values[57]	286	1			T499	19		T677	2		T842	5
values[58]	253	1			T499	12		T677	3		T842	6
values[59]	233	1			T499	5		T677	5		T842	4
values[60]	192	1			T677	7		T842	6		T486	1
values[61]	221	1			T677	5		T842	4		T486	1
values[62]	161	1			T677	3		T842	3		T486	1
values[63]	165	1			T677	3		T842	7		T486	1
values[64]	139	1			T677	5		T842	15		T486	1
values[65]	139	1			T677	5		T842	4		T486	1
values[66]	129	1			T677	5		T842	7		T486	1
values[67]	121	1			T677	4		T842	9		T486	1
values[68]	112	1			T677	11		T842	7		T486	1
values[69]	97	1			T677	21		T842	5		T486	1
values[70]	71	1			T677	22		T486	1		T860	6
values[71]	78	1			T677	26		T486	1		T860	8
values[72]	84	1			T677	15		T486	1		T860	7
values[73]	65	1			T677	18		T486	1		T860	1
values[74]	62	1			T677	13		T486	1		T812	1
values[75]	61	1			T677	5		T486	1		T812	1
values[76]	60	1			T677	8		T486	1		T812	1
values[77]	71	1			T677	21		T486	1		T812	1
values[78]	66	1			T677	16		T486	1		T812	1
values[79]	74	1			T677	29		T486	1		T812	1
values[80]	51	1			T677	17		T486	1		T812	1
values[81]	54	1			T677	7		T486	1		T812	1
values[82]	60	1			T677	10		T486	1		T812	1
values[83]	62	1			T677	17		T486	1		T812	1
values[84]	70	1			T677	16		T486	1		T812	1
values[85]	47	1			T677	6		T486	1		T812	1
values[86]	55	1			T677	19		T486	1		T812	1
values[87]	72	1			T677	14		T486	1		T812	1
values[88]	54	1			T677	15		T486	1		T812	1
values[89]	77	1			T677	18		T486	1		T812	1
values[90]	79	1			T677	18		T486	1		T812	1
values[91]	70	1			T677	10		T486	1		T812	1
values[92]	72	1			T677	12		T486	1		T812	1
values[93]	68	1			T677	15		T486	1		T812	1
values[94]	74	1			T677	13		T486	1		T812	1
values[95]	58	1			T677	15		T486	1		T812	1
values[96]	61	1			T677	14		T486	1		T812	1
values[97]	58	1			T677	11		T486	1		T812	1
values[98]	53	1			T677	11		T486	2		T812	1
values[99]	56	1			T677	7		T486	5		T812	1
values[100]	64	1			T677	18		T486	9		T812	1
values[101]	61	1			T677	7		T486	4		T812	1
values[102]	59	1			T677	4		T486	5		T812	1
values[103]	65	1			T677	1		T486	1		T812	1
values[104]	43	1			T677	4		T486	2		T812	1
values[105]	42	1			T677	5		T486	3		T812	1
values[106]	50	1			T677	6		T486	2		T812	7
values[107]	59	1			T677	8		T486	2		T812	2
values[108]	67	1			T677	14		T486	3		T812	2
values[109]	67	1			T677	3		T486	1		T812	3
values[110]	35	1			T486	1		T812	2		T856	1
values[111]	68	1			T486	2		T812	5		T856	1
values[112]	64	1			T486	1		T812	4		T856	1
values[113]	58	1			T486	2		T812	1		T856	1
values[114]	60	1			T486	1		T812	4		T856	1
values[115]	60	1			T486	1		T812	4		T856	1
values[116]	47	1			T486	1		T812	1		T856	1
values[117]	56	1			T486	2		T812	3		T856	1
values[118]	43	1			T486	1		T812	3		T856	1
values[119]	48	1			T486	4		T812	1		T856	3
values[120]	43	1			T486	1		T812	3		T856	1
values[121]	48	1			T486	1		T812	2		T856	2
values[122]	44	1			T486	2		T812	1		T856	2
values[123]	46	1			T486	2		T812	4		T856	3
values[124]	37	1			T486	1		T812	1		T856	1
values[125]	49	1			T486	1		T812	1		T856	1
values[126]	70	1			T486	1		T812	3		T856	1
values[127]	742	1			T486	34		T812	38		T856	45
values[128]	7626	1			T486	332		T812	346		T856	383