SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.01 | 85.01 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.20 | 85.20 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9361 | 85.01 |
Total Bits 0->1 | 5506 | 4695 | 85.27 |
Total Bits 1->0 | 5506 | 4666 | 84.74 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9361 | 85.01 |
Port Bits 0->1 | 5506 | 4695 | 85.27 |
Port Bits 1->0 | 5506 | 4666 | 84.74 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T152,T190,T191 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T96,*T97,*T98 | Yes | T96,T97,T98 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T99,*T38,*T100 | Yes | T99,T38,T100 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T38,T101,T102 | Yes | T38,T101,T102 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T100,*T192,*T193 | Yes | T100,T192,T193 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T39,*T194,*T61 | Yes | T39,T194,T195 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T96,*T97,*T98 | Yes | T96,T97,T98 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T71,*T96,*T97 | Yes | T71,T96,T97 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T99,*T38,*T100 | Yes | T99,T38,T100 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T38,T101,T102 | Yes | T38,T101,T102 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T5 | Yes | T1,T3,T5 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T3,T5 | Yes | T45,T46,T86 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T71,T96,T98 | Yes | T71,T96,T97 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T98 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T5 | Yes | T45,T46,T86 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T96,T98,T103 | Yes | T96,T97,T98 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T71,T98,T103 | Yes | T71,T96,T97 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T5 | Yes | T45,T46,T86 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T131,T196,T197 | Yes | T131,T196,T197 | OUTPUT |
intr_otp_error_o | Yes | Yes | T131,T196,T197 | Yes | T131,T196,T197 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T198,T80,T104 | Yes | T198,T80,T104 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T45,T29,T30 | Yes | T45,T29,T30 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T80,T104,T199 | Yes | T80,T104,T199 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T198,T80,T104 | Yes | T198,T80,T104 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T45,T29,T30 | Yes | T45,T29,T30 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T80,T104,T199 | Yes | T80,T104,T199 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T161,T15,T162 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T45,T39,T36 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T61,T200 | INPUT | |
lc_otp_vendor_test_i.ctrl[3:2] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[16:4] | No | No | Yes | T61,T201,T200 | INPUT | |
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[20:18] | No | No | Yes | T201,T61,T200 | INPUT | |
lc_otp_vendor_test_i.ctrl[22:21] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:23] | No | No | Yes | T61,T201,T200 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[0] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[1] | No | No | No | INPUT | ||
lc_otp_program_i.count[10:2] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[11] | No | No | No | INPUT | ||
lc_otp_program_i.count[12] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[14:13] | No | No | No | INPUT | ||
lc_otp_program_i.count[17:15] | Yes | Yes | T36,T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[18] | No | No | No | INPUT | ||
lc_otp_program_i.count[23:19] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[24] | No | No | No | INPUT | ||
lc_otp_program_i.count[31:25] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT |
lc_otp_program_i.count[32] | No | No | No | INPUT | ||
lc_otp_program_i.count[34:33] | Yes | Yes | *T124,T36,T202 | Yes | T203,T165,T204 | INPUT |
lc_otp_program_i.count[35] | No | No | No | INPUT | ||
lc_otp_program_i.count[36] | Yes | Yes | *T198,*T205 | Yes | T198,T205 | INPUT |
lc_otp_program_i.count[37] | No | No | No | INPUT | ||
lc_otp_program_i.count[54:38] | Yes | Yes | *T198,*T205,*T124 | Yes | T198,T205,T203 | INPUT |
lc_otp_program_i.count[55] | No | No | No | INPUT | ||
lc_otp_program_i.count[57:56] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT |
lc_otp_program_i.count[58] | No | No | No | INPUT | ||
lc_otp_program_i.count[60:59] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT |
lc_otp_program_i.count[61] | No | No | No | INPUT | ||
lc_otp_program_i.count[66:62] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT |
lc_otp_program_i.count[67] | No | No | No | INPUT | ||
lc_otp_program_i.count[77:68] | Yes | Yes | *T124,*T36,*T202 | Yes | T198,T203,T165 | INPUT |
lc_otp_program_i.count[78] | No | No | No | INPUT | ||
lc_otp_program_i.count[79] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[80] | No | No | No | INPUT | ||
lc_otp_program_i.count[100:81] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.count[101] | No | No | No | INPUT | ||
lc_otp_program_i.count[102] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[103] | No | No | No | INPUT | ||
lc_otp_program_i.count[111:104] | Yes | Yes | *T2,*T4,*T124 | Yes | T203,T206,T207 | INPUT |
lc_otp_program_i.count[112] | No | No | No | INPUT | ||
lc_otp_program_i.count[121:113] | Yes | Yes | T36,T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[122] | No | No | No | INPUT | ||
lc_otp_program_i.count[125:123] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[126] | No | No | No | INPUT | ||
lc_otp_program_i.count[133:127] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[134] | No | No | No | INPUT | ||
lc_otp_program_i.count[140:135] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[142] | Yes | Yes | *T198,*T205 | Yes | T198,T205 | INPUT |
lc_otp_program_i.count[143] | No | No | No | INPUT | ||
lc_otp_program_i.count[148:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[149] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:150] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:154] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[162] | No | No | No | INPUT | ||
lc_otp_program_i.count[165:163] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[166] | No | No | No | INPUT | ||
lc_otp_program_i.count[168:167] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[169] | No | No | No | INPUT | ||
lc_otp_program_i.count[175:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[176] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:177] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[180] | No | No | No | INPUT | ||
lc_otp_program_i.count[189:181] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[190] | No | No | No | INPUT | ||
lc_otp_program_i.count[201:191] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[202] | No | No | No | INPUT | ||
lc_otp_program_i.count[207:203] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT |
lc_otp_program_i.count[208] | No | No | No | INPUT | ||
lc_otp_program_i.count[242:209] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[243] | No | No | No | INPUT | ||
lc_otp_program_i.count[262:244] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[267:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[268] | No | No | No | INPUT | ||
lc_otp_program_i.count[270:269] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[271] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:272] | Yes | Yes | T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.count[274] | No | No | No | INPUT | ||
lc_otp_program_i.count[282:275] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | ||
lc_otp_program_i.count[303:285] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[304] | No | No | No | INPUT | ||
lc_otp_program_i.count[310:305] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[311] | No | No | No | INPUT | ||
lc_otp_program_i.count[316:312] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:318] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT |
lc_otp_program_i.count[336:334] | No | No | No | INPUT | ||
lc_otp_program_i.count[344:337] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT |
lc_otp_program_i.count[345] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:346] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[356:352] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT |
lc_otp_program_i.count[357] | No | No | No | INPUT | ||
lc_otp_program_i.count[363:358] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[364] | No | No | No | INPUT | ||
lc_otp_program_i.count[370:365] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[372:371] | No | No | No | INPUT | ||
lc_otp_program_i.count[373] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT |
lc_otp_program_i.count[374] | No | No | No | INPUT | ||
lc_otp_program_i.count[381:375] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.count[382] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | INPUT |
lc_otp_program_i.state[0] | No | No | No | INPUT | ||
lc_otp_program_i.state[4:1] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[5] | No | No | No | INPUT | ||
lc_otp_program_i.state[9:6] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[10] | No | No | No | INPUT | ||
lc_otp_program_i.state[12:11] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[13] | No | No | No | INPUT | ||
lc_otp_program_i.state[16:14] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[18:17] | No | No | No | INPUT | ||
lc_otp_program_i.state[30:19] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T203,T165 | INPUT |
lc_otp_program_i.state[31] | No | No | No | INPUT | ||
lc_otp_program_i.state[44:32] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T198 | INPUT |
lc_otp_program_i.state[45] | No | No | No | INPUT | ||
lc_otp_program_i.state[48:46] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[49] | No | No | No | INPUT | ||
lc_otp_program_i.state[51:50] | Yes | Yes | T124,T36,T29 | Yes | T29,T60,T203 | INPUT |
lc_otp_program_i.state[52] | No | No | No | INPUT | ||
lc_otp_program_i.state[55:53] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T198 | INPUT |
lc_otp_program_i.state[56] | No | No | No | INPUT | ||
lc_otp_program_i.state[72:57] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[73] | No | No | No | INPUT | ||
lc_otp_program_i.state[74] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | INPUT |
lc_otp_program_i.state[75] | No | No | No | INPUT | ||
lc_otp_program_i.state[79:76] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[81:80] | No | No | No | INPUT | ||
lc_otp_program_i.state[88:82] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[89] | No | No | No | INPUT | ||
lc_otp_program_i.state[96:90] | Yes | Yes | *T198,*T205,*T124 | Yes | T198,T205,T29 | INPUT |
lc_otp_program_i.state[97] | No | No | No | INPUT | ||
lc_otp_program_i.state[109:98] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[110] | No | No | No | INPUT | ||
lc_otp_program_i.state[138:111] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[139] | No | No | No | INPUT | ||
lc_otp_program_i.state[140] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | INPUT |
lc_otp_program_i.state[141] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:142] | Yes | Yes | T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[146] | No | No | No | INPUT | ||
lc_otp_program_i.state[148:147] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[152:150] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[153] | No | No | No | INPUT | ||
lc_otp_program_i.state[155:154] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT |
lc_otp_program_i.state[156] | No | No | No | INPUT | ||
lc_otp_program_i.state[162:157] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[163] | No | No | No | INPUT | ||
lc_otp_program_i.state[167:164] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[168] | No | No | No | INPUT | ||
lc_otp_program_i.state[177:169] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[178] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:179] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[198:190] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[199] | No | No | No | INPUT | ||
lc_otp_program_i.state[201:200] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT |
lc_otp_program_i.state[202] | No | No | No | INPUT | ||
lc_otp_program_i.state[247:203] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[248] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:249] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[278:254] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[279] | No | No | No | INPUT | ||
lc_otp_program_i.state[290:280] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT |
lc_otp_program_i.state[291] | No | No | No | INPUT | ||
lc_otp_program_i.state[300:292] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[301] | No | No | No | INPUT | ||
lc_otp_program_i.state[303:302] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[304] | No | No | No | INPUT | ||
lc_otp_program_i.state[317:305] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT |
lc_otp_program_i.state[319:318] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T36,T29,T30 | Yes | T36,T29,T30 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T36,T29,T30 | Yes | T36,T29,T30 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T45,T39,T46 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T39,T46 | Yes | T1,T3,T5 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T45,T46,T86 | Yes | T1,T3,T5 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T45,T86,T87 | Yes | T45,T29,T30 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T29,T30,T60 | Yes | T36,T29,T30 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T46,T212,T213 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T39,T30,T86 | Yes | T2,T4,T25 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T29,T30,T46 | Yes | T2,T3,T7 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT |
otp_lc_data_o.count[0] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[1] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[10:2] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[12] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[14:13] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[17:15] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23:19] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[31:25] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[32] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[34:33] | Yes | Yes | *T124,*T36,*T202 | Yes | T203,T165,T204 | OUTPUT |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[54:38] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[57:56] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[60:59] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[66:62] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[77:68] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[79] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[80] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[100:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[102] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[111:104] | Yes | Yes | *T2,*T4,*T124 | Yes | T203,T206,T207 | OUTPUT |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[121:113] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[125:123] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[133:127] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140:135] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[142] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[143] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[148:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:150] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:154] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[165:163] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[166] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[168:167] | Yes | Yes | T36,T202,T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[169] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[175:170] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:177] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[189:181] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[201:191] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[207:203] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[242:209] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262:244] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[267:264] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT |
otp_lc_data_o.count[268] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[270:269] | Yes | Yes | *T45,*T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[282:275] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[303:285] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[310:305] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316:312] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:318] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[336:334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[344:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[345] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:346] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[356:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[363:358] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[370:365] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT |
otp_lc_data_o.count[372:371] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[373] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[381:375] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[4:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[9:6] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[12:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[16:14] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[18:17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[30:19] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T203,T165 | OUTPUT |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[44:32] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[48:46] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[51:50] | Yes | Yes | T124,T36,T29 | Yes | T29,T60,T203 | OUTPUT |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[55:53] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[72:57] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[74] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | OUTPUT |
otp_lc_data_o.state[75] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[79:76] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[81:80] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[88:82] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[96:90] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[109:98] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138:111] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[140] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148:147] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152:150] | Yes | Yes | T36,T29,T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[155:154] | Yes | Yes | *T124,*T36,T29 | Yes | T29,T60,T208 | OUTPUT |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167:164] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[177:169] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:179] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[198:190] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[201:200] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[247:203] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:249] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278:254] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[290:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[300:292] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[301] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[303:302] | Yes | Yes | *T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[304] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[317:305] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT |
otp_lc_data_o.state[319:318] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T45,T86,T87 | Yes | T45,T29,T30 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T3,T5,T7 | Yes | T45,T46,T86 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T45,T198,T212 | Yes | T3,T7,T6 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T156,T217,T218 | Yes | T156,T217,T218 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T156,T217,T219 | Yes | T156,T217,T219 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T220,T221,T222 | Yes | T220,T221,T222 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T156,T217,T218 | Yes | T156,T217,T218 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T156,T217,T219 | Yes | T156,T217,T219 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T224,T152,T190 | Yes | T224,T152,T190 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T224,T152,T190 | Yes | T224,T152,T190 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T5,T6 | Yes | T45,T30,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:73] | Yes | Yes | *T225,*T226,*T227 | Yes | T225,T226,T227 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[171:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[185:173] | Yes | Yes | *T226,*T1,*T2 | Yes | T226,T45,T39 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[186] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:187] | Yes | Yes | *T225,*T1,*T2 | Yes | T225,T45,T39 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[201:195] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[202] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:203] | Yes | Yes | *T228,*T165,*T220 | Yes | T228,T165,T220 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[230:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[232:231] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:233] | Yes | Yes | *T228,*T165,*T220 | Yes | T228,T165,T220 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T5 | Yes | T45,T29,T208 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T2,T19,T40 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T45,T46,T86 | Yes | T1,T3,T5 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9360 | 85.20 |
Total Bits 0->1 | 5493 | 4694 | 85.45 |
Total Bits 1->0 | 5493 | 4666 | 84.94 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9360 | 85.20 |
Port Bits 0->1 | 5493 | 4694 | 85.45 |
Port Bits 1->0 | 5493 | 4666 | 84.94 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T152,T190,T191 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T96,*T97,*T98 | Yes | T96,T97,T98 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T99,*T38,*T100 | Yes | T99,T38,T100 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T38,T101,T102 | Yes | T38,T101,T102 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T100,*T192,*T193 | Yes | T100,T192,T193 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T97,T98,T103 | Yes | T97,T98,T103 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T39,*T194,*T61 | Yes | T39,T194,T195 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T96,*T97,*T98 | Yes | T96,T97,T98 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T71,*T96,*T97 | Yes | T71,T96,T97 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T99,*T38,*T100 | Yes | T99,T38,T100 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T38,T101,T102 | Yes | T38,T101,T102 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T5 | Yes | T1,T3,T5 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T3,T5 | Yes | T45,T46,T86 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T71,T96,T98 | Yes | T71,T96,T97 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T98 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T5 | Yes | T45,T46,T86 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T96,T98,T103 | Yes | T96,T97,T98 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T71,T98,T103 | Yes | T71,T96,T97 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T96,T97,T98 | Yes | T96,T97,T98 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T5 | Yes | T45,T46,T86 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T71,T96,T97 | Yes | T71,T96,T97 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T131,T196,T197 | Yes | T131,T196,T197 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T131,T196,T197 | Yes | T131,T196,T197 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T198,T80,T104 | Yes | T198,T80,T104 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T45,T29,T30 | Yes | T45,T29,T30 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T80,T104,T199 | Yes | T80,T104,T199 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T104,T105,T106 | Yes | T104,T105,T106 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T198,T80,T104 | Yes | T198,T80,T104 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T45,T29,T30 | Yes | T45,T29,T30 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T80,T104,T199 | Yes | T80,T104,T199 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T80,T104,T105 | Yes | T80,T104,T105 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T161,T15,T162 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T45,T39,T36 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T61,T200 | INPUT | ||
lc_otp_vendor_test_i.ctrl[3:2] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[16:4] | No | No | Yes | T61,T201,T200 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[20:18] | No | No | Yes | T201,T61,T200 | INPUT | ||
lc_otp_vendor_test_i.ctrl[22:21] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:23] | No | No | Yes | T61,T201,T200 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[0] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[1] | No | No | No | INPUT | |||
lc_otp_program_i.count[10:2] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[11] | No | No | No | INPUT | |||
lc_otp_program_i.count[12] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[14:13] | No | No | No | INPUT | |||
lc_otp_program_i.count[17:15] | Yes | Yes | T36,T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[18] | No | No | No | INPUT | |||
lc_otp_program_i.count[23:19] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[24] | No | No | No | INPUT | |||
lc_otp_program_i.count[31:25] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT | |
lc_otp_program_i.count[32] | No | No | No | INPUT | |||
lc_otp_program_i.count[34:33] | Yes | Yes | *T124,T36,T202 | Yes | T203,T165,T204 | INPUT | |
lc_otp_program_i.count[35] | No | No | No | INPUT | |||
lc_otp_program_i.count[36] | Yes | Yes | *T198,*T205 | Yes | T198,T205 | INPUT | |
lc_otp_program_i.count[37] | No | No | No | INPUT | |||
lc_otp_program_i.count[54:38] | Yes | Yes | *T198,*T205,*T124 | Yes | T198,T205,T203 | INPUT | |
lc_otp_program_i.count[55] | No | No | No | INPUT | |||
lc_otp_program_i.count[57:56] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT | |
lc_otp_program_i.count[58] | No | No | No | INPUT | |||
lc_otp_program_i.count[60:59] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT | |
lc_otp_program_i.count[61] | No | No | No | INPUT | |||
lc_otp_program_i.count[66:62] | Yes | Yes | *T124,T36,T202 | Yes | T198,T203,T165 | INPUT | |
lc_otp_program_i.count[67] | No | No | No | INPUT | |||
lc_otp_program_i.count[77:68] | Yes | Yes | *T124,*T36,*T202 | Yes | T198,T203,T165 | INPUT | |
lc_otp_program_i.count[78] | No | No | No | INPUT | |||
lc_otp_program_i.count[79] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[80] | No | No | No | INPUT | |||
lc_otp_program_i.count[100:81] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.count[101] | No | No | No | INPUT | |||
lc_otp_program_i.count[102] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[103] | No | No | No | INPUT | |||
lc_otp_program_i.count[111:104] | Yes | Yes | *T2,*T4,*T124 | Yes | T203,T206,T207 | INPUT | |
lc_otp_program_i.count[112] | No | No | No | INPUT | |||
lc_otp_program_i.count[121:113] | Yes | Yes | T36,T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[122] | No | No | No | INPUT | |||
lc_otp_program_i.count[125:123] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[126] | No | No | No | INPUT | |||
lc_otp_program_i.count[133:127] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[134] | No | No | No | INPUT | |||
lc_otp_program_i.count[140:135] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[142] | Yes | Yes | *T198,*T205 | Yes | T198,T205 | INPUT | |
lc_otp_program_i.count[143] | No | No | No | INPUT | |||
lc_otp_program_i.count[148:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[149] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:150] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:154] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[162] | No | No | No | INPUT | |||
lc_otp_program_i.count[165:163] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[166] | No | No | No | INPUT | |||
lc_otp_program_i.count[168:167] | Yes | Yes | T36,T202,T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[169] | No | No | No | INPUT | |||
lc_otp_program_i.count[175:170] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[176] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:177] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[180] | No | No | No | INPUT | |||
lc_otp_program_i.count[189:181] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[190] | No | No | No | INPUT | |||
lc_otp_program_i.count[201:191] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[202] | No | No | No | INPUT | |||
lc_otp_program_i.count[207:203] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT | |
lc_otp_program_i.count[208] | No | No | No | INPUT | |||
lc_otp_program_i.count[242:209] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[243] | No | No | No | INPUT | |||
lc_otp_program_i.count[262:244] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[267:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[268] | No | No | No | INPUT | |||
lc_otp_program_i.count[270:269] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[271] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:272] | Yes | Yes | T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.count[274] | No | No | No | INPUT | |||
lc_otp_program_i.count[282:275] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[284:283] | No | No | No | INPUT | |||
lc_otp_program_i.count[303:285] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[304] | No | No | No | INPUT | |||
lc_otp_program_i.count[310:305] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[311] | No | No | No | INPUT | |||
lc_otp_program_i.count[316:312] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:318] | Yes | Yes | *T36,*T202,*T198 | Yes | T36,T202,T198 | INPUT | |
lc_otp_program_i.count[336:334] | No | No | No | INPUT | |||
lc_otp_program_i.count[344:337] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT | |
lc_otp_program_i.count[345] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:346] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[356:352] | Yes | Yes | *T198,*T205,*T1 | Yes | T198,T205,T45 | INPUT | |
lc_otp_program_i.count[357] | No | No | No | INPUT | |||
lc_otp_program_i.count[363:358] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[364] | No | No | No | INPUT | |||
lc_otp_program_i.count[370:365] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[372:371] | No | No | No | INPUT | |||
lc_otp_program_i.count[373] | Yes | Yes | *T36,*T202,*T203 | Yes | T36,T202,T203 | INPUT | |
lc_otp_program_i.count[374] | No | No | No | INPUT | |||
lc_otp_program_i.count[381:375] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.count[382] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | INPUT | |
lc_otp_program_i.state[0] | No | No | No | INPUT | |||
lc_otp_program_i.state[4:1] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[5] | No | No | No | INPUT | |||
lc_otp_program_i.state[9:6] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[10] | No | No | No | INPUT | |||
lc_otp_program_i.state[12:11] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[13] | No | No | No | INPUT | |||
lc_otp_program_i.state[16:14] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[18:17] | No | No | No | INPUT | |||
lc_otp_program_i.state[30:19] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T203,T165 | INPUT | |
lc_otp_program_i.state[31] | No | No | No | INPUT | |||
lc_otp_program_i.state[44:32] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T198 | INPUT | |
lc_otp_program_i.state[45] | No | No | No | INPUT | |||
lc_otp_program_i.state[48:46] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[49] | No | No | No | INPUT | |||
lc_otp_program_i.state[51:50] | Yes | Yes | T124,T36,T29 | Yes | T29,T60,T203 | INPUT | |
lc_otp_program_i.state[52] | No | No | No | INPUT | |||
lc_otp_program_i.state[55:53] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T198 | INPUT | |
lc_otp_program_i.state[56] | No | No | No | INPUT | |||
lc_otp_program_i.state[72:57] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[73] | No | No | No | INPUT | |||
lc_otp_program_i.state[74] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | INPUT | |
lc_otp_program_i.state[75] | No | No | No | INPUT | |||
lc_otp_program_i.state[79:76] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[81:80] | No | No | No | INPUT | |||
lc_otp_program_i.state[88:82] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[89] | No | No | No | INPUT | |||
lc_otp_program_i.state[96:90] | Yes | Yes | *T198,*T205,*T124 | Yes | T198,T205,T29 | INPUT | |
lc_otp_program_i.state[97] | No | No | No | INPUT | |||
lc_otp_program_i.state[109:98] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[110] | No | No | No | INPUT | |||
lc_otp_program_i.state[138:111] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[139] | No | No | No | INPUT | |||
lc_otp_program_i.state[140] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | INPUT | |
lc_otp_program_i.state[141] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:142] | Yes | Yes | T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[146] | No | No | No | INPUT | |||
lc_otp_program_i.state[148:147] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[152:150] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[153] | No | No | No | INPUT | |||
lc_otp_program_i.state[155:154] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT | |
lc_otp_program_i.state[156] | No | No | No | INPUT | |||
lc_otp_program_i.state[162:157] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[163] | No | No | No | INPUT | |||
lc_otp_program_i.state[167:164] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[168] | No | No | No | INPUT | |||
lc_otp_program_i.state[177:169] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[178] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:179] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[198:190] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[199] | No | No | No | INPUT | |||
lc_otp_program_i.state[201:200] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | INPUT | |
lc_otp_program_i.state[202] | No | No | No | INPUT | |||
lc_otp_program_i.state[247:203] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[248] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:249] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[278:254] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[279] | No | No | No | INPUT | |||
lc_otp_program_i.state[290:280] | Yes | Yes | *T198,*T205,*T36 | Yes | T198,T205,T36 | INPUT | |
lc_otp_program_i.state[291] | No | No | No | INPUT | |||
lc_otp_program_i.state[300:292] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[301] | No | No | No | INPUT | |||
lc_otp_program_i.state[303:302] | Yes | Yes | T36,T29,T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[304] | No | No | No | INPUT | |||
lc_otp_program_i.state[317:305] | Yes | Yes | *T36,*T29,*T202 | Yes | T36,T29,T202 | INPUT | |
lc_otp_program_i.state[319:318] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T36,T29,T30 | Yes | T36,T29,T30 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T36,T29,T30 | Yes | T36,T29,T30 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T45,T39,T46 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T39,T46 | Yes | T1,T3,T5 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T45,T46,T86 | Yes | T1,T3,T5 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T45,T86,T87 | Yes | T45,T29,T30 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T29,T30,T60 | Yes | T36,T29,T30 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T46,T212,T213 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T39,T30,T86 | Yes | T2,T4,T25 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T29,T30,T46 | Yes | T2,T3,T7 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT | |
otp_lc_data_o.count[0] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[1] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[10:2] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[12] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[14:13] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[17:15] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23:19] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[31:25] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[32] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[34:33] | Yes | Yes | *T124,*T36,*T202 | Yes | T203,T165,T204 | OUTPUT | |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[54:38] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[57:56] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[60:59] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[66:62] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[77:68] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[79] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[80] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[100:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[102] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[111:104] | Yes | Yes | *T2,*T4,*T124 | Yes | T203,T206,T207 | OUTPUT | |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[121:113] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[125:123] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[133:127] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140:135] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[142] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[143] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[148:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:150] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:154] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[165:163] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[166] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[168:167] | Yes | Yes | T36,T202,T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[169] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[175:170] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT | |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:177] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[189:181] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[201:191] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[207:203] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[242:209] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262:244] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[267:264] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT | |
otp_lc_data_o.count[268] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[270:269] | Yes | Yes | *T45,*T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:272] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[282:275] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[284:283] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[303:285] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[310:305] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316:312] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:318] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[336:334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[344:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[345] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:346] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[356:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[363:358] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[364] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[370:365] | Yes | Yes | *T29,*T30,*T60 | Yes | T29,T30,T60 | OUTPUT | |
otp_lc_data_o.count[372:371] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[373] | Yes | Yes | *T36,*T202,*T203 | Yes | T203,T204,T100 | OUTPUT | |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[381:375] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[4:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[9:6] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[12:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[16:14] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[18:17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[30:19] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T203,T165 | OUTPUT | |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[44:32] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[48:46] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[51:50] | Yes | Yes | T124,T36,T29 | Yes | T29,T60,T203 | OUTPUT | |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[55:53] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[72:57] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[74] | Yes | Yes | *T124,*T36,*T29 | Yes | T29,T60,T208 | OUTPUT | |
otp_lc_data_o.state[75] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[79:76] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[81:80] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[88:82] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[96:90] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[109:98] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138:111] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[140] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148:147] | Yes | Yes | *T124,T36,T29 | Yes | T29,T60,T208 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152:150] | Yes | Yes | T36,T29,T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[155:154] | Yes | Yes | *T124,*T36,T29 | Yes | T29,T60,T208 | OUTPUT | |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167:164] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[177:169] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:179] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[198:190] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[201:200] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[247:203] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:249] | Yes | Yes | *T36,T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278:254] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[290:280] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[300:292] | Yes | Yes | *T45,*T39,*T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[301] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[303:302] | Yes | Yes | *T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[304] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[317:305] | Yes | Yes | *T36,*T29,*T202 | Yes | T29,T203,T204 | OUTPUT | |
otp_lc_data_o.state[319:318] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T45,T86,T87 | Yes | T45,T29,T30 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T3,T5,T7 | Yes | T45,T46,T86 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T39,T214,T215 | Yes | T39,T216,T203 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T45,T198,T212 | Yes | T3,T7,T6 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T156,T217,T218 | Yes | T156,T217,T218 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T156,T217,T219 | Yes | T156,T217,T219 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T220,T221,T222 | Yes | T220,T221,T222 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T156,T217,T218 | Yes | T156,T217,T218 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T156,T217,T219 | Yes | T156,T217,T219 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T224,T152,T190 | Yes | T224,T152,T190 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T45,T39,T46 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T125,T26 | Yes | T2,T4,T5 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T7,T6,T107 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T224,T152,T190 | Yes | T224,T152,T190 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T3,T5,T6 | Yes | T45,T30,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:73] | Yes | Yes | *T225,*T226,*T227 | Yes | T225,T226,T227 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[171:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[185:173] | Yes | Yes | *T226,*T1,*T2 | Yes | T226,T45,T39 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[186] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:187] | Yes | Yes | *T225,*T1,*T2 | Yes | T225,T45,T39 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[201:195] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[202] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:203] | Yes | Yes | *T228,*T165,*T220 | Yes | T228,T165,T220 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[230:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[232:231] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:233] | Yes | Yes | *T228,*T165,*T220 | Yes | T228,T165,T220 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T5 | Yes | T45,T29,T208 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T45,T39,T29 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T45,T39,T29 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T45,T46,T86 | Yes | T1,T3,T5 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |