SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.99 | 84.99 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.18 | 85.18 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9359 | 84.99 |
Total Bits 0->1 | 5506 | 4687 | 85.13 |
Total Bits 1->0 | 5506 | 4672 | 84.85 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9359 | 84.99 |
Port Bits 0->1 | 5506 | 4687 | 85.13 |
Port Bits 1->0 | 5506 | 4672 | 84.85 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T182,T183,T184 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T35,*T94,*T40 | Yes | T35,T94,T40 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T40,T95,T96 | Yes | T40,T95,T96 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T35,*T185,*T186 | Yes | T35,T185,T186 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T118,*T187,*T188 | Yes | T118,T187,T188 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T91,*T92,*T97 | Yes | T91,T92,T97 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T35,*T94,*T40 | Yes | T35,T94,T40 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T40,T95,T96 | Yes | T40,T95,T96 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T46,T47,T41 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T47,T41 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T97,T98,T162 | Yes | T91,T92,T97 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T47,T41 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T124,T189,T190 | Yes | T124,T189,T190 | OUTPUT |
intr_otp_error_o | Yes | Yes | T124,T189,T190 | Yes | T124,T189,T190 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T191,T99,T75 | Yes | T191,T99,T75 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T46,T33,T34 | Yes | T46,T33,T34 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T99,T75,T192 | Yes | T99,T75,T192 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T191,T99,T75 | Yes | T191,T99,T75 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T46,T33,T34 | Yes | T46,T33,T34 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T99,T75,T192 | Yes | T99,T75,T192 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T25,T38,T155 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[1:0] | Yes | Yes | T193 | Yes | T39,T194,T195 | INPUT |
lc_otp_vendor_test_i.ctrl[4:2] | No | No | Yes | T195,T39 | INPUT | |
lc_otp_vendor_test_i.ctrl[6:5] | Yes | Yes | T193 | Yes | T39,T194,T195 | INPUT |
lc_otp_vendor_test_i.ctrl[7] | No | No | Yes | T194,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[9:8] | Yes | Yes | T193 | Yes | T39,T193,T194 | INPUT |
lc_otp_vendor_test_i.ctrl[10] | No | No | Yes | T39,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | Yes | Yes | *T193 | Yes | T39,T194,T193 | INPUT |
lc_otp_vendor_test_i.ctrl[12] | No | No | Yes | T39,T194,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[17:13] | Yes | Yes | T193 | Yes | T39,T194,T193 | INPUT |
lc_otp_vendor_test_i.ctrl[18] | No | No | Yes | T39,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[19] | Yes | Yes | *T193 | Yes | T194,T195,T193 | INPUT |
lc_otp_vendor_test_i.ctrl[20] | No | No | Yes | T39,T194,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[21] | Yes | Yes | *T193 | Yes | T39,T193 | INPUT |
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[23] | Yes | Yes | *T193 | Yes | T39,T195,T193 | INPUT |
lc_otp_vendor_test_i.ctrl[24] | No | No | Yes | T39,T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[26:25] | Yes | Yes | T193 | Yes | T194,T193,T195 | INPUT |
lc_otp_vendor_test_i.ctrl[29:27] | No | No | Yes | T195,T39 | INPUT | |
lc_otp_vendor_test_i.ctrl[30] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | Yes | Yes | T193 | Yes | T195,T193 | INPUT |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[6:0] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[7] | No | No | No | INPUT | ||
lc_otp_program_i.count[18:8] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[26:20] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[27] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:28] | Yes | Yes | T81,T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[37:32] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[38] | No | No | No | INPUT | ||
lc_otp_program_i.count[40:39] | Yes | Yes | *T5,T81,T197 | Yes | T198,T158,T35 | INPUT |
lc_otp_program_i.count[41] | No | No | No | INPUT | ||
lc_otp_program_i.count[50:42] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | INPUT |
lc_otp_program_i.count[52:51] | No | No | No | INPUT | ||
lc_otp_program_i.count[69:53] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[70] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:71] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[90:77] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | INPUT |
lc_otp_program_i.count[91] | No | No | No | INPUT | ||
lc_otp_program_i.count[93:92] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT |
lc_otp_program_i.count[94] | No | No | No | INPUT | ||
lc_otp_program_i.count[100:95] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT |
lc_otp_program_i.count[101] | No | No | No | INPUT | ||
lc_otp_program_i.count[121:102] | Yes | Yes | *T191,*T196,*T8 | Yes | T191,T196,T8 | INPUT |
lc_otp_program_i.count[122] | No | No | No | INPUT | ||
lc_otp_program_i.count[129:123] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT |
lc_otp_program_i.count[130] | No | No | No | INPUT | ||
lc_otp_program_i.count[140:131] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[146:142] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[148:147] | No | No | No | INPUT | ||
lc_otp_program_i.count[165:149] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[167:166] | No | No | No | INPUT | ||
lc_otp_program_i.count[170:168] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[171] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:172] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[183:179] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[184] | No | No | No | INPUT | ||
lc_otp_program_i.count[187:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[188] | No | No | No | INPUT | ||
lc_otp_program_i.count[191:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[192] | No | No | No | INPUT | ||
lc_otp_program_i.count[212:193] | Yes | Yes | *T191,*T196,*T1 | Yes | T191,T196,T8 | INPUT |
lc_otp_program_i.count[213] | No | No | No | INPUT | ||
lc_otp_program_i.count[219:214] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[220] | No | No | No | INPUT | ||
lc_otp_program_i.count[233:221] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[234] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:235] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[239:238] | No | No | No | INPUT | ||
lc_otp_program_i.count[244:240] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[245] | No | No | No | INPUT | ||
lc_otp_program_i.count[250:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[251] | No | No | No | INPUT | ||
lc_otp_program_i.count[262:252] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[265:264] | Yes | Yes | *T191,*T196,*T1 | Yes | T191,T196,T8 | INPUT |
lc_otp_program_i.count[267:266] | No | No | No | INPUT | ||
lc_otp_program_i.count[269:268] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[270] | No | No | No | INPUT | ||
lc_otp_program_i.count[277:271] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[278] | No | No | No | INPUT | ||
lc_otp_program_i.count[285:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[287:286] | No | No | No | INPUT | ||
lc_otp_program_i.count[292:288] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[293] | No | No | No | INPUT | ||
lc_otp_program_i.count[300:294] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | ||
lc_otp_program_i.count[317:303] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[318] | No | No | No | INPUT | ||
lc_otp_program_i.count[320:319] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[321] | No | No | No | INPUT | ||
lc_otp_program_i.count[322] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[332:324] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[333] | No | No | No | INPUT | ||
lc_otp_program_i.count[339:334] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[340] | No | No | No | INPUT | ||
lc_otp_program_i.count[341] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.count[342] | No | No | No | INPUT | ||
lc_otp_program_i.count[343] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT |
lc_otp_program_i.count[344] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:345] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[352] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[353] | No | No | No | INPUT | ||
lc_otp_program_i.count[362:354] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[364:363] | No | No | No | INPUT | ||
lc_otp_program_i.count[368:365] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT |
lc_otp_program_i.count[370:369] | No | No | No | INPUT | ||
lc_otp_program_i.count[373:371] | Yes | Yes | T81,T197,*T191 | Yes | T81,T197,T191 | INPUT |
lc_otp_program_i.count[374] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:375] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.state[12:0] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[13] | No | No | No | INPUT | ||
lc_otp_program_i.state[18:14] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[19] | No | No | No | INPUT | ||
lc_otp_program_i.state[20] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[22:21] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:23] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[55:44] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[56] | No | No | No | INPUT | ||
lc_otp_program_i.state[60:57] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[61] | No | No | No | INPUT | ||
lc_otp_program_i.state[64:62] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T191 | INPUT |
lc_otp_program_i.state[65] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:66] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[69] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:70] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[86:84] | Yes | Yes | T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT |
lc_otp_program_i.state[89:87] | No | No | No | INPUT | ||
lc_otp_program_i.state[91:90] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T151 | INPUT |
lc_otp_program_i.state[93:92] | No | No | No | INPUT | ||
lc_otp_program_i.state[95:94] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[96] | No | No | No | INPUT | ||
lc_otp_program_i.state[97] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[98] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:99] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T151 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[130:114] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[131] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:132] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[147:146] | No | No | No | INPUT | ||
lc_otp_program_i.state[155:148] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[156] | No | No | No | INPUT | ||
lc_otp_program_i.state[160:157] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[161] | No | No | No | INPUT | ||
lc_otp_program_i.state[169:162] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[171:170] | No | No | No | INPUT | ||
lc_otp_program_i.state[183:172] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[184] | No | No | No | INPUT | ||
lc_otp_program_i.state[191:185] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT |
lc_otp_program_i.state[192] | No | No | No | INPUT | ||
lc_otp_program_i.state[198:193] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[199] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:200] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[213] | No | No | No | INPUT | ||
lc_otp_program_i.state[216:214] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[217] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:218] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[232:228] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT |
lc_otp_program_i.state[233] | No | No | No | INPUT | ||
lc_otp_program_i.state[234] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[236:235] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:237] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T41 | INPUT |
lc_otp_program_i.state[244] | No | No | No | INPUT | ||
lc_otp_program_i.state[248:245] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[249] | No | No | No | INPUT | ||
lc_otp_program_i.state[258:250] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[259] | No | No | No | INPUT | ||
lc_otp_program_i.state[270:260] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[272:271] | No | No | No | INPUT | ||
lc_otp_program_i.state[281:273] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[282] | No | No | No | INPUT | ||
lc_otp_program_i.state[289:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT |
lc_otp_program_i.state[290] | No | No | No | INPUT | ||
lc_otp_program_i.state[298:291] | Yes | Yes | *T191,*T196,*T8 | Yes | T191,T196,T8 | INPUT |
lc_otp_program_i.state[299] | No | No | No | INPUT | ||
lc_otp_program_i.state[314:300] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T33 | INPUT |
lc_otp_program_i.state[315] | No | No | No | INPUT | ||
lc_otp_program_i.state[318:316] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT |
lc_otp_program_i.state[319] | No | No | No | INPUT | ||
lc_otp_program_i.req | Yes | Yes | T33,T34,T81 | Yes | T33,T34,T81 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T33,T34,T81 | Yes | T33,T34,T81 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T46,T47,T82 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T46,T47,T41 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T46,T47,T82 | Yes | T46,T33,T34 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T33,T34,T41 | Yes | T33,T34,T81 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T25,T46,T33 | Yes | T2,T3,T4 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T4,T8 | Yes | T8,T25,T33 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T25,T46 | Yes | T2,T4,T8 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT |
otp_lc_data_o.count[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[18:8] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[26:20] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:28] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[37:32] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[40:39] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[50:42] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT |
otp_lc_data_o.count[52:51] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[69:53] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:71] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[90:77] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[93:92] | Yes | Yes | T46,T33,T34 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[100:95] | Yes | Yes | *T46,*T33,*T34 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[121:102] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[129:123] | Yes | Yes | *T46,*T33,*T34 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[130] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140:131] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[146:142] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[148:147] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[165:149] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[167:166] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[170:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[183:179] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191:189] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[212:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[219:214] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[233:221] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[234] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[239:238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[244:240] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.count[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[250:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262:252] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[267:266] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[269:268] | Yes | Yes | T33,T34,T41 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[277:271] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[285:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[287:286] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[292:288] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[293] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[300:294] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317:303] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[320:319] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[332:324] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[339:334] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[341] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.count[342] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[343] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:345] | Yes | Yes | T8,T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[352] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[353] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[362:354] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[364:363] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[368:365] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.count[370:369] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[373:371] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:375] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[12:0] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[18:14] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[20] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT |
otp_lc_data_o.state[22:21] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:23] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[55:44] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[60:57] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[64:62] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:66] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:70] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[86:84] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[89:87] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[91:90] | Yes | Yes | *T5,*T39,T33 | Yes | T33,T34,T151 | OUTPUT |
otp_lc_data_o.state[93:92] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[95:94] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[97] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:99] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T151 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[130:114] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:132] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[147:146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[155:148] | Yes | Yes | *T5,*T39,T33 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[160:157] | Yes | Yes | T8,T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[169:162] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[171:170] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[183:172] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[191:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[198:193] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:200] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[216:214] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:218] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[232:228] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[233] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[234] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[236:235] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:237] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[248:245] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[249] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[258:250] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[270:260] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[272:271] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[281:273] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[289:283] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[298:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[314:300] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T33 | OUTPUT |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[318:316] | Yes | Yes | *T39,T33,*T81 | Yes | T33,T198,T35 | OUTPUT |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | ||
otp_lc_data_o.error | Yes | Yes | T46,T47,T82 | Yes | T46,T33,T34 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T102,T103,T6 | Yes | T47,T38,T191 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T46,T82,T208 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T209,T149,T150 | Yes | T209,T149,T35 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T210,T209,T149 | Yes | T210,T209,T149 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T211,T212,T213 | Yes | T211,T212,T213 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T209,T149,T150 | Yes | T209,T149,T150 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T210,T209,T149 | Yes | T210,T209,T149 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T212,T213,T214 | Yes | T212,T213,T214 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T215,T182,T183 | Yes | T215,T182,T183 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T215,T182,T183 | Yes | T215,T182,T183 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T103 | Yes | T25,T33,T34 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[13:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:15] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:64] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:98] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[181:176] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[182] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:183] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T33,T41,T202 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T26,T21 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T46,T47,T41 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9358 | 85.18 |
Total Bits 0->1 | 5493 | 4686 | 85.31 |
Total Bits 1->0 | 5493 | 4672 | 85.05 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9358 | 85.18 |
Port Bits 0->1 | 5493 | 4686 | 85.31 |
Port Bits 1->0 | 5493 | 4672 | 85.05 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T182,T183,T184 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T35,*T94,*T40 | Yes | T35,T94,T40 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T40,T95,T96 | Yes | T40,T95,T96 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T35,*T185,*T186 | Yes | T35,T185,T186 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T118,*T187,*T188 | Yes | T118,T187,T188 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T91,*T92,*T97 | Yes | T91,T92,T97 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T35,*T94,*T40 | Yes | T35,T94,T40 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T40,T95,T96 | Yes | T40,T95,T96 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T46,T47,T41 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T47,T41 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T97,T98,T162 | Yes | T91,T92,T97 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T47,T41 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T91,T92,T97 | Yes | T91,T92,T97 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T124,T189,T190 | Yes | T124,T189,T190 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T124,T189,T190 | Yes | T124,T189,T190 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T191,T99,T75 | Yes | T191,T99,T75 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T46,T33,T34 | Yes | T46,T33,T34 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T99,T75,T192 | Yes | T99,T75,T192 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T99,T100,T101 | Yes | T99,T100,T101 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T191,T99,T75 | Yes | T191,T99,T75 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T46,T33,T34 | Yes | T46,T33,T34 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T99,T75,T192 | Yes | T99,T75,T192 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T99,T75,T100 | Yes | T99,T75,T100 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T25,T38,T155 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[1:0] | Yes | Yes | T193 | Yes | T39,T194,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[4:2] | No | No | Yes | T195,T39 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6:5] | Yes | Yes | T193 | Yes | T39,T194,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[7] | No | No | Yes | T194,T195 | INPUT | ||
lc_otp_vendor_test_i.ctrl[9:8] | Yes | Yes | T193 | Yes | T39,T193,T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | No | No | Yes | T39,T195 | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | Yes | Yes | *T193 | Yes | T39,T194,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | Yes | T39,T194,T195 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17:13] | Yes | Yes | T193 | Yes | T39,T194,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[18] | No | No | Yes | T39,T195 | INPUT | ||
lc_otp_vendor_test_i.ctrl[19] | Yes | Yes | *T193 | Yes | T194,T195,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[20] | No | No | Yes | T39,T194,T195 | INPUT | ||
lc_otp_vendor_test_i.ctrl[21] | Yes | Yes | *T193 | Yes | T39,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T194 | INPUT | ||
lc_otp_vendor_test_i.ctrl[23] | Yes | Yes | *T193 | Yes | T39,T195,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[24] | No | No | Yes | T39,T194 | INPUT | ||
lc_otp_vendor_test_i.ctrl[26:25] | Yes | Yes | T193 | Yes | T194,T193,T195 | INPUT | |
lc_otp_vendor_test_i.ctrl[29:27] | No | No | Yes | T195,T39 | INPUT | ||
lc_otp_vendor_test_i.ctrl[30] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31] | Yes | Yes | T193 | Yes | T195,T193 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[6:0] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[7] | No | No | No | INPUT | |||
lc_otp_program_i.count[18:8] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[26:20] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[27] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:28] | Yes | Yes | T81,T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[37:32] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[38] | No | No | No | INPUT | |||
lc_otp_program_i.count[40:39] | Yes | Yes | *T5,T81,T197 | Yes | T198,T158,T35 | INPUT | |
lc_otp_program_i.count[41] | No | No | No | INPUT | |||
lc_otp_program_i.count[50:42] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | INPUT | |
lc_otp_program_i.count[52:51] | No | No | No | INPUT | |||
lc_otp_program_i.count[69:53] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[70] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:71] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[90:77] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | INPUT | |
lc_otp_program_i.count[91] | No | No | No | INPUT | |||
lc_otp_program_i.count[93:92] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT | |
lc_otp_program_i.count[94] | No | No | No | INPUT | |||
lc_otp_program_i.count[100:95] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT | |
lc_otp_program_i.count[101] | No | No | No | INPUT | |||
lc_otp_program_i.count[121:102] | Yes | Yes | *T191,*T196,*T8 | Yes | T191,T196,T8 | INPUT | |
lc_otp_program_i.count[122] | No | No | No | INPUT | |||
lc_otp_program_i.count[129:123] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T191 | INPUT | |
lc_otp_program_i.count[130] | No | No | No | INPUT | |||
lc_otp_program_i.count[140:131] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[146:142] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[148:147] | No | No | No | INPUT | |||
lc_otp_program_i.count[165:149] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[167:166] | No | No | No | INPUT | |||
lc_otp_program_i.count[170:168] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[171] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:172] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[183:179] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[184] | No | No | No | INPUT | |||
lc_otp_program_i.count[187:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[188] | No | No | No | INPUT | |||
lc_otp_program_i.count[191:189] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[192] | No | No | No | INPUT | |||
lc_otp_program_i.count[212:193] | Yes | Yes | *T191,*T196,*T1 | Yes | T191,T196,T8 | INPUT | |
lc_otp_program_i.count[213] | No | No | No | INPUT | |||
lc_otp_program_i.count[219:214] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[220] | No | No | No | INPUT | |||
lc_otp_program_i.count[233:221] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[234] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:235] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[239:238] | No | No | No | INPUT | |||
lc_otp_program_i.count[244:240] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[245] | No | No | No | INPUT | |||
lc_otp_program_i.count[250:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[251] | No | No | No | INPUT | |||
lc_otp_program_i.count[262:252] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[265:264] | Yes | Yes | *T191,*T196,*T1 | Yes | T191,T196,T8 | INPUT | |
lc_otp_program_i.count[267:266] | No | No | No | INPUT | |||
lc_otp_program_i.count[269:268] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[270] | No | No | No | INPUT | |||
lc_otp_program_i.count[277:271] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[278] | No | No | No | INPUT | |||
lc_otp_program_i.count[285:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[287:286] | No | No | No | INPUT | |||
lc_otp_program_i.count[292:288] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[293] | No | No | No | INPUT | |||
lc_otp_program_i.count[300:294] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[302:301] | No | No | No | INPUT | |||
lc_otp_program_i.count[317:303] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[318] | No | No | No | INPUT | |||
lc_otp_program_i.count[320:319] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[321] | No | No | No | INPUT | |||
lc_otp_program_i.count[322] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[332:324] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[333] | No | No | No | INPUT | |||
lc_otp_program_i.count[339:334] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[340] | No | No | No | INPUT | |||
lc_otp_program_i.count[341] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.count[342] | No | No | No | INPUT | |||
lc_otp_program_i.count[343] | Yes | Yes | *T81,*T197,*T198 | Yes | T81,T197,T198 | INPUT | |
lc_otp_program_i.count[344] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:345] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[352] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[353] | No | No | No | INPUT | |||
lc_otp_program_i.count[362:354] | Yes | Yes | *T81,*T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[364:363] | No | No | No | INPUT | |||
lc_otp_program_i.count[368:365] | Yes | Yes | *T191,*T196,*T81 | Yes | T191,T196,T81 | INPUT | |
lc_otp_program_i.count[370:369] | No | No | No | INPUT | |||
lc_otp_program_i.count[373:371] | Yes | Yes | T81,T197,*T191 | Yes | T81,T197,T191 | INPUT | |
lc_otp_program_i.count[374] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:375] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.state[12:0] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[13] | No | No | No | INPUT | |||
lc_otp_program_i.state[18:14] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[19] | No | No | No | INPUT | |||
lc_otp_program_i.state[20] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[22:21] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:23] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[55:44] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[56] | No | No | No | INPUT | |||
lc_otp_program_i.state[60:57] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[61] | No | No | No | INPUT | |||
lc_otp_program_i.state[64:62] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T191 | INPUT | |
lc_otp_program_i.state[65] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:66] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[69] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:70] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[86:84] | Yes | Yes | T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT | |
lc_otp_program_i.state[89:87] | No | No | No | INPUT | |||
lc_otp_program_i.state[91:90] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T151 | INPUT | |
lc_otp_program_i.state[93:92] | No | No | No | INPUT | |||
lc_otp_program_i.state[95:94] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[96] | No | No | No | INPUT | |||
lc_otp_program_i.state[97] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[98] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:99] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T151 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[130:114] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[131] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:132] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[147:146] | No | No | No | INPUT | |||
lc_otp_program_i.state[155:148] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[156] | No | No | No | INPUT | |||
lc_otp_program_i.state[160:157] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[161] | No | No | No | INPUT | |||
lc_otp_program_i.state[169:162] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[171:170] | No | No | No | INPUT | |||
lc_otp_program_i.state[183:172] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[184] | No | No | No | INPUT | |||
lc_otp_program_i.state[191:185] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT | |
lc_otp_program_i.state[192] | No | No | No | INPUT | |||
lc_otp_program_i.state[198:193] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[199] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:200] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[213] | No | No | No | INPUT | |||
lc_otp_program_i.state[216:214] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[217] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:218] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[232:228] | Yes | Yes | *T191,*T196,*T39 | Yes | T191,T196,T33 | INPUT | |
lc_otp_program_i.state[233] | No | No | No | INPUT | |||
lc_otp_program_i.state[234] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[236:235] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:237] | Yes | Yes | *T5,T39,T33 | Yes | T33,T34,T41 | INPUT | |
lc_otp_program_i.state[244] | No | No | No | INPUT | |||
lc_otp_program_i.state[248:245] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[249] | No | No | No | INPUT | |||
lc_otp_program_i.state[258:250] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[259] | No | No | No | INPUT | |||
lc_otp_program_i.state[270:260] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[272:271] | No | No | No | INPUT | |||
lc_otp_program_i.state[281:273] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[282] | No | No | No | INPUT | |||
lc_otp_program_i.state[289:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | INPUT | |
lc_otp_program_i.state[290] | No | No | No | INPUT | |||
lc_otp_program_i.state[298:291] | Yes | Yes | *T191,*T196,*T8 | Yes | T191,T196,T8 | INPUT | |
lc_otp_program_i.state[299] | No | No | No | INPUT | |||
lc_otp_program_i.state[314:300] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T33 | INPUT | |
lc_otp_program_i.state[315] | No | No | No | INPUT | |||
lc_otp_program_i.state[318:316] | Yes | Yes | T39,T33,T81 | Yes | T33,T81,T197 | INPUT | |
lc_otp_program_i.state[319] | No | No | No | INPUT | |||
lc_otp_program_i.req | Yes | Yes | T33,T34,T81 | Yes | T33,T34,T81 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T33,T34,T81 | Yes | T33,T34,T81 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T46,T47,T82 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T46,T47,T41 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T46,T47,T82 | Yes | T46,T33,T34 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T33,T34,T41 | Yes | T33,T34,T81 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T25,T46,T33 | Yes | T2,T3,T4 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T4,T8 | Yes | T8,T25,T33 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T25,T46 | Yes | T2,T4,T8 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT | |
otp_lc_data_o.count[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[18:8] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[26:20] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:28] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[37:32] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[40:39] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT | |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[50:42] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT | |
otp_lc_data_o.count[52:51] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[69:53] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:71] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[90:77] | Yes | Yes | *T5,*T81,*T197 | Yes | T198,T158,T35 | OUTPUT | |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[93:92] | Yes | Yes | T46,T33,T34 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[100:95] | Yes | Yes | *T46,*T33,*T34 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[121:102] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[129:123] | Yes | Yes | *T46,*T33,*T34 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[130] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140:131] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[146:142] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[148:147] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[165:149] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[167:166] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[170:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[183:179] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191:189] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[212:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[219:214] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[233:221] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[234] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:235] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[239:238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[244:240] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.count[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[250:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262:252] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[265:264] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[267:266] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[269:268] | Yes | Yes | T33,T34,T41 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.count[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[277:271] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[285:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[287:286] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[292:288] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[293] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[300:294] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[302:301] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317:303] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[320:319] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[321] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[332:324] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[339:334] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[341] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.count[342] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[343] | Yes | Yes | *T81,*T197,*T198 | Yes | T198,T35,T207 | OUTPUT | |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:345] | Yes | Yes | T8,T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[352] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[353] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[362:354] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[364:363] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[368:365] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.count[370:369] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[373:371] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:375] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[12:0] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[18:14] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[20] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT | |
otp_lc_data_o.state[22:21] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:23] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[55:44] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[60:57] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[64:62] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:66] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT | |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:70] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[86:84] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[89:87] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[91:90] | Yes | Yes | *T5,*T39,T33 | Yes | T33,T34,T151 | OUTPUT | |
otp_lc_data_o.state[93:92] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[95:94] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[97] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:99] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T151 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[130:114] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:132] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[147:146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[155:148] | Yes | Yes | *T5,*T39,T33 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[160:157] | Yes | Yes | T8,T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[169:162] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[171:170] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[183:172] | Yes | Yes | *T5,*T39,*T33 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.state[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[191:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[198:193] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:200] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[216:214] | Yes | Yes | *T39,*T33,*T81 | Yes | T33,T198,T35 | OUTPUT | |
otp_lc_data_o.state[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:218] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[232:228] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[233] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[234] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[236:235] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:237] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[248:245] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[249] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[258:250] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[270:260] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[272:271] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[281:273] | Yes | Yes | *T8,*T25,*T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[289:283] | Yes | Yes | *T33,*T34,*T41 | Yes | T33,T34,T41 | OUTPUT | |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[298:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_lc_data_o.state[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[314:300] | Yes | Yes | *T8,*T5,*T25 | Yes | T8,T25,T33 | OUTPUT | |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[318:316] | Yes | Yes | *T39,T33,*T81 | Yes | T33,T198,T35 | OUTPUT | |
otp_lc_data_o.state[319] | No | No | No | OUTPUT | |||
otp_lc_data_o.error | Yes | Yes | T46,T47,T82 | Yes | T46,T33,T34 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T102,T103,T6 | Yes | T47,T38,T191 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T202,T203,T204 | Yes | T202,T205,T206 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T46,T82,T208 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T209,T149,T150 | Yes | T209,T149,T35 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T210,T209,T149 | Yes | T210,T209,T149 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T211,T212,T213 | Yes | T211,T212,T213 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T209,T149,T150 | Yes | T209,T149,T150 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T210,T209,T149 | Yes | T210,T209,T149 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T212,T213,T214 | Yes | T212,T213,T214 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T215,T182,T183 | Yes | T215,T182,T183 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T8,T25,T46 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T3,T8,T6 | Yes | T3,T8,T102 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T8 | Yes | T3,T8,T32 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T215,T182,T183 | Yes | T215,T182,T183 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T103 | Yes | T25,T33,T34 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[13:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[14] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[62:15] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:64] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[70] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:71] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:98] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[181:176] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[182] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:183] | Yes | Yes | *T216,*T158,*T211 | Yes | T216,T158,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T33,T41,T202 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T25,T46 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T8,T25,T46 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T46,T47,T41 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |