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LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T29,T76,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_out[7])
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[8].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_out[8])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_out[8]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_out[8])
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[9].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_out[9])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_out[9]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_out[9])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[10].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_out[10])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_out[10]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_out[10])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[11].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_out[11])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[11].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_out[11]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[11].q == 2'h2) ? 1'b0 : mio_out[11])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[11].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[12].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_out[12])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[12].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_out[12]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[12].q == 2'h2) ? 1'b0 : mio_out[12])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[12].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[13].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_out[13])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[13].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_out[13]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[13].q == 2'h2) ? 1'b0 : mio_out[13])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[13].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[14].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_out[14])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[14].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_out[14]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[14].q == 2'h2) ? 1'b0 : mio_out[14])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[14].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[15].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[16].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[17].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[18].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[19].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[20].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[21].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[22].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[23].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[24].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[25].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[26].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[27].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[28].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T74,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[29].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[30].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[31].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[32].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T74 |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[33].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Not Covered | |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[34].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[35].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[36].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T7,T74 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |
LINE 502
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
LINE 502
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[37].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37])))
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |
LINE 502
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T1,T2,T3 |
1 | Covered | T20,T21 |