SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.83 | 84.83 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.02 | 85.02 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.02 | 85.02 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.02 | 85.02 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9341 | 84.83 |
Total Bits 0->1 | 5506 | 4686 | 85.11 |
Total Bits 1->0 | 5506 | 4655 | 84.54 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9341 | 84.83 |
Port Bits 0->1 | 5506 | 4686 | 85.11 |
Port Bits 1->0 | 5506 | 4655 | 84.54 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T3,T25 | Yes | T1,T3,T25 | INPUT |
edn_i.edn_fips | No | No | Yes | T171,T139,T172 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T87,*T58,*T88 | Yes | T87,T58,T88 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T84,T85,T86 | Yes | T84,T85,T86 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T58,T88,T41 | Yes | T58,T88,T41 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T85,T91,T89 | Yes | T85,T91,T89 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T84,T85,T91 | Yes | T85,T91,T89 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T173,*T174,*T41 | Yes | T173,T174,T41 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T84,T85,T91 | Yes | T84,T85,T91 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T63,*T175,*T176 | Yes | T175,T176,T177 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T41,*T84,*T85 | Yes | T41,T84,T85 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T87,*T58,*T88 | Yes | T87,T58,T88 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T84,T85,T86 | Yes | T84,T85,T86 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T58,T88,T41 | Yes | T58,T88,T41 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T72,T73,T74 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T41,T85,T91 | Yes | T41,T84,T85 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T72,T73,T74 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T84,T85,T89 | Yes | T84,T91,T89 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T41,T89,T90 | Yes | T41,T84,T85 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T84,T85,T91 | Yes | T84,T85,T89 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T72,T73,T74 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T122,T178,T179 | Yes | T122,T178,T179 | OUTPUT |
intr_otp_error_o | Yes | Yes | T122,T178,T179 | Yes | T122,T178,T179 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T76,T68,T92 | Yes | T76,T68,T92 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T180 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T92,T93,T180 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T68,T92,T181 | Yes | T68,T92,T181 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T76,T68,T92 | Yes | T76,T68,T92 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T68,T92,T181 | Yes | T68,T92,T181 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T148,T11,T49 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[10:0] | No | No | Yes | T182,T63,T183 | INPUT | |
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[15:12] | No | No | Yes | T182,T183 | INPUT | |
lc_otp_vendor_test_i.ctrl[17:16] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:18] | No | No | Yes | T182,T183,T63 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[9:0] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[10] | No | No | No | INPUT | ||
lc_otp_program_i.count[16:11] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:18] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[40:23] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[42:41] | No | No | No | INPUT | ||
lc_otp_program_i.count[49:43] | Yes | Yes | *T118,*T184,*T185 | Yes | T186,T151,T187 | INPUT |
lc_otp_program_i.count[50] | No | No | No | INPUT | ||
lc_otp_program_i.count[54:51] | Yes | Yes | *T76,*T118,*T184 | Yes | T76,T186,T151 | INPUT |
lc_otp_program_i.count[55] | No | No | No | INPUT | ||
lc_otp_program_i.count[65:56] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[66] | No | No | No | INPUT | ||
lc_otp_program_i.count[72:67] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[73] | No | No | No | INPUT | ||
lc_otp_program_i.count[76:74] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[77] | No | No | No | INPUT | ||
lc_otp_program_i.count[85:78] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[86] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:87] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[106:96] | Yes | Yes | T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[107] | No | No | No | INPUT | ||
lc_otp_program_i.count[110:108] | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[111] | No | No | No | INPUT | ||
lc_otp_program_i.count[117:112] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[118] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:119] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[130:122] | Yes | Yes | *T25,*T4,*T118 | Yes | T76,T188,T186 | INPUT |
lc_otp_program_i.count[131] | No | No | No | INPUT | ||
lc_otp_program_i.count[133:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[135:134] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[150] | No | No | No | INPUT | ||
lc_otp_program_i.count[154:151] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[155] | No | No | No | INPUT | ||
lc_otp_program_i.count[156] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[157] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:158] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | ||
lc_otp_program_i.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[170] | No | No | No | INPUT | ||
lc_otp_program_i.count[176:171] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT |
lc_otp_program_i.count[177] | No | No | No | INPUT | ||
lc_otp_program_i.count[185:178] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[186] | No | No | No | INPUT | ||
lc_otp_program_i.count[189:187] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[190] | No | No | No | INPUT | ||
lc_otp_program_i.count[199:191] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[200] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:201] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[215:212] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[216] | No | No | No | INPUT | ||
lc_otp_program_i.count[219:217] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[220] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:221] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[229:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[230] | No | No | No | INPUT | ||
lc_otp_program_i.count[235:231] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[236] | No | No | No | INPUT | ||
lc_otp_program_i.count[241:237] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT |
lc_otp_program_i.count[242] | No | No | No | INPUT | ||
lc_otp_program_i.count[258:243] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[259] | No | No | No | INPUT | ||
lc_otp_program_i.count[265:260] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT |
lc_otp_program_i.count[266] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[275:274] | No | No | No | INPUT | ||
lc_otp_program_i.count[284:276] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[285] | No | No | No | INPUT | ||
lc_otp_program_i.count[289:286] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[290] | No | No | No | INPUT | ||
lc_otp_program_i.count[297:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[298] | No | No | No | INPUT | ||
lc_otp_program_i.count[302:299] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[303] | No | No | No | INPUT | ||
lc_otp_program_i.count[311:304] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[313:312] | No | No | No | INPUT | ||
lc_otp_program_i.count[318:314] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[320:319] | No | No | No | INPUT | ||
lc_otp_program_i.count[321] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[322] | No | No | No | INPUT | ||
lc_otp_program_i.count[324:323] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[325] | No | No | No | INPUT | ||
lc_otp_program_i.count[334:326] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[335] | No | No | No | INPUT | ||
lc_otp_program_i.count[341:336] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[342] | No | No | No | INPUT | ||
lc_otp_program_i.count[357:343] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT |
lc_otp_program_i.count[358] | No | No | No | INPUT | ||
lc_otp_program_i.count[362:359] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[363] | No | No | No | INPUT | ||
lc_otp_program_i.count[368:364] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT |
lc_otp_program_i.count[369] | No | No | No | INPUT | ||
lc_otp_program_i.count[374:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.count[375] | No | No | No | INPUT | ||
lc_otp_program_i.count[379:376] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT |
lc_otp_program_i.count[380] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:381] | Yes | Yes | T76,T1,T2 | Yes | T76,T59,T60 | INPUT |
lc_otp_program_i.state[6:0] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[8:7] | No | No | No | INPUT | ||
lc_otp_program_i.state[14:9] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[15] | No | No | No | INPUT | ||
lc_otp_program_i.state[21:16] | Yes | Yes | *T118,*T59,*T184 | Yes | T59,T76,T186 | INPUT |
lc_otp_program_i.state[22] | No | No | No | INPUT | ||
lc_otp_program_i.state[23] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[24] | No | No | No | INPUT | ||
lc_otp_program_i.state[26:25] | Yes | Yes | T118,T59,T184 | Yes | T59,T76,T186 | INPUT |
lc_otp_program_i.state[27] | No | No | No | INPUT | ||
lc_otp_program_i.state[33:28] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT |
lc_otp_program_i.state[35:34] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:36] | Yes | Yes | *T76,*T118,*T59 | Yes | T76,T59,T60 | INPUT |
lc_otp_program_i.state[40] | No | No | No | INPUT | ||
lc_otp_program_i.state[44:41] | Yes | Yes | *T118,T59,*T60 | Yes | T59,T60,T186 | INPUT |
lc_otp_program_i.state[45] | No | No | No | INPUT | ||
lc_otp_program_i.state[47:46] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[49:48] | No | No | No | INPUT | ||
lc_otp_program_i.state[50] | Yes | Yes | *T76 | Yes | T76 | INPUT |
lc_otp_program_i.state[51] | No | No | No | INPUT | ||
lc_otp_program_i.state[52] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[53] | No | No | No | INPUT | ||
lc_otp_program_i.state[54] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[55] | No | No | No | INPUT | ||
lc_otp_program_i.state[82:56] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[83] | No | No | No | INPUT | ||
lc_otp_program_i.state[92:84] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT |
lc_otp_program_i.state[93] | No | No | No | INPUT | ||
lc_otp_program_i.state[100:94] | Yes | Yes | *T118,*T63,T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[101] | No | No | No | INPUT | ||
lc_otp_program_i.state[124:102] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[125] | No | No | No | INPUT | ||
lc_otp_program_i.state[126] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[127] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:128] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:133] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[139:138] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[140] | No | No | No | INPUT | ||
lc_otp_program_i.state[143:141] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[144] | No | No | No | INPUT | ||
lc_otp_program_i.state[153:145] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[154] | No | No | No | INPUT | ||
lc_otp_program_i.state[164:155] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[165] | No | No | No | INPUT | ||
lc_otp_program_i.state[176:166] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[177] | No | No | No | INPUT | ||
lc_otp_program_i.state[184:178] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT |
lc_otp_program_i.state[185] | No | No | No | INPUT | ||
lc_otp_program_i.state[204:186] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[205] | No | No | No | INPUT | ||
lc_otp_program_i.state[208:206] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[209] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:210] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[213] | No | No | No | INPUT | ||
lc_otp_program_i.state[225:214] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[229:226] | No | No | No | INPUT | ||
lc_otp_program_i.state[235:230] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[236] | No | No | No | INPUT | ||
lc_otp_program_i.state[244:237] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[245] | No | No | No | INPUT | ||
lc_otp_program_i.state[258:246] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT |
lc_otp_program_i.state[259] | No | No | No | INPUT | ||
lc_otp_program_i.state[271:260] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT |
lc_otp_program_i.state[272] | No | No | No | INPUT | ||
lc_otp_program_i.state[296:273] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.state[297] | No | No | No | INPUT | ||
lc_otp_program_i.state[302:298] | Yes | Yes | *T25,*T4,*T118 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_i.state[303] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:304] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT |
lc_otp_program_i.req | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T189,T190,T191 | Yes | T189,T190,T191 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T73,T75,T76 | Yes | T59,T60,T72 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T3,T7 | Yes | T59,T60,T74 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T72,T74 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T25,T7,T46 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT |
otp_lc_data_o.count[9:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[16:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:18] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[40:23] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[42:41] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[49:43] | Yes | Yes | *T118,*T184,*T185 | Yes | T186,T151,T187 | OUTPUT |
otp_lc_data_o.count[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[54:51] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[65:56] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[66] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72:67] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[76:74] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[85:78] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:87] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[106:96] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[110:108] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[117:112] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:119] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[130:122] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[133:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[135:134] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:136] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[154:151] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[156] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:158] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[169:164] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[176:171] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[185:178] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[189:187] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[199:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:201] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[215:212] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[219:217] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:221] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[229:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[235:231] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[241:237] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[258:243] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[265:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[275:274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[284:276] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[289:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[297:291] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[298] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[302:299] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[311:304] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[313:312] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[318:314] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[320:319] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[321] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[322] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[324:323] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[325] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[334:326] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[335] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[341:336] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[342] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[357:343] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[358] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[362:359] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[368:364] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[369] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374:370] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[379:376] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:381] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[6:0] | Yes | Yes | T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT |
otp_lc_data_o.state[8:7] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[14:9] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[21:16] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[23] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT |
otp_lc_data_o.state[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[26:25] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[33:28] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[35:34] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[44:41] | Yes | Yes | *T118,T59,*T60 | Yes | T59,T60,T186 | OUTPUT |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[47:46] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[49:48] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[82:56] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[92:84] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[100:94] | Yes | Yes | *T118,*T63,T59 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[124:102] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[125] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[126] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:128] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:133] | Yes | Yes | T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[139:138] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[143:141] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[153:145] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[154] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[164:155] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[176:166] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[184:178] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[185] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[204:186] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[205] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[208:206] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:210] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225:214] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[229:226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[235:230] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[244:237] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[258:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[271:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[296:273] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[302:298] | Yes | Yes | *T25,*T4,*T118 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:304] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T73,T75,T76 | Yes | T59,T60,T72 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T3,T7 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T73,T75,T196 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T143,T197,T144 | Yes | T143,T197,T144 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T143,T197,T198 | Yes | T143,T197,T198 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T143,T197,T144 | Yes | T143,T197,T144 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T143,T197,T198 | Yes | T143,T197,T198 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T200,T201,T202 | Yes | T200,T201,T202 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T203,T171,T139 | Yes | T203,T171,T139 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T203,T171,T139 | Yes | T203,T171,T139 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T101 | Yes | T59,T72,T73 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[7] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:8] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[48] | Yes | Yes | *T204,*T151,*T199 | Yes | T204,T151,T199 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:50] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[181] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[189:182] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[190] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[217:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[218] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[234:219] | Yes | Yes | *T205,*T204,*T151 | Yes | T205,T204,T151 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:236] | Yes | Yes | *T204,*T151,*T199 | Yes | T204,T151,T199 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T59,T60,T72 | Yes | T2,T25,T100 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T25 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9340 | 85.02 |
Total Bits 0->1 | 5493 | 4685 | 85.29 |
Total Bits 1->0 | 5493 | 4655 | 84.74 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9340 | 85.02 |
Port Bits 0->1 | 5493 | 4685 | 85.29 |
Port Bits 1->0 | 5493 | 4655 | 84.74 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T3,T25 | Yes | T1,T3,T25 | INPUT | |
edn_i.edn_fips | No | No | Yes | T171,T139,T172 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T87,*T58,*T88 | Yes | T87,T58,T88 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T84,T85,T86 | Yes | T84,T85,T86 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T58,T88,T41 | Yes | T58,T88,T41 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T85,T91,T89 | Yes | T85,T91,T89 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T84,T85,T91 | Yes | T85,T91,T89 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T173,*T174,*T41 | Yes | T173,T174,T41 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T84,T85,T91 | Yes | T84,T85,T91 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T63,*T175,*T176 | Yes | T175,T176,T177 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T84,*T85,*T86 | Yes | T84,T85,T86 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T41,*T84,*T85 | Yes | T41,T84,T85 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T87,*T58,*T88 | Yes | T87,T58,T88 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T84,T85,T86 | Yes | T84,T85,T86 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T58,T88,T41 | Yes | T58,T88,T41 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T72,T73,T74 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T41,T85,T91 | Yes | T41,T84,T85 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T72,T73,T74 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T84,T85,T89 | Yes | T84,T91,T89 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T41,T89,T90 | Yes | T41,T84,T85 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T84,T85,T91 | Yes | T84,T85,T89 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T72,T73,T74 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T41,T84,T85 | Yes | T41,T84,T85 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T122,T178,T179 | Yes | T122,T178,T179 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T122,T178,T179 | Yes | T122,T178,T179 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T76,T68,T92 | Yes | T76,T68,T92 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T180 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T92,T93,T180 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T68,T92,T181 | Yes | T68,T92,T181 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T92,T93,T94 | Yes | T92,T93,T94 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T76,T68,T92 | Yes | T76,T68,T92 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T68,T92,T181 | Yes | T68,T92,T181 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T68,T92,T93 | Yes | T68,T92,T93 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T148,T11,T49 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[10:0] | No | No | Yes | T182,T63,T183 | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[15:12] | No | No | Yes | T182,T183 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17:16] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:18] | No | No | Yes | T182,T183,T63 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[9:0] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[10] | No | No | No | INPUT | |||
lc_otp_program_i.count[16:11] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:18] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[40:23] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[42:41] | No | No | No | INPUT | |||
lc_otp_program_i.count[49:43] | Yes | Yes | *T118,*T184,*T185 | Yes | T186,T151,T187 | INPUT | |
lc_otp_program_i.count[50] | No | No | No | INPUT | |||
lc_otp_program_i.count[54:51] | Yes | Yes | *T76,*T118,*T184 | Yes | T76,T186,T151 | INPUT | |
lc_otp_program_i.count[55] | No | No | No | INPUT | |||
lc_otp_program_i.count[65:56] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[66] | No | No | No | INPUT | |||
lc_otp_program_i.count[72:67] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[73] | No | No | No | INPUT | |||
lc_otp_program_i.count[76:74] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[77] | No | No | No | INPUT | |||
lc_otp_program_i.count[85:78] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[86] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:87] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[106:96] | Yes | Yes | T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[107] | No | No | No | INPUT | |||
lc_otp_program_i.count[110:108] | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[111] | No | No | No | INPUT | |||
lc_otp_program_i.count[117:112] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[118] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:119] | Yes | Yes | T184,T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[130:122] | Yes | Yes | *T25,*T4,*T118 | Yes | T76,T188,T186 | INPUT | |
lc_otp_program_i.count[131] | No | No | No | INPUT | |||
lc_otp_program_i.count[133:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[135:134] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[150] | No | No | No | INPUT | |||
lc_otp_program_i.count[154:151] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[155] | No | No | No | INPUT | |||
lc_otp_program_i.count[156] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[157] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:158] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | |||
lc_otp_program_i.count[169:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[170] | No | No | No | INPUT | |||
lc_otp_program_i.count[176:171] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT | |
lc_otp_program_i.count[177] | No | No | No | INPUT | |||
lc_otp_program_i.count[185:178] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[186] | No | No | No | INPUT | |||
lc_otp_program_i.count[189:187] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[190] | No | No | No | INPUT | |||
lc_otp_program_i.count[199:191] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[200] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:201] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[215:212] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[216] | No | No | No | INPUT | |||
lc_otp_program_i.count[219:217] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[220] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:221] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[229:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[230] | No | No | No | INPUT | |||
lc_otp_program_i.count[235:231] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[236] | No | No | No | INPUT | |||
lc_otp_program_i.count[241:237] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT | |
lc_otp_program_i.count[242] | No | No | No | INPUT | |||
lc_otp_program_i.count[258:243] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[259] | No | No | No | INPUT | |||
lc_otp_program_i.count[265:260] | Yes | Yes | *T76,*T1,*T2 | Yes | T76,T59,T60 | INPUT | |
lc_otp_program_i.count[266] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[275:274] | No | No | No | INPUT | |||
lc_otp_program_i.count[284:276] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[285] | No | No | No | INPUT | |||
lc_otp_program_i.count[289:286] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[290] | No | No | No | INPUT | |||
lc_otp_program_i.count[297:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[298] | No | No | No | INPUT | |||
lc_otp_program_i.count[302:299] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[303] | No | No | No | INPUT | |||
lc_otp_program_i.count[311:304] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[313:312] | No | No | No | INPUT | |||
lc_otp_program_i.count[318:314] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[320:319] | No | No | No | INPUT | |||
lc_otp_program_i.count[321] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[322] | No | No | No | INPUT | |||
lc_otp_program_i.count[324:323] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[325] | No | No | No | INPUT | |||
lc_otp_program_i.count[334:326] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[335] | No | No | No | INPUT | |||
lc_otp_program_i.count[341:336] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[342] | No | No | No | INPUT | |||
lc_otp_program_i.count[357:343] | Yes | Yes | *T76,*T184,*T185 | Yes | T76,T184,T185 | INPUT | |
lc_otp_program_i.count[358] | No | No | No | INPUT | |||
lc_otp_program_i.count[362:359] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[363] | No | No | No | INPUT | |||
lc_otp_program_i.count[368:364] | Yes | Yes | *T184,*T185,*T76 | Yes | T184,T185,T76 | INPUT | |
lc_otp_program_i.count[369] | No | No | No | INPUT | |||
lc_otp_program_i.count[374:370] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.count[375] | No | No | No | INPUT | |||
lc_otp_program_i.count[379:376] | Yes | Yes | *T184,*T185,*T186 | Yes | T184,T185,T186 | INPUT | |
lc_otp_program_i.count[380] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:381] | Yes | Yes | T76,T1,T2 | Yes | T76,T59,T60 | INPUT | |
lc_otp_program_i.state[6:0] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[8:7] | No | No | No | INPUT | |||
lc_otp_program_i.state[14:9] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[15] | No | No | No | INPUT | |||
lc_otp_program_i.state[21:16] | Yes | Yes | *T118,*T59,*T184 | Yes | T59,T76,T186 | INPUT | |
lc_otp_program_i.state[22] | No | No | No | INPUT | |||
lc_otp_program_i.state[23] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[24] | No | No | No | INPUT | |||
lc_otp_program_i.state[26:25] | Yes | Yes | T118,T59,T184 | Yes | T59,T76,T186 | INPUT | |
lc_otp_program_i.state[27] | No | No | No | INPUT | |||
lc_otp_program_i.state[33:28] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT | |
lc_otp_program_i.state[35:34] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:36] | Yes | Yes | *T76,*T118,*T59 | Yes | T76,T59,T60 | INPUT | |
lc_otp_program_i.state[40] | No | No | No | INPUT | |||
lc_otp_program_i.state[44:41] | Yes | Yes | *T118,T59,*T60 | Yes | T59,T60,T186 | INPUT | |
lc_otp_program_i.state[45] | No | No | No | INPUT | |||
lc_otp_program_i.state[47:46] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[49:48] | No | No | No | INPUT | |||
lc_otp_program_i.state[50] | Yes | Yes | *T76 | Yes | T76 | INPUT | |
lc_otp_program_i.state[51] | No | No | No | INPUT | |||
lc_otp_program_i.state[52] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[53] | No | No | No | INPUT | |||
lc_otp_program_i.state[54] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[55] | No | No | No | INPUT | |||
lc_otp_program_i.state[82:56] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[83] | No | No | No | INPUT | |||
lc_otp_program_i.state[92:84] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT | |
lc_otp_program_i.state[93] | No | No | No | INPUT | |||
lc_otp_program_i.state[100:94] | Yes | Yes | *T118,*T63,T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[101] | No | No | No | INPUT | |||
lc_otp_program_i.state[124:102] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[125] | No | No | No | INPUT | |||
lc_otp_program_i.state[126] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[127] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:128] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:133] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[139:138] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[140] | No | No | No | INPUT | |||
lc_otp_program_i.state[143:141] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[144] | No | No | No | INPUT | |||
lc_otp_program_i.state[153:145] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[154] | No | No | No | INPUT | |||
lc_otp_program_i.state[164:155] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[165] | No | No | No | INPUT | |||
lc_otp_program_i.state[176:166] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[177] | No | No | No | INPUT | |||
lc_otp_program_i.state[184:178] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT | |
lc_otp_program_i.state[185] | No | No | No | INPUT | |||
lc_otp_program_i.state[204:186] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[205] | No | No | No | INPUT | |||
lc_otp_program_i.state[208:206] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[209] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:210] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[213] | No | No | No | INPUT | |||
lc_otp_program_i.state[225:214] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[229:226] | No | No | No | INPUT | |||
lc_otp_program_i.state[235:230] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[236] | No | No | No | INPUT | |||
lc_otp_program_i.state[244:237] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[245] | No | No | No | INPUT | |||
lc_otp_program_i.state[258:246] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT | |
lc_otp_program_i.state[259] | No | No | No | INPUT | |||
lc_otp_program_i.state[271:260] | Yes | Yes | *T76,*T59,*T184 | Yes | T76,T59,T184 | INPUT | |
lc_otp_program_i.state[272] | No | No | No | INPUT | |||
lc_otp_program_i.state[296:273] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.state[297] | No | No | No | INPUT | |||
lc_otp_program_i.state[302:298] | Yes | Yes | *T25,*T4,*T118 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_i.state[303] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:304] | Yes | Yes | T59,T184,T185 | Yes | T59,T184,T185 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T189,T190,T191 | Yes | T189,T190,T191 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T73,T75,T76 | Yes | T59,T60,T72 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T59,T60,T72 | Yes | T59,T60,T72 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T2,T3,T7 | Yes | T59,T60,T74 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T72,T74 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T25,T7,T46 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT | |
otp_lc_data_o.count[9:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[16:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:18] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[40:23] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[42:41] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[49:43] | Yes | Yes | *T118,*T184,*T185 | Yes | T186,T151,T187 | OUTPUT | |
otp_lc_data_o.count[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[54:51] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[65:56] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[66] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72:67] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[76:74] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[85:78] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:87] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[106:96] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[110:108] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[117:112] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:119] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[130:122] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[133:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[135:134] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:136] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[154:151] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[156] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:158] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[169:164] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[176:171] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[185:178] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[189:187] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[199:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:201] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[215:212] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[219:217] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:221] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[229:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[235:231] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[241:237] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[258:243] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[265:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[275:274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[284:276] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[289:286] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[297:291] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[298] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[302:299] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[311:304] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[313:312] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[318:314] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[320:319] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[321] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[322] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[324:323] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[325] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[334:326] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[335] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[341:336] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[342] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[357:343] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[358] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[362:359] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[368:364] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[369] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374:370] | Yes | Yes | *T59,*T60,*T72 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[379:376] | Yes | Yes | *T184,*T185,*T186 | Yes | T186,T187,T173 | OUTPUT | |
otp_lc_data_o.count[380] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:381] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[6:0] | Yes | Yes | T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT | |
otp_lc_data_o.state[8:7] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[14:9] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[21:16] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[23] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT | |
otp_lc_data_o.state[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[26:25] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[33:28] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[35:34] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:36] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[44:41] | Yes | Yes | *T118,T59,*T60 | Yes | T59,T60,T186 | OUTPUT | |
otp_lc_data_o.state[45] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[47:46] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[49:48] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[50] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[82:56] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[92:84] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[100:94] | Yes | Yes | *T118,*T63,T59 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[124:102] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[125] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[126] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:128] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:133] | Yes | Yes | T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[139:138] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[143:141] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[153:145] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[154] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[164:155] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[176:166] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[184:178] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[185] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[204:186] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[205] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[208:206] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:210] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225:214] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[229:226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[235:230] | Yes | Yes | *T59,*T60,*T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[244:237] | Yes | Yes | *T118,*T63,*T59 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[258:246] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[271:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[296:273] | Yes | Yes | *T59,*T184,*T185 | Yes | T59,T186,T187 | OUTPUT | |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[302:298] | Yes | Yes | *T25,*T4,*T118 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:304] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T73,T75,T76 | Yes | T59,T60,T72 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T73,T192,T193 | Yes | T1,T3,T7 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T193,T194,T195 | Yes | T193,T188,T186 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T73,T75,T196 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T143,T197,T144 | Yes | T143,T197,T144 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T143,T197,T198 | Yes | T143,T197,T198 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T143,T197,T144 | Yes | T143,T197,T144 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T143,T197,T198 | Yes | T143,T197,T198 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T200,T201,T202 | Yes | T200,T201,T202 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T203,T171,T139 | Yes | T203,T171,T139 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T25,T46,T63 | Yes | T25,T7,T99 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T25,T7 | Yes | T46,T101,T63 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T203,T171,T139 | Yes | T203,T171,T139 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T4,T101 | Yes | T59,T72,T73 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[7] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[46:8] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[48] | Yes | Yes | *T204,*T151,*T199 | Yes | T204,T151,T199 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:50] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[180:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[181] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[189:182] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[190] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[217:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[218] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[234:219] | Yes | Yes | *T205,*T204,*T151 | Yes | T205,T204,T151 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:236] | Yes | Yes | *T204,*T151,*T199 | Yes | T204,T151,T199 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T59,T60,T72 | Yes | T2,T25,T100 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T59,T60,T72 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T59,T60,T72 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T72,T73,T74 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |