Module Definition
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Module : alert_handler_reg_top
SCORELINECONDTOGGLEFSMBRANCHASSERT
99.16 100.00 96.63 100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_reg_wrap.u_reg 99.16 100.00 96.63 100.00 100.00

Line Coverage for Module : alert_handler_reg_top
Line No.TotalCoveredPercent
TOTAL22282228100.00
ALWAYS7544100.00
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CONT_ASSIGN1693511100.00
CONT_ASSIGN1693711100.00
CONT_ASSIGN1693811100.00
CONT_ASSIGN1693911100.00
CONT_ASSIGN1694111100.00
CONT_ASSIGN1694211100.00
CONT_ASSIGN1694311100.00
CONT_ASSIGN1694511100.00
CONT_ASSIGN1694611100.00
CONT_ASSIGN1694711100.00
CONT_ASSIGN1694911100.00
CONT_ASSIGN1695011100.00
CONT_ASSIGN1695111100.00
CONT_ASSIGN1695311100.00
CONT_ASSIGN1695411100.00
CONT_ASSIGN1695511100.00
CONT_ASSIGN1695711100.00
CONT_ASSIGN1695811100.00
CONT_ASSIGN1695911100.00
CONT_ASSIGN1696111100.00
CONT_ASSIGN1696211100.00
CONT_ASSIGN1696311100.00
CONT_ASSIGN1696511100.00
CONT_ASSIGN1696611100.00
CONT_ASSIGN1696711100.00
CONT_ASSIGN1696911100.00
CONT_ASSIGN1697011100.00
CONT_ASSIGN1697111100.00
CONT_ASSIGN1697311100.00
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CONT_ASSIGN1697511100.00
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CONT_ASSIGN1698111100.00
CONT_ASSIGN1698211100.00
CONT_ASSIGN1698311100.00
CONT_ASSIGN1698511100.00
CONT_ASSIGN1698611100.00
CONT_ASSIGN1698711100.00
CONT_ASSIGN1698911100.00
CONT_ASSIGN1699011100.00
CONT_ASSIGN1699111100.00
CONT_ASSIGN1699311100.00
CONT_ASSIGN1699411100.00
CONT_ASSIGN1699511100.00
CONT_ASSIGN1699711100.00
CONT_ASSIGN1699811100.00
CONT_ASSIGN1699911100.00
CONT_ASSIGN1700111100.00
CONT_ASSIGN1700211100.00
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CONT_ASSIGN1701011100.00
CONT_ASSIGN1701111100.00
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CONT_ASSIGN1701911100.00
CONT_ASSIGN1702111100.00
CONT_ASSIGN1702211100.00
CONT_ASSIGN1702311100.00
CONT_ASSIGN1702511100.00
CONT_ASSIGN1702611100.00
CONT_ASSIGN1702711100.00
CONT_ASSIGN1702911100.00
CONT_ASSIGN1703011100.00
CONT_ASSIGN1703111100.00
CONT_ASSIGN1703311100.00
CONT_ASSIGN1703411100.00
CONT_ASSIGN1703611100.00
CONT_ASSIGN1703711100.00
CONT_ASSIGN1703911100.00
CONT_ASSIGN1704011100.00
CONT_ASSIGN1704211100.00
CONT_ASSIGN1704311100.00
CONT_ASSIGN1704511100.00
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CONT_ASSIGN1705111100.00
CONT_ASSIGN1705211100.00
CONT_ASSIGN1705411100.00
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CONT_ASSIGN1705811100.00
CONT_ASSIGN1706011100.00
CONT_ASSIGN1706111100.00
CONT_ASSIGN1706311100.00
CONT_ASSIGN1706411100.00
CONT_ASSIGN1706611100.00
CONT_ASSIGN1706711100.00
CONT_ASSIGN1706911100.00
CONT_ASSIGN1707011100.00
CONT_ASSIGN1707211100.00
CONT_ASSIGN1707311100.00
CONT_ASSIGN1707511100.00
CONT_ASSIGN1707611100.00
CONT_ASSIGN1707811100.00
CONT_ASSIGN1707911100.00
CONT_ASSIGN1708111100.00
CONT_ASSIGN1708211100.00
CONT_ASSIGN1708411100.00
CONT_ASSIGN1708511100.00
CONT_ASSIGN1708711100.00
CONT_ASSIGN1708811100.00
CONT_ASSIGN1709011100.00
CONT_ASSIGN1709111100.00
CONT_ASSIGN1709311100.00
CONT_ASSIGN1709411100.00
CONT_ASSIGN1709611100.00
CONT_ASSIGN1709711100.00
CONT_ASSIGN1709911100.00
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CONT_ASSIGN1710911100.00
CONT_ASSIGN1711111100.00
CONT_ASSIGN1711211100.00
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CONT_ASSIGN1711711100.00
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CONT_ASSIGN1712011100.00
CONT_ASSIGN1712111100.00
CONT_ASSIGN1712311100.00
CONT_ASSIGN1712411100.00
CONT_ASSIGN1712611100.00
CONT_ASSIGN1712711100.00
CONT_ASSIGN1712911100.00
CONT_ASSIGN1713011100.00
CONT_ASSIGN1713211100.00
CONT_ASSIGN1713311100.00
CONT_ASSIGN1713511100.00
CONT_ASSIGN1713611100.00
CONT_ASSIGN1713811100.00
CONT_ASSIGN1713911100.00
CONT_ASSIGN1714111100.00
CONT_ASSIGN1714211100.00
CONT_ASSIGN1714411100.00
CONT_ASSIGN1714511100.00
CONT_ASSIGN1714711100.00
CONT_ASSIGN1714811100.00
CONT_ASSIGN1715011100.00
CONT_ASSIGN1715111100.00
CONT_ASSIGN1715311100.00
CONT_ASSIGN1715411100.00
CONT_ASSIGN1715611100.00
CONT_ASSIGN1715711100.00
CONT_ASSIGN1715911100.00
CONT_ASSIGN1716011100.00
CONT_ASSIGN1716211100.00
CONT_ASSIGN1716311100.00
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CONT_ASSIGN1716611100.00
CONT_ASSIGN1716811100.00
CONT_ASSIGN1716911100.00
CONT_ASSIGN1717111100.00
CONT_ASSIGN1717211100.00
CONT_ASSIGN1717411100.00
CONT_ASSIGN1717511100.00
CONT_ASSIGN1717711100.00
CONT_ASSIGN1717811100.00
CONT_ASSIGN1718011100.00
CONT_ASSIGN1718111100.00
CONT_ASSIGN1718311100.00
CONT_ASSIGN1718411100.00
CONT_ASSIGN1718611100.00
CONT_ASSIGN1718711100.00
CONT_ASSIGN1718911100.00
CONT_ASSIGN1719011100.00
CONT_ASSIGN1719211100.00
CONT_ASSIGN1719311100.00
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CONT_ASSIGN1719811100.00
CONT_ASSIGN1719911100.00
CONT_ASSIGN1720111100.00
CONT_ASSIGN1720211100.00
CONT_ASSIGN1720411100.00
CONT_ASSIGN1720511100.00
CONT_ASSIGN1720711100.00
CONT_ASSIGN1720811100.00
CONT_ASSIGN1721011100.00
CONT_ASSIGN1721111100.00
CONT_ASSIGN1721311100.00
CONT_ASSIGN1721411100.00
CONT_ASSIGN1721611100.00
CONT_ASSIGN1721711100.00
CONT_ASSIGN1721911100.00
CONT_ASSIGN1722011100.00
CONT_ASSIGN1722211100.00
CONT_ASSIGN1722311100.00
CONT_ASSIGN1722511100.00
CONT_ASSIGN1722611100.00
CONT_ASSIGN1722811100.00
CONT_ASSIGN1722911100.00
CONT_ASSIGN1723111100.00
CONT_ASSIGN1723211100.00
CONT_ASSIGN1723411100.00
CONT_ASSIGN1723511100.00
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CONT_ASSIGN1723811100.00
CONT_ASSIGN1724011100.00
CONT_ASSIGN1724111100.00
CONT_ASSIGN1724311100.00
CONT_ASSIGN1724411100.00
CONT_ASSIGN1724611100.00
CONT_ASSIGN1724711100.00
CONT_ASSIGN1724911100.00
CONT_ASSIGN1725011100.00
CONT_ASSIGN1725111100.00
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CONT_ASSIGN1726111100.00
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CONT_ASSIGN1727011100.00
CONT_ASSIGN1727111100.00
CONT_ASSIGN1727311100.00
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CONT_ASSIGN1727511100.00
CONT_ASSIGN1727711100.00
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CONT_ASSIGN1728111100.00
CONT_ASSIGN1728211100.00
CONT_ASSIGN1728311100.00
CONT_ASSIGN1728511100.00
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CONT_ASSIGN1729011100.00
CONT_ASSIGN1729111100.00
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CONT_ASSIGN1730311100.00
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CONT_ASSIGN1731111100.00
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CONT_ASSIGN1731711100.00
CONT_ASSIGN1731811100.00
CONT_ASSIGN1732011100.00
CONT_ASSIGN1732111100.00
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CONT_ASSIGN1732911100.00
CONT_ASSIGN1733011100.00
CONT_ASSIGN1733111100.00
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CONT_ASSIGN1733511100.00
CONT_ASSIGN1733711100.00
CONT_ASSIGN1733911100.00
CONT_ASSIGN1734111100.00
CONT_ASSIGN1734311100.00
CONT_ASSIGN1734511100.00
CONT_ASSIGN1734711100.00
CONT_ASSIGN1734911100.00
CONT_ASSIGN1735111100.00
CONT_ASSIGN1735211100.00
CONT_ASSIGN1735411100.00
CONT_ASSIGN1735511100.00
CONT_ASSIGN1735611100.00
CONT_ASSIGN1735811100.00
CONT_ASSIGN1735911100.00
CONT_ASSIGN1736011100.00
CONT_ASSIGN1736111100.00
CONT_ASSIGN1736311100.00
CONT_ASSIGN1736411100.00
CONT_ASSIGN1736511100.00
CONT_ASSIGN1736711100.00
CONT_ASSIGN1736811100.00
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CONT_ASSIGN1737111100.00
CONT_ASSIGN1737211100.00
CONT_ASSIGN1737311100.00
CONT_ASSIGN1737511100.00
CONT_ASSIGN1737611100.00
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CONT_ASSIGN1738011100.00
CONT_ASSIGN1738111100.00
CONT_ASSIGN1738311100.00
CONT_ASSIGN1738411100.00
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CONT_ASSIGN1739011100.00
CONT_ASSIGN1739211100.00
CONT_ASSIGN1739311100.00
CONT_ASSIGN1739411100.00
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CONT_ASSIGN1740211100.00
CONT_ASSIGN1740411100.00
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CONT_ASSIGN1740811100.00
CONT_ASSIGN1741011100.00
CONT_ASSIGN1741211100.00
CONT_ASSIGN1741411100.00
CONT_ASSIGN1741511100.00
CONT_ASSIGN1741711100.00
CONT_ASSIGN1741811100.00
CONT_ASSIGN1741911100.00
CONT_ASSIGN1742111100.00
CONT_ASSIGN1742211100.00
CONT_ASSIGN1742311100.00
CONT_ASSIGN1742411100.00
CONT_ASSIGN1742611100.00
CONT_ASSIGN1742711100.00
CONT_ASSIGN1742811100.00
CONT_ASSIGN1743011100.00
CONT_ASSIGN1743111100.00
CONT_ASSIGN1743211100.00
CONT_ASSIGN1743411100.00
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CONT_ASSIGN1743611100.00
CONT_ASSIGN1743811100.00
CONT_ASSIGN1743911100.00
CONT_ASSIGN1744011100.00
CONT_ASSIGN1744211100.00
CONT_ASSIGN1744311100.00
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CONT_ASSIGN1745011100.00
CONT_ASSIGN1745111100.00
CONT_ASSIGN1745211100.00
CONT_ASSIGN1745311100.00
CONT_ASSIGN1745511100.00
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CONT_ASSIGN1746111100.00
CONT_ASSIGN1746311100.00
CONT_ASSIGN1746511100.00
CONT_ASSIGN1746711100.00
CONT_ASSIGN1746911100.00
CONT_ASSIGN1747111100.00
CONT_ASSIGN1747311100.00
CONT_ASSIGN1747511100.00
CONT_ASSIGN1747711100.00
CONT_ASSIGN1747811100.00
CONT_ASSIGN1748011100.00
CONT_ASSIGN1748111100.00
CONT_ASSIGN1748211100.00
CONT_ASSIGN1748411100.00
CONT_ASSIGN1748511100.00
CONT_ASSIGN1748611100.00
CONT_ASSIGN1748711100.00
CONT_ASSIGN1748911100.00
CONT_ASSIGN1749011100.00
CONT_ASSIGN1749111100.00
CONT_ASSIGN1749311100.00
CONT_ASSIGN1749411100.00
CONT_ASSIGN1749511100.00
CONT_ASSIGN1749711100.00
CONT_ASSIGN1749811100.00
CONT_ASSIGN1749911100.00
CONT_ASSIGN1750111100.00
CONT_ASSIGN1750211100.00
CONT_ASSIGN1750311100.00
CONT_ASSIGN1750511100.00
CONT_ASSIGN1750611100.00
CONT_ASSIGN1750711100.00
CONT_ASSIGN1750911100.00
CONT_ASSIGN1751011100.00
CONT_ASSIGN1751111100.00
CONT_ASSIGN1751311100.00
CONT_ASSIGN1751411100.00
CONT_ASSIGN1751511100.00
CONT_ASSIGN1751611100.00
CONT_ASSIGN1751811100.00
CONT_ASSIGN1751911100.00
CONT_ASSIGN1752011100.00
CONT_ASSIGN1752211100.00
CONT_ASSIGN1752411100.00
CONT_ASSIGN1752611100.00
CONT_ASSIGN1752811100.00
CONT_ASSIGN1753011100.00
CONT_ASSIGN1753211100.00
CONT_ASSIGN1753411100.00
CONT_ASSIGN1753611100.00
CONT_ASSIGN1753811100.00
CONT_ASSIGN1754011100.00
CONT_ASSIGN1754111100.00
CONT_ASSIGN1754311100.00
CONT_ASSIGN1754411100.00
CONT_ASSIGN1754511100.00
CONT_ASSIGN1754711100.00
CONT_ASSIGN1754811100.00
CONT_ASSIGN1754911100.00
CONT_ASSIGN1755011100.00
CONT_ASSIGN1755211100.00
CONT_ASSIGN1755311100.00
CONT_ASSIGN1755411100.00
CONT_ASSIGN1755611100.00
CONT_ASSIGN1755711100.00
CONT_ASSIGN1755811100.00
CONT_ASSIGN1756011100.00
CONT_ASSIGN1756111100.00
CONT_ASSIGN1756211100.00
CONT_ASSIGN1756411100.00
CONT_ASSIGN1756511100.00
CONT_ASSIGN1756611100.00
CONT_ASSIGN1756811100.00
CONT_ASSIGN1756911100.00
CONT_ASSIGN1757011100.00
CONT_ASSIGN1757211100.00
CONT_ASSIGN1757311100.00
CONT_ASSIGN1757411100.00
CONT_ASSIGN1757611100.00
CONT_ASSIGN1757711100.00
CONT_ASSIGN1757811100.00
ALWAYS17582351351100.00
ALWAYS17937397397100.00
ALWAYS1939533100.00
ALWAYS1940333100.00
CONT_ASSIGN1941111100.00
CONT_ASSIGN1941411100.00
CONT_ASSIGN1963411100.00
CONT_ASSIGN1985611100.00
CONT_ASSIGN1986411100.00
CONT_ASSIGN1986511100.00

Click here to see the source line report.

Cond Coverage for Module : alert_handler_reg_top
TotalCoveredPercent
Conditions4802464096.63
Logical4802464096.63
Non-Logical00
Event00

This module contains a very large number of conditions, so the report has been split into multiple pages, by source line number. Click on the line number range in the table below to see the condition coverage for that section of the module.
Line numbersPercent
65-9081100.00
9122-15661100.00
15662-15830100.00
15831-15927100.00
15927100.00
15927100.00
15927-1636199.48
16364-1661595.34
16618-1682789.15
16830-1704389.86
17046-1731896.53
17321-1941189.97

Branch Coverage for Module : alert_handler_reg_top
Line No.TotalCoveredPercent
Branches 360 360 100.00
TERNARY 15923 2 2 100.00
IF 75 3 3 100.00
CASE 17938 351 351 100.00
IF 19395 2 2 100.00
IF 19403 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv' or '../src/lowrisc_opentitan_top_earlgrey_alert_handler_reg_0.1/rtl/alert_handler_reg_top.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 15923 ((reg_re || reg_we)) ?

Branches:
-1-StatusTests
1 Covered T16,T27,T28
0 Covered T16,T27,T28


LineNo. Expression -1-: 75 if ((!rst_ni)) -2-: 77 if ((intg_err || reg_we_err))

Branches:
-1--2-StatusTests
1 - Covered T16,T27,T28
0 1 Covered T187,T177,T189
0 0 Covered T16,T27,T28


LineNo. Expression -1-: 17938 case (1'b1)

Branches:
-1-StatusTests
addr_hit[0] Covered T16,T27,T28
addr_hit[1] Covered T16,T27,T28
addr_hit[2] Covered T16,T27,T28
addr_hit[3] Covered T16,T27,T28
addr_hit[4] Covered T16,T27,T28
addr_hit[5] Covered T16,T27,T28
addr_hit[6] Covered T16,T27,T28
addr_hit[7] Covered T16,T27,T28
addr_hit[8] Covered T16,T27,T28
addr_hit[9] Covered T16,T27,T28
addr_hit[10] Covered T16,T27,T28
addr_hit[11] Covered T16,T27,T28
addr_hit[12] Covered T16,T27,T28
addr_hit[13] Covered T16,T27,T28
addr_hit[14] Covered T16,T27,T28
addr_hit[15] Covered T16,T27,T28
addr_hit[16] Covered T16,T27,T28
addr_hit[17] Covered T16,T27,T28
addr_hit[18] Covered T16,T27,T28
addr_hit[19] Covered T16,T27,T28
addr_hit[20] Covered T16,T27,T28
addr_hit[21] Covered T16,T27,T28
addr_hit[22] Covered T16,T27,T28
addr_hit[23] Covered T16,T27,T28
addr_hit[24] Covered T16,T27,T28
addr_hit[25] Covered T16,T27,T28
addr_hit[26] Covered T16,T27,T28
addr_hit[27] Covered T16,T27,T28
addr_hit[28] Covered T16,T27,T28
addr_hit[29] Covered T16,T27,T28
addr_hit[30] Covered T16,T27,T28
addr_hit[31] Covered T16,T27,T28
addr_hit[32] Covered T16,T27,T28
addr_hit[33] Covered T16,T27,T28
addr_hit[34] Covered T16,T27,T28
addr_hit[35] Covered T16,T27,T28
addr_hit[36] Covered T16,T27,T28
addr_hit[37] Covered T16,T27,T28
addr_hit[38] Covered T16,T27,T28
addr_hit[39] Covered T16,T27,T28
addr_hit[40] Covered T16,T27,T28
addr_hit[41] Covered T16,T27,T28
addr_hit[42] Covered T16,T27,T28
addr_hit[43] Covered T16,T27,T28
addr_hit[44] Covered T16,T27,T28
addr_hit[45] Covered T16,T27,T28
addr_hit[46] Covered T16,T27,T28
addr_hit[47] Covered T16,T27,T28
addr_hit[48] Covered T16,T27,T28
addr_hit[49] Covered T16,T27,T28
addr_hit[50] Covered T16,T27,T28
addr_hit[51] Covered T16,T27,T28
addr_hit[52] Covered T16,T27,T28
addr_hit[53] Covered T16,T27,T28
addr_hit[54] Covered T16,T27,T28
addr_hit[55] Covered T16,T27,T28
addr_hit[56] Covered T16,T27,T28
addr_hit[57] Covered T16,T27,T28
addr_hit[58] Covered T16,T27,T28
addr_hit[59] Covered T16,T27,T28
addr_hit[60] Covered T16,T27,T28
addr_hit[61] Covered T16,T27,T28
addr_hit[62] Covered T16,T27,T28
addr_hit[63] Covered T16,T27,T28
addr_hit[64] Covered T16,T27,T28
addr_hit[65] Covered T16,T27,T28
addr_hit[66] Covered T16,T27,T28
addr_hit[67] Covered T16,T27,T28
addr_hit[68] Covered T16,T27,T28
addr_hit[69] Covered T16,T27,T28
addr_hit[70] Covered T16,T27,T28
addr_hit[71] Covered T16,T27,T28
addr_hit[72] Covered T16,T27,T28
addr_hit[73] Covered T16,T27,T28
addr_hit[74] Covered T16,T27,T28
addr_hit[75] Covered T16,T27,T28
addr_hit[76] Covered T16,T27,T28
addr_hit[77] Covered T16,T27,T28
addr_hit[78] Covered T16,T27,T28
addr_hit[79] Covered T16,T27,T28
addr_hit[80] Covered T16,T27,T28
addr_hit[81] Covered T16,T27,T28
addr_hit[82] Covered T16,T27,T28
addr_hit[83] Covered T16,T27,T28
addr_hit[84] Covered T16,T27,T28
addr_hit[85] Covered T16,T27,T28
addr_hit[86] Covered T16,T27,T28
addr_hit[87] Covered T16,T27,T28
addr_hit[88] Covered T16,T27,T28
addr_hit[89] Covered T16,T27,T28
addr_hit[90] Covered T16,T27,T28
addr_hit[91] Covered T16,T27,T28
addr_hit[92] Covered T16,T27,T28
addr_hit[93] Covered T16,T27,T28
addr_hit[94] Covered T16,T27,T28
addr_hit[95] Covered T16,T27,T28
addr_hit[96] Covered T16,T27,T28
addr_hit[97] Covered T16,T27,T28
addr_hit[98] Covered T16,T27,T28
addr_hit[99] Covered T16,T27,T28
addr_hit[100] Covered T16,T27,T28
addr_hit[101] Covered T16,T27,T28
addr_hit[102] Covered T16,T27,T28
addr_hit[103] Covered T16,T27,T28
addr_hit[104] Covered T16,T27,T28
addr_hit[105] Covered T16,T27,T28
addr_hit[106] Covered T16,T27,T28
addr_hit[107] Covered T16,T27,T28
addr_hit[108] Covered T16,T27,T28
addr_hit[109] Covered T16,T27,T28
addr_hit[110] Covered T16,T27,T28
addr_hit[111] Covered T16,T27,T28
addr_hit[112] Covered T16,T27,T28
addr_hit[113] Covered T16,T27,T28
addr_hit[114] Covered T16,T27,T28
addr_hit[115] Covered T16,T27,T28
addr_hit[116] Covered T16,T27,T28
addr_hit[117] Covered T16,T27,T28
addr_hit[118] Covered T16,T27,T28
addr_hit[119] Covered T16,T27,T28
addr_hit[120] Covered T16,T27,T28
addr_hit[121] Covered T16,T27,T28
addr_hit[122] Covered T16,T27,T28
addr_hit[123] Covered T16,T27,T28
addr_hit[124] Covered T16,T27,T28
addr_hit[125] Covered T16,T27,T28
addr_hit[126] Covered T16,T27,T28
addr_hit[127] Covered T16,T27,T28
addr_hit[128] Covered T16,T27,T28
addr_hit[129] Covered T16,T27,T28
addr_hit[130] Covered T16,T27,T28
addr_hit[131] Covered T16,T27,T28
addr_hit[132] Covered T16,T27,T28
addr_hit[133] Covered T16,T27,T28
addr_hit[134] Covered T16,T27,T28
addr_hit[135] Covered T16,T27,T28
addr_hit[136] Covered T16,T27,T28
addr_hit[137] Covered T16,T27,T28
addr_hit[138] Covered T16,T27,T28
addr_hit[139] Covered T16,T27,T28
addr_hit[140] Covered T16,T27,T28
addr_hit[141] Covered T16,T27,T28
addr_hit[142] Covered T16,T27,T28
addr_hit[143] Covered T16,T27,T28
addr_hit[144] Covered T16,T27,T28
addr_hit[145] Covered T16,T27,T28
addr_hit[146] Covered T16,T27,T28
addr_hit[147] Covered T16,T27,T28
addr_hit[148] Covered T16,T27,T28
addr_hit[149] Covered T16,T27,T28
addr_hit[150] Covered T16,T27,T28
addr_hit[151] Covered T16,T27,T28
addr_hit[152] Covered T16,T27,T28
addr_hit[153] Covered T16,T27,T28
addr_hit[154] Covered T16,T27,T28
addr_hit[155] Covered T16,T27,T28
addr_hit[156] Covered T16,T27,T28
addr_hit[157] Covered T16,T27,T28
addr_hit[158] Covered T16,T27,T28
addr_hit[159] Covered T16,T27,T28
addr_hit[160] Covered T16,T27,T28
addr_hit[161] Covered T16,T27,T28
addr_hit[162] Covered T16,T27,T28
addr_hit[163] Covered T16,T27,T28
addr_hit[164] Covered T16,T27,T28
addr_hit[165] Covered T16,T27,T28
addr_hit[166] Covered T16,T27,T28
addr_hit[167] Covered T16,T27,T28
addr_hit[168] Covered T16,T27,T28
addr_hit[169] Covered T16,T27,T28
addr_hit[170] Covered T16,T27,T28
addr_hit[171] Covered T16,T27,T28
addr_hit[172] Covered T16,T27,T28
addr_hit[173] Covered T16,T27,T28
addr_hit[174] Covered T16,T27,T28
addr_hit[175] Covered T16,T27,T28
addr_hit[176] Covered T16,T27,T28
addr_hit[177] Covered T16,T27,T28
addr_hit[178] Covered T16,T27,T28
addr_hit[179] Covered T16,T27,T28
addr_hit[180] Covered T16,T27,T28
addr_hit[181] Covered T16,T27,T28
addr_hit[182] Covered T16,T27,T28
addr_hit[183] Covered T16,T27,T28
addr_hit[184] Covered T16,T27,T28
addr_hit[185] Covered T16,T27,T28
addr_hit[186] Covered T16,T27,T28
addr_hit[187] Covered T16,T27,T28
addr_hit[188] Covered T16,T27,T28
addr_hit[189] Covered T16,T27,T28
addr_hit[190] Covered T16,T27,T28
addr_hit[191] Covered T16,T27,T28
addr_hit[192] Covered T16,T27,T28
addr_hit[193] Covered T16,T27,T28
addr_hit[194] Covered T16,T27,T28
addr_hit[195] Covered T16,T27,T28
addr_hit[196] Covered T16,T27,T28
addr_hit[197] Covered T16,T27,T28
addr_hit[198] Covered T16,T27,T28
addr_hit[199] Covered T16,T27,T28
addr_hit[200] Covered T16,T27,T28
addr_hit[201] Covered T16,T27,T28
addr_hit[202] Covered T16,T27,T28
addr_hit[203] Covered T16,T27,T28
addr_hit[204] Covered T16,T27,T28
addr_hit[205] Covered T16,T27,T28
addr_hit[206] Covered T16,T27,T28
addr_hit[207] Covered T16,T27,T28
addr_hit[208] Covered T16,T27,T28
addr_hit[209] Covered T16,T27,T28
addr_hit[210] Covered T16,T27,T28
addr_hit[211] Covered T16,T27,T28
addr_hit[212] Covered T16,T27,T28
addr_hit[213] Covered T16,T27,T28
addr_hit[214] Covered T16,T27,T28
addr_hit[215] Covered T16,T27,T28
addr_hit[216] Covered T16,T27,T28
addr_hit[217] Covered T16,T27,T28
addr_hit[218] Covered T16,T27,T28
addr_hit[219] Covered T16,T27,T28
addr_hit[220] Covered T16,T27,T28
addr_hit[221] Covered T16,T27,T28
addr_hit[222] Covered T16,T27,T28
addr_hit[223] Covered T16,T27,T28
addr_hit[224] Covered T16,T27,T28
addr_hit[225] Covered T16,T27,T28
addr_hit[226] Covered T16,T27,T28
addr_hit[227] Covered T16,T27,T28
addr_hit[228] Covered T16,T27,T28
addr_hit[229] Covered T16,T27,T28
addr_hit[230] Covered T16,T27,T28
addr_hit[231] Covered T16,T27,T28
addr_hit[232] Covered T16,T27,T28
addr_hit[233] Covered T16,T27,T28
addr_hit[234] Covered T16,T27,T28
addr_hit[235] Covered T16,T27,T28
addr_hit[236] Covered T16,T27,T28
addr_hit[237] Covered T16,T27,T28
addr_hit[238] Covered T16,T27,T28
addr_hit[239] Covered T16,T27,T28
addr_hit[240] Covered T16,T27,T28
addr_hit[241] Covered T16,T27,T28
addr_hit[242] Covered T16,T27,T28
addr_hit[243] Covered T16,T27,T28
addr_hit[244] Covered T16,T27,T28
addr_hit[245] Covered T16,T27,T28
addr_hit[246] Covered T16,T27,T28
addr_hit[247] Covered T16,T27,T28
addr_hit[248] Covered T16,T27,T28
addr_hit[249] Covered T16,T27,T28
addr_hit[250] Covered T16,T27,T28
addr_hit[251] Covered T16,T27,T28
addr_hit[252] Covered T16,T27,T28
addr_hit[253] Covered T16,T27,T28
addr_hit[254] Covered T16,T27,T28
addr_hit[255] Covered T16,T27,T28
addr_hit[256] Covered T16,T27,T28
addr_hit[257] Covered T16,T27,T28
addr_hit[258] Covered T16,T27,T28
addr_hit[259] Covered T16,T27,T28
addr_hit[260] Covered T16,T27,T28
addr_hit[261] Covered T16,T27,T28
addr_hit[262] Covered T16,T27,T28
addr_hit[263] Covered T16,T27,T28
addr_hit[264] Covered T16,T27,T28
addr_hit[265] Covered T16,T27,T28
addr_hit[266] Covered T16,T27,T28
addr_hit[267] Covered T16,T27,T28
addr_hit[268] Covered T16,T27,T28
addr_hit[269] Covered T16,T27,T28
addr_hit[270] Covered T16,T27,T28
addr_hit[271] Covered T16,T27,T28
addr_hit[272] Covered T16,T27,T28
addr_hit[273] Covered T16,T27,T28
addr_hit[274] Covered T16,T27,T28
addr_hit[275] Covered T16,T27,T28
addr_hit[276] Covered T16,T27,T28
addr_hit[277] Covered T16,T27,T28
addr_hit[278] Covered T16,T27,T28
addr_hit[279] Covered T16,T27,T28
addr_hit[280] Covered T16,T27,T28
addr_hit[281] Covered T16,T27,T28
addr_hit[282] Covered T16,T27,T28
addr_hit[283] Covered T16,T27,T28
addr_hit[284] Covered T16,T27,T28
addr_hit[285] Covered T16,T27,T28
addr_hit[286] Covered T16,T27,T28
addr_hit[287] Covered T16,T27,T28
addr_hit[288] Covered T16,T27,T28
addr_hit[289] Covered T16,T27,T28
addr_hit[290] Covered T16,T27,T28
addr_hit[291] Covered T16,T27,T28
addr_hit[292] Covered T16,T27,T28
addr_hit[293] Covered T16,T27,T28
addr_hit[294] Covered T16,T27,T28
addr_hit[295] Covered T16,T27,T28
addr_hit[296] Covered T16,T27,T28
addr_hit[297] Covered T16,T27,T28
addr_hit[298] Covered T16,T27,T28
addr_hit[299] Covered T16,T27,T28
addr_hit[300] Covered T16,T27,T28
addr_hit[301] Covered T16,T27,T28
addr_hit[302] Covered T16,T27,T28
addr_hit[303] Covered T16,T27,T28
addr_hit[304] Covered T16,T27,T28
addr_hit[305] Covered T16,T27,T28
addr_hit[306] Covered T16,T27,T28
addr_hit[307] Covered T16,T27,T28
addr_hit[308] Covered T16,T27,T28
addr_hit[309] Covered T16,T27,T28
addr_hit[310] Covered T16,T27,T28
addr_hit[311] Covered T16,T27,T28
addr_hit[312] Covered T16,T27,T28
addr_hit[313] Covered T16,T27,T28
addr_hit[314] Covered T16,T27,T28
addr_hit[315] Covered T16,T27,T28
addr_hit[316] Covered T16,T27,T28
addr_hit[317] Covered T16,T27,T28
addr_hit[318] Covered T16,T27,T28
addr_hit[319] Covered T16,T27,T28
addr_hit[320] Covered T16,T27,T28
addr_hit[321] Covered T16,T27,T28
addr_hit[322] Covered T16,T27,T28
addr_hit[323] Covered T16,T27,T28
addr_hit[324] Covered T16,T27,T28
addr_hit[325] Covered T16,T27,T28
addr_hit[326] Covered T16,T27,T28
addr_hit[327] Covered T16,T27,T28
addr_hit[328] Covered T16,T27,T28
addr_hit[329] Covered T16,T27,T28
addr_hit[330] Covered T16,T27,T28
addr_hit[331] Covered T16,T27,T28
addr_hit[332] Covered T16,T27,T28
addr_hit[333] Covered T16,T27,T28
addr_hit[334] Covered T16,T27,T28
addr_hit[335] Covered T16,T27,T28
addr_hit[336] Covered T16,T27,T28
addr_hit[337] Covered T16,T27,T28
addr_hit[338] Covered T16,T27,T28
addr_hit[339] Covered T16,T27,T28
addr_hit[340] Covered T16,T27,T28
addr_hit[341] Covered T16,T27,T28
addr_hit[342] Covered T16,T27,T28
addr_hit[343] Covered T16,T27,T28
addr_hit[344] Covered T16,T27,T28
addr_hit[345] Covered T16,T27,T28
addr_hit[346] Covered T16,T27,T28
addr_hit[347] Covered T16,T27,T28
addr_hit[348] Covered T16,T27,T28
addr_hit[349] Covered T16,T27,T28
default Covered T16,T27,T28


LineNo. Expression -1-: 19395 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T16,T27,T28
0 Covered T16,T27,T28


LineNo. Expression -1-: 19403 if ((!rst_shadowed_ni))

Branches:
-1-StatusTests
1 Covered T16,T27,T28
0 Covered T16,T27,T28


Assert Coverage for Module : alert_handler_reg_top
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 4 4 100.00 4 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 4 4 100.00 4 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
en2addrHit 773625189 97173172 0 0
reAfterRv 773625189 97173140 0 0
rePulse 773625189 14209169 0 0
wePulse 773625189 82963971 0 0


en2addrHit
NameAttemptsReal SuccessesFailuresIncomplete
Total 773625189 97173172 0 0
T16 227174 98473 0 0
T27 392828 55784 0 0
T28 81622 40769 0 0
T29 7179 22 0 0
T30 31463 4075 0 0
T31 82300 40769 0 0
T32 230417 26116 0 0
T33 5126 688 0 0
T34 2030 369 0 0
T35 7394 425 0 0

reAfterRv
NameAttemptsReal SuccessesFailuresIncomplete
Total 773625189 97173140 0 0
T16 227174 98473 0 0
T27 392828 55784 0 0
T28 81622 40769 0 0
T29 7179 22 0 0
T30 31463 4075 0 0
T31 82300 40769 0 0
T32 230417 26116 0 0
T33 5126 688 0 0
T34 2030 369 0 0
T35 7394 425 0 0

rePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 773625189 14209169 0 0
T16 227174 57852 0 0
T27 392828 54943 0 0
T28 81622 16641 0 0
T29 7179 11 0 0
T30 31463 1848 0 0
T31 82300 16641 0 0
T32 230417 25708 0 0
T33 5126 288 0 0
T34 2030 351 0 0
T35 7394 2 0 0

wePulse
NameAttemptsReal SuccessesFailuresIncomplete
Total 773625189 82963971 0 0
T16 227174 40621 0 0
T27 392828 841 0 0
T28 81622 24128 0 0
T29 7179 11 0 0
T30 31463 2227 0 0
T31 82300 24128 0 0
T32 230417 408 0 0
T33 5126 400 0 0
T34 2030 18 0 0
T35 7394 423 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%