Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 66323585 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 32395924 1 T12 2126 T23 58514 T24 5



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14783827 1 T12 2846 T23 109241 T24 11
values[0x0] 40652239 1 T12 1993 T23 40553 T24 5
values[0x1] 43283443 1 T12 2022 T23 40634 T24 6



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56306316 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 42413193 1 T12 3037 T23 86983 T24 10



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 461380 1 T12 20 T23 788 T25 5
valid_sources[0x01] 310118 1 T12 14 T23 759 T26 3
valid_sources[0x02] 307093 1 T12 16 T23 773 T25 5
valid_sources[0x03] 313055 1 T12 33 T23 757 T25 3
valid_sources[0x04] 327925 1 T12 14 T23 749 T26 7
valid_sources[0x05] 319789 1 T12 19 T23 727 T25 5
valid_sources[0x06] 313999 1 T12 27 T23 710 T25 2
valid_sources[0x07] 320479 1 T12 35 T23 741 T25 5
valid_sources[0x08] 313424 1 T12 23 T23 720 T26 4
valid_sources[0x09] 306267 1 T12 15 T23 686 T26 1
valid_sources[0x0a] 313125 1 T12 16 T23 731 T25 3
valid_sources[0x0b] 319850 1 T12 28 T23 710 T25 1
valid_sources[0x0c] 748278 1 T12 32 T23 703 T25 6
valid_sources[0x0d] 319373 1 T12 22 T23 719 T25 5
valid_sources[0x0e] 311537 1 T12 12 T23 768 T25 1
valid_sources[0x0f] 320849 1 T12 23 T23 710 T25 2
valid_sources[0x10] 310202 1 T12 34 T23 678 T25 11
valid_sources[0x11] 321343 1 T12 28 T23 794 T25 3
valid_sources[0x12] 319912 1 T12 31 T23 742 T25 3
valid_sources[0x13] 308638 1 T12 20 T23 753 T25 2
valid_sources[0x14] 330915 1 T12 39 T23 775 T25 9
valid_sources[0x15] 329536 1 T12 21 T23 765 T25 2
valid_sources[0x16] 306448 1 T12 22 T23 824 T25 5
valid_sources[0x17] 326525 1 T12 43 T23 785 T25 2
valid_sources[0x18] 312741 1 T12 38 T23 719 T25 5
valid_sources[0x19] 774043 1 T12 26 T23 764 T25 4
valid_sources[0x1a] 725606 1 T12 27 T23 712 T25 3
valid_sources[0x1b] 517661 1 T12 16 T23 688 T25 2
valid_sources[0x1c] 315678 1 T12 26 T23 812 T25 6
valid_sources[0x1d] 317749 1 T12 25 T23 688 T26 4
valid_sources[0x1e] 309622 1 T12 30 T23 728 T25 3
valid_sources[0x1f] 312564 1 T12 30 T23 726 T25 2
valid_sources[0x20] 714257 1 T12 18 T23 659 T25 4
valid_sources[0x21] 310687 1 T12 22 T23 709 T25 1
valid_sources[0x22] 768938 1 T12 24 T23 727 T27 90
valid_sources[0x23] 303167 1 T12 43 T23 683 T25 4
valid_sources[0x24] 307689 1 T12 35 T23 788 T25 3
valid_sources[0x25] 762979 1 T12 25 T23 734 T26 1
valid_sources[0x26] 314618 1 T12 18 T23 706 T25 10
valid_sources[0x27] 319790 1 T12 23 T23 671 T26 2
valid_sources[0x28] 310054 1 T12 31 T23 717 T25 2
valid_sources[0x29] 323827 1 T12 26 T23 726 T25 3
valid_sources[0x2a] 315093 1 T12 31 T23 704 T25 5
valid_sources[0x2b] 331302 1 T12 27 T23 806 T25 5
valid_sources[0x2c] 319927 1 T12 25 T23 618 T25 6
valid_sources[0x2d] 312255 1 T12 39 T23 789 T25 2
valid_sources[0x2e] 318308 1 T12 16 T23 769 T25 5
valid_sources[0x2f] 308858 1 T12 29 T23 711 T25 3
valid_sources[0x30] 324327 1 T12 43 T23 684 T25 1
valid_sources[0x31] 636862 1 T12 23 T23 778 T25 3
valid_sources[0x32] 302672 1 T12 27 T23 765 T25 3
valid_sources[0x33] 324203 1 T12 40 T23 706 T25 3
valid_sources[0x34] 328684 1 T12 27 T23 733 T26 8
valid_sources[0x35] 308996 1 T12 23 T23 778 T25 1
valid_sources[0x36] 315519 1 T12 15 T23 766 T25 5
valid_sources[0x37] 652677 1 T12 34 T23 769 T26 8
valid_sources[0x38] 316921 1 T12 35 T23 729 T25 5
valid_sources[0x39] 318930 1 T12 25 T23 730 T25 10
valid_sources[0x3a] 741038 1 T12 32 T23 704 T25 2
valid_sources[0x3b] 320238 1 T12 22 T23 755 T25 6
valid_sources[0x3c] 318759 1 T12 33 T23 774 T25 1
valid_sources[0x3d] 326780 1 T12 22 T23 734 T25 6
valid_sources[0x3e] 312469 1 T12 45 T23 701 T26 1
valid_sources[0x3f] 310770 1 T12 34 T23 842 T26 2
valid_sources[0x40] 308796 1 T12 20 T23 690 T25 2
valid_sources[0x41] 313539 1 T12 40 T23 759 T25 4
valid_sources[0x42] 319023 1 T12 34 T23 784 T26 4
valid_sources[0x43] 316952 1 T12 22 T23 789 T26 5
valid_sources[0x44] 311101 1 T12 24 T23 728 T25 6
valid_sources[0x45] 311969 1 T12 26 T23 754 T25 1
valid_sources[0x46] 318355 1 T12 38 T23 726 T25 7
valid_sources[0x47] 309982 1 T12 25 T23 699 T25 1
valid_sources[0x48] 308003 1 T12 18 T23 751 T25 2
valid_sources[0x49] 305126 1 T12 21 T23 747 T25 3
valid_sources[0x4a] 310981 1 T12 19 T23 736 T26 2
valid_sources[0x4b] 309081 1 T12 27 T23 762 T25 3
valid_sources[0x4c] 315153 1 T12 23 T23 778 T25 3
valid_sources[0x4d] 318887 1 T12 26 T23 743 T25 2
valid_sources[0x4e] 711125 1 T12 23 T23 787 T26 3
valid_sources[0x4f] 336661 1 T12 26 T23 736 T25 3
valid_sources[0x50] 309901 1 T12 35 T23 792 T25 8
valid_sources[0x51] 314070 1 T12 29 T23 768 T26 7
valid_sources[0x52] 312292 1 T12 27 T23 738 T25 1
valid_sources[0x53] 313698 1 T12 18 T23 786 T25 2
valid_sources[0x54] 593787 1 T12 12 T23 711 T26 1
valid_sources[0x55] 317213 1 T12 21 T23 715 T26 8
valid_sources[0x56] 314237 1 T12 28 T23 749 T25 7
valid_sources[0x57] 309577 1 T12 34 T23 696 T25 1
valid_sources[0x58] 1032196 1 T12 19 T23 770 T26 7
valid_sources[0x59] 880538 1 T12 16 T23 717 T25 9
valid_sources[0x5a] 1344223 1 T12 27 T23 741 T27 111
valid_sources[0x5b] 325436 1 T12 19 T23 821 T26 1
valid_sources[0x5c] 339420 1 T12 41 T23 653 T26 13
valid_sources[0x5d] 312796 1 T12 31 T23 707 T25 1
valid_sources[0x5e] 314576 1 T12 38 T23 833 T25 2
valid_sources[0x5f] 322845 1 T12 15 T23 825 T25 3
valid_sources[0x60] 317758 1 T12 13 T23 767 T25 3
valid_sources[0x61] 307631 1 T12 29 T23 760 T25 3
valid_sources[0x62] 315923 1 T12 58 T23 776 T25 3
valid_sources[0x63] 365823 1 T12 48 T23 656 T25 4
valid_sources[0x64] 311332 1 T12 25 T23 757 T25 4
valid_sources[0x65] 309210 1 T12 25 T23 708 T25 2
valid_sources[0x66] 317140 1 T12 17 T23 719 T25 6
valid_sources[0x67] 319814 1 T12 22 T23 771 T25 1
valid_sources[0x68] 336453 1 T12 24 T23 765 T25 3
valid_sources[0x69] 595638 1 T12 21 T23 734 T25 4
valid_sources[0x6a] 319833 1 T12 40 T23 768 T25 10
valid_sources[0x6b] 724552 1 T12 35 T23 739 T25 1
valid_sources[0x6c] 303661 1 T12 20 T23 700 T25 4
valid_sources[0x6d] 308270 1 T12 33 T23 748 T26 24
valid_sources[0x6e] 305567 1 T12 33 T23 739 T25 7
valid_sources[0x6f] 317023 1 T12 36 T23 763 T25 5
valid_sources[0x70] 324464 1 T12 17 T23 806 T26 10
valid_sources[0x71] 324730 1 T12 37 T23 743 T26 3
valid_sources[0x72] 313038 1 T12 32 T23 726 T25 1
valid_sources[0x73] 319725 1 T12 22 T23 747 T25 1
valid_sources[0x74] 312983 1 T12 25 T23 728 T25 4
valid_sources[0x75] 793209 1 T12 30 T23 696 T25 2
valid_sources[0x76] 309755 1 T12 31 T23 753 T26 11
valid_sources[0x77] 309136 1 T12 16 T23 763 T25 5
valid_sources[0x78] 313655 1 T12 23 T23 741 T25 5
valid_sources[0x79] 655357 1 T12 20 T23 737 T25 2
valid_sources[0x7a] 310701 1 T12 25 T23 789 T25 2
valid_sources[0x7b] 792240 1 T12 21 T23 680 T25 7
valid_sources[0x7c] 308966 1 T12 43 T23 789 T26 1
valid_sources[0x7d] 322852 1 T12 32 T23 770 T25 7
valid_sources[0x7e] 316979 1 T12 9 T23 718 T25 4
valid_sources[0x7f] 304724 1 T12 28 T23 757 T25 2
valid_sources[0x80] 315267 1 T12 24 T23 735 T25 2



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 7426784 1 T12 740 T23 36439 T24 3
values[0x0] all_enables biggest_size 15701485 1 T12 852 T23 14467 T24 1
values[0x1] all_enables biggest_size 9267655 1 T12 534 T23 7608 T24 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%