Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 66046889 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 32421219 1 T14 323 T23 31169 T24 11



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14773065 1 T14 350 T23 58703 T24 11
values[0x0] 40451329 1 T14 191 T23 20248 T24 7
values[0x1] 43243714 1 T14 210 T23 20341 T24 4



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 55951898 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 42516210 1 T14 415 T23 46105 T24 13



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 693955 1 T14 8 T23 349 T24 1
valid_sources[0x01] 690196 1 T14 4 T23 407 T26 2
valid_sources[0x02] 317630 1 T14 2 T23 364 T26 1
valid_sources[0x03] 688336 1 T23 423 T26 1 T30 1
valid_sources[0x04] 328580 1 T14 2 T23 394 T26 5
valid_sources[0x05] 323968 1 T14 1 T23 376 T26 6
valid_sources[0x06] 337425 1 T23 416 T26 1 T29 2
valid_sources[0x07] 332230 1 T14 1 T23 400 T26 5
valid_sources[0x08] 799140 1 T14 3 T23 367 T26 6
valid_sources[0x09] 324647 1 T14 1 T23 442 T26 1
valid_sources[0x0a] 317757 1 T14 2 T23 400 T26 2
valid_sources[0x0b] 574252 1 T14 2 T23 388 T26 6
valid_sources[0x0c] 322741 1 T14 4 T23 433 T26 7
valid_sources[0x0d] 325753 1 T14 4 T23 381 T26 4
valid_sources[0x0e] 323669 1 T14 1 T23 401 T26 2
valid_sources[0x0f] 318422 1 T14 2 T23 387 T24 1
valid_sources[0x10] 323049 1 T14 4 T23 383 T26 1
valid_sources[0x11] 324002 1 T14 3 T23 397 T29 1
valid_sources[0x12] 791370 1 T14 4 T23 408 T26 2
valid_sources[0x13] 324041 1 T14 1 T23 370 T26 5
valid_sources[0x14] 332873 1 T14 4 T23 410 T26 3
valid_sources[0x15] 324030 1 T14 6 T23 381 T26 10
valid_sources[0x16] 322275 1 T14 5 T23 397 T24 1
valid_sources[0x17] 993647 1 T14 5 T23 396 T26 3
valid_sources[0x18] 325709 1 T14 5 T23 341 T26 4
valid_sources[0x19] 317834 1 T14 2 T23 376 T26 2
valid_sources[0x1a] 316643 1 T14 6 T23 349 T26 4
valid_sources[0x1b] 321079 1 T14 3 T23 345 T26 7
valid_sources[0x1c] 318204 1 T14 2 T23 404 T26 2
valid_sources[0x1d] 328188 1 T14 4 T23 397 T24 1
valid_sources[0x1e] 773136 1 T14 7 T23 362 T26 5
valid_sources[0x1f] 325607 1 T14 6 T23 389 T26 1
valid_sources[0x20] 324413 1 T14 3 T23 380 T26 4
valid_sources[0x21] 325089 1 T14 5 T23 415 T26 5
valid_sources[0x22] 321237 1 T14 2 T23 384 T24 1
valid_sources[0x23] 322111 1 T14 1 T23 385 T26 7
valid_sources[0x24] 330811 1 T14 8 T23 397 T26 5
valid_sources[0x25] 320253 1 T14 2 T23 395 T26 2
valid_sources[0x26] 322904 1 T23 422 T29 2 T31 2
valid_sources[0x27] 321931 1 T14 2 T23 396 T26 2
valid_sources[0x28] 320724 1 T14 1 T23 416 T26 3
valid_sources[0x29] 319917 1 T14 5 T23 352 T26 3
valid_sources[0x2a] 323105 1 T14 1 T23 332 T26 4
valid_sources[0x2b] 338743 1 T14 3 T23 351 T26 1
valid_sources[0x2c] 324212 1 T14 1 T23 418 T26 3
valid_sources[0x2d] 320769 1 T14 2 T23 378 T26 1
valid_sources[0x2e] 335581 1 T14 2 T23 395 T26 1
valid_sources[0x2f] 1363843 1 T14 2 T23 376 T26 4
valid_sources[0x30] 320799 1 T14 4 T23 357 T26 2
valid_sources[0x31] 322379 1 T14 2 T23 355 T24 2
valid_sources[0x32] 320205 1 T14 3 T23 400 T26 4
valid_sources[0x33] 325081 1 T14 3 T23 396 T26 1
valid_sources[0x34] 329393 1 T23 342 T26 2 T27 1
valid_sources[0x35] 333589 1 T14 8 T23 451 T26 4
valid_sources[0x36] 711355 1 T14 1 T23 416 T26 1
valid_sources[0x37] 577065 1 T14 2 T23 423 T26 2
valid_sources[0x38] 332946 1 T14 1 T23 387 T25 1
valid_sources[0x39] 326750 1 T14 2 T23 402 T26 3
valid_sources[0x3a] 325297 1 T14 4 T23 341 T24 1
valid_sources[0x3b] 319988 1 T14 4 T23 393 T26 3
valid_sources[0x3c] 318971 1 T14 3 T23 380 T26 6
valid_sources[0x3d] 329861 1 T14 2 T23 421 T26 4
valid_sources[0x3e] 336305 1 T14 4 T23 418 T26 4
valid_sources[0x3f] 318919 1 T14 1 T23 378 T26 2
valid_sources[0x40] 335280 1 T14 5 T23 379 T26 4
valid_sources[0x41] 1004767 1 T23 413 T26 6 T28 3
valid_sources[0x42] 326556 1 T14 4 T23 417 T26 2
valid_sources[0x43] 315698 1 T14 8 T23 335 T26 6
valid_sources[0x44] 620743 1 T14 5 T23 389 T26 3
valid_sources[0x45] 334554 1 T14 5 T23 403 T26 3
valid_sources[0x46] 319055 1 T14 2 T23 368 T26 6
valid_sources[0x47] 330710 1 T14 6 T23 354 T26 4
valid_sources[0x48] 323457 1 T14 2 T23 412 T26 5
valid_sources[0x49] 685304 1 T14 1 T23 385 T24 2
valid_sources[0x4a] 319968 1 T14 4 T23 375 T26 5
valid_sources[0x4b] 330077 1 T14 1 T23 415 T26 3
valid_sources[0x4c] 697403 1 T14 2 T23 360 T26 4
valid_sources[0x4d] 607111 1 T14 4 T23 382 T26 3
valid_sources[0x4e] 432713 1 T14 7 T23 376 T26 5
valid_sources[0x4f] 328565 1 T14 2 T23 426 T26 2
valid_sources[0x50] 326397 1 T14 2 T23 384 T24 2
valid_sources[0x51] 319136 1 T23 393 T31 3 T120 6
valid_sources[0x52] 328123 1 T14 5 T23 384 T26 3
valid_sources[0x53] 314107 1 T14 2 T23 404 T26 1
valid_sources[0x54] 322647 1 T14 4 T23 410 T26 7
valid_sources[0x55] 318275 1 T14 1 T23 351 T25 3
valid_sources[0x56] 612227 1 T14 4 T23 399 T26 3
valid_sources[0x57] 325297 1 T14 5 T23 426 T26 3
valid_sources[0x58] 606548 1 T14 3 T23 379 T26 2
valid_sources[0x59] 324273 1 T14 4 T23 415 T25 3
valid_sources[0x5a] 328418 1 T14 4 T23 396 T26 2
valid_sources[0x5b] 325216 1 T14 4 T23 401 T25 1
valid_sources[0x5c] 566855 1 T14 6 T23 375 T26 4
valid_sources[0x5d] 326705 1 T14 8 T23 358 T26 4
valid_sources[0x5e] 317814 1 T14 4 T23 372 T26 3
valid_sources[0x5f] 322958 1 T14 4 T23 405 T26 3
valid_sources[0x60] 321291 1 T14 1 T23 372 T26 7
valid_sources[0x61] 318673 1 T14 1 T23 391 T26 2
valid_sources[0x62] 321726 1 T14 2 T23 413 T26 3
valid_sources[0x63] 313330 1 T14 6 T23 392 T26 5
valid_sources[0x64] 340793 1 T14 8 T23 322 T26 2
valid_sources[0x65] 323447 1 T14 1 T23 373 T26 7
valid_sources[0x66] 323431 1 T14 3 T23 427 T26 5
valid_sources[0x67] 322403 1 T14 1 T23 376 T26 2
valid_sources[0x68] 317109 1 T14 1 T23 397 T26 4
valid_sources[0x69] 323923 1 T14 6 T23 383 T26 3
valid_sources[0x6a] 317744 1 T14 3 T23 393 T26 5
valid_sources[0x6b] 331560 1 T14 3 T23 362 T26 3
valid_sources[0x6c] 322759 1 T14 4 T23 363 T25 1
valid_sources[0x6d] 326953 1 T14 4 T23 386 T26 7
valid_sources[0x6e] 326404 1 T14 4 T23 375 T26 2
valid_sources[0x6f] 318381 1 T23 372 T26 2 T31 1
valid_sources[0x70] 370454 1 T14 2 T23 417 T26 6
valid_sources[0x71] 521910 1 T14 1 T23 417 T26 2
valid_sources[0x72] 321969 1 T14 1 T23 414 T26 7
valid_sources[0x73] 333141 1 T23 343 T26 1 T29 1
valid_sources[0x74] 320505 1 T14 4 T23 367 T26 1
valid_sources[0x75] 318175 1 T14 1 T23 402 T26 3
valid_sources[0x76] 349575 1 T14 4 T23 433 T26 4
valid_sources[0x77] 325922 1 T14 2 T23 437 T26 6
valid_sources[0x78] 316577 1 T14 3 T23 402 T26 4
valid_sources[0x79] 324589 1 T14 1 T23 368 T26 4
valid_sources[0x7a] 321243 1 T14 4 T23 357 T26 2
valid_sources[0x7b] 315148 1 T14 3 T23 384 T26 6
valid_sources[0x7c] 321663 1 T14 1 T23 389 T24 1
valid_sources[0x7d] 331919 1 T14 1 T23 419 T26 5
valid_sources[0x7e] 319281 1 T14 2 T23 347 T26 2
valid_sources[0x7f] 317756 1 T14 4 T23 370 T26 3
valid_sources[0x80] 522434 1 T14 6 T23 407 T26 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 7470713 1 T14 187 T23 20195 T24 6
values[0x0] all_enables biggest_size 15670903 1 T14 80 T23 7144 T24 4
values[0x1] all_enables biggest_size 9279603 1 T14 56 T23 3830 T24 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%