Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69162438	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33854672

1

T1

11494

T2

100996

T3

110

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	15326343	1			T1	4332		T2	40512		T3	61
values[0x0]	42343786	1			T1	16745		T2	139333		T3	162
values[0x1]	45346981	1			T1	16595		T2	137935		T3	183

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	58569436	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

44447674

1

T1

14655

T2

127744

T3

153

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	344555	1			T1	134		T2	1221		T19	30
valid_sources[0x01]	349309	1			T1	130		T2	1261		T19	36
valid_sources[0x02]	677950	1			T1	159		T2	1284		T19	30
valid_sources[0x03]	349670	1			T1	160		T2	1262		T19	32
valid_sources[0x04]	350056	1			T1	148		T2	1183		T3	7
valid_sources[0x05]	646289	1			T1	157		T2	1236		T19	31
valid_sources[0x06]	343983	1			T1	166		T2	1203		T19	30
valid_sources[0x07]	351623	1			T1	163		T2	1214		T3	6
valid_sources[0x08]	347830	1			T1	140		T2	1244		T19	30
valid_sources[0x09]	365485	1			T1	149		T2	1229		T19	38
valid_sources[0x0a]	349460	1			T1	145		T2	1201		T3	12
valid_sources[0x0b]	353228	1			T1	120		T2	1250		T19	31
valid_sources[0x0c]	355062	1			T1	176		T2	1233		T3	18
valid_sources[0x0d]	342631	1			T1	142		T2	1263		T3	1
valid_sources[0x0e]	768558	1			T1	137		T2	1198		T3	5
valid_sources[0x0f]	349621	1			T1	132		T2	1233		T19	41
valid_sources[0x10]	348081	1			T1	118		T2	1306		T19	30
valid_sources[0x11]	356142	1			T1	182		T2	1227		T3	10
valid_sources[0x12]	627823	1			T1	143		T2	1181		T19	32
valid_sources[0x13]	361580	1			T1	140		T2	1204		T19	22
valid_sources[0x14]	345250	1			T1	125		T2	1174		T19	35
valid_sources[0x15]	345270	1			T1	117		T2	1306		T3	5
valid_sources[0x16]	557748	1			T1	138		T2	1206		T19	28
valid_sources[0x17]	343812	1			T1	146		T2	1178		T3	1
valid_sources[0x18]	348628	1			T1	152		T2	1340		T3	8
valid_sources[0x19]	349549	1			T1	136		T2	1253		T3	7
valid_sources[0x1a]	342325	1			T1	144		T2	1220		T3	7
valid_sources[0x1b]	353928	1			T1	125		T2	1258		T19	41
valid_sources[0x1c]	349154	1			T1	137		T2	1225		T19	38
valid_sources[0x1d]	344075	1			T1	140		T2	1227		T3	3
valid_sources[0x1e]	356506	1			T1	135		T2	1253		T19	27
valid_sources[0x1f]	340840	1			T1	157		T2	1299		T19	41
valid_sources[0x20]	338284	1			T1	152		T2	1252		T3	9
valid_sources[0x21]	345091	1			T1	142		T2	1172		T19	33
valid_sources[0x22]	352403	1			T1	129		T2	1362		T19	40
valid_sources[0x23]	349901	1			T1	162		T2	1250		T3	8
valid_sources[0x24]	346738	1			T1	152		T2	1182		T19	39
valid_sources[0x25]	357734	1			T1	128		T2	1322		T19	38
valid_sources[0x26]	345331	1			T1	160		T2	1277		T19	28
valid_sources[0x27]	681186	1			T1	146		T2	1271		T19	36
valid_sources[0x28]	344554	1			T1	137		T2	1298		T19	42
valid_sources[0x29]	348415	1			T1	168		T2	1205		T3	2
valid_sources[0x2a]	344753	1			T1	135		T2	1265		T19	36
valid_sources[0x2b]	348403	1			T1	139		T2	1242		T3	9
valid_sources[0x2c]	344021	1			T1	144		T2	1186		T19	32
valid_sources[0x2d]	349531	1			T1	161		T2	1248		T3	2
valid_sources[0x2e]	356792	1			T1	145		T2	1221		T19	29
valid_sources[0x2f]	342229	1			T1	152		T2	1277		T19	36
valid_sources[0x30]	349431	1			T1	136		T2	1234		T19	27
valid_sources[0x31]	352406	1			T1	163		T2	1276		T19	40
valid_sources[0x32]	341454	1			T1	149		T2	1261		T19	46
valid_sources[0x33]	344432	1			T1	156		T2	1187		T19	32
valid_sources[0x34]	346854	1			T1	141		T2	1256		T19	37
valid_sources[0x35]	348695	1			T1	138		T2	1230		T19	39
valid_sources[0x36]	361228	1			T1	158		T2	1258		T19	28
valid_sources[0x37]	342406	1			T1	144		T2	1222		T19	30
valid_sources[0x38]	347843	1			T1	146		T2	1229		T3	2
valid_sources[0x39]	349551	1			T1	159		T2	1219		T19	47
valid_sources[0x3a]	348620	1			T1	144		T2	1150		T19	26
valid_sources[0x3b]	343182	1			T1	122		T2	1237		T3	1
valid_sources[0x3c]	605456	1			T1	169		T2	1314		T19	36
valid_sources[0x3d]	349403	1			T1	150		T2	1222		T19	25
valid_sources[0x3e]	348721	1			T1	121		T2	1179		T19	34
valid_sources[0x3f]	347219	1			T1	126		T2	1256		T19	38
valid_sources[0x40]	700365	1			T1	149		T2	1183		T3	3
valid_sources[0x41]	343070	1			T1	123		T2	1224		T19	37
valid_sources[0x42]	347489	1			T1	142		T2	1263		T19	32
valid_sources[0x43]	796746	1			T1	141		T2	1240		T19	26
valid_sources[0x44]	343399	1			T1	146		T2	1238		T19	34
valid_sources[0x45]	712324	1			T1	146		T2	1199		T19	36
valid_sources[0x46]	349895	1			T1	149		T2	1228		T19	32
valid_sources[0x47]	343728	1			T1	140		T2	1196		T19	37
valid_sources[0x48]	826284	1			T1	131		T2	1279		T19	28
valid_sources[0x49]	344649	1			T1	159		T2	1179		T3	2
valid_sources[0x4a]	672485	1			T1	120		T2	1283		T19	42
valid_sources[0x4b]	354847	1			T1	150		T2	1249		T19	44
valid_sources[0x4c]	357562	1			T1	169		T2	1255		T19	35
valid_sources[0x4d]	359143	1			T1	143		T2	1252		T19	31
valid_sources[0x4e]	343861	1			T1	147		T2	1241		T19	43
valid_sources[0x4f]	718589	1			T1	131		T2	1246		T3	2
valid_sources[0x50]	792303	1			T1	178		T2	1167		T19	36
valid_sources[0x51]	712123	1			T1	168		T2	1228		T19	46
valid_sources[0x52]	342750	1			T1	131		T2	1291		T3	6
valid_sources[0x53]	349489	1			T1	142		T2	1231		T19	45
valid_sources[0x54]	343616	1			T1	168		T2	1202		T19	34
valid_sources[0x55]	342740	1			T1	143		T2	1329		T19	29
valid_sources[0x56]	347780	1			T1	149		T2	1277		T19	36
valid_sources[0x57]	354609	1			T1	150		T2	1198		T19	36
valid_sources[0x58]	339962	1			T1	159		T2	1314		T19	30
valid_sources[0x59]	357488	1			T1	113		T2	1189		T19	27
valid_sources[0x5a]	348271	1			T1	163		T2	1185		T19	53
valid_sources[0x5b]	344891	1			T1	131		T2	1168		T19	30
valid_sources[0x5c]	360755	1			T1	155		T2	1246		T19	30
valid_sources[0x5d]	346305	1			T1	149		T2	1220		T3	2
valid_sources[0x5e]	344403	1			T1	112		T2	1262		T3	2
valid_sources[0x5f]	348338	1			T1	153		T2	1300		T19	35
valid_sources[0x60]	343949	1			T1	161		T2	1213		T19	51
valid_sources[0x61]	351370	1			T1	128		T2	1293		T19	45
valid_sources[0x62]	829206	1			T1	149		T2	1211		T19	40
valid_sources[0x63]	345494	1			T1	154		T2	1294		T19	37
valid_sources[0x64]	361527	1			T1	134		T2	1313		T19	40
valid_sources[0x65]	345737	1			T1	167		T2	1217		T3	1
valid_sources[0x66]	343007	1			T1	166		T2	1226		T19	31
valid_sources[0x67]	351622	1			T1	141		T2	1285		T3	8
valid_sources[0x68]	343471	1			T1	116		T2	1201		T19	44
valid_sources[0x69]	797967	1			T1	160		T2	1269		T19	34
valid_sources[0x6a]	679456	1			T1	160		T2	1237		T19	29
valid_sources[0x6b]	344100	1			T1	132		T2	1205		T19	26
valid_sources[0x6c]	348745	1			T1	121		T2	1226		T19	34
valid_sources[0x6d]	345619	1			T1	157		T2	1296		T19	40
valid_sources[0x6e]	345454	1			T1	148		T2	1218		T19	31
valid_sources[0x6f]	344736	1			T1	132		T2	1268		T19	34
valid_sources[0x70]	344295	1			T1	151		T2	1206		T19	35
valid_sources[0x71]	341184	1			T1	142		T2	1228		T19	40
valid_sources[0x72]	344421	1			T1	136		T2	1158		T3	1
valid_sources[0x73]	342218	1			T1	169		T2	1176		T19	33
valid_sources[0x74]	347889	1			T1	144		T2	1203		T3	11
valid_sources[0x75]	623535	1			T1	155		T2	1290		T19	27
valid_sources[0x76]	343937	1			T1	165		T2	1228		T19	42
valid_sources[0x77]	346486	1			T1	152		T2	1308		T19	33
valid_sources[0x78]	514861	1			T1	159		T2	1158		T3	7
valid_sources[0x79]	347436	1			T1	145		T2	1233		T3	1
valid_sources[0x7a]	340946	1			T1	160		T2	1324		T19	43
valid_sources[0x7b]	347608	1			T1	142		T2	1284		T19	29
valid_sources[0x7c]	344201	1			T1	149		T2	1263		T19	45
valid_sources[0x7d]	344832	1			T1	150		T2	1278		T19	30
valid_sources[0x7e]	343226	1			T1	147		T2	1224		T19	44
valid_sources[0x7f]	342679	1			T1	165		T2	1185		T19	32
valid_sources[0x80]	343405	1			T1	144		T2	1217		T19	37

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7731162

1

T1

2153

T2

20060

T3

29

values[0x0]

all_enables

biggest_size

16406296

1

T1

6071

T2

51945

T3

50

values[0x1]

all_enables

biggest_size

9717214

1

T1

3270

T2

28991

T3

31