Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61765274	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

29834044

1

T1

1660

T2

870

T3

109724

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	13803209	1			T1	667		T2	302		T3	42722
values[0x0]	38026241	1			T1	2204		T2	1286		T3	151877
values[0x1]	39769868	1			T1	2164		T2	1256		T3	150947

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52853424	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

38745894

1

T1

2073

T2

1100

T3

138322

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	297396	1			T1	7		T2	12		T3	1333
valid_sources[0x01]	296235	1			T1	17		T2	27		T3	1386
valid_sources[0x02]	296225	1			T1	5		T2	23		T3	1379
valid_sources[0x03]	296410	1			T1	23		T2	16		T3	1260
valid_sources[0x04]	293003	1			T1	9		T3	1356		T5	12
valid_sources[0x05]	291822	1			T1	9		T2	8		T3	1378
valid_sources[0x06]	299551	1			T1	32		T2	17		T3	1384
valid_sources[0x07]	328435	1			T1	15		T2	8		T3	1275
valid_sources[0x08]	517919	1			T1	22		T2	10		T3	1418
valid_sources[0x09]	291248	1			T1	28		T2	13		T3	1341
valid_sources[0x0a]	295750	1			T1	2		T2	3		T3	1341
valid_sources[0x0b]	303748	1			T1	14		T2	7		T3	1335
valid_sources[0x0c]	312612	1			T2	14		T3	1334		T4	930
valid_sources[0x0d]	299572	1			T1	22		T3	1375		T5	41
valid_sources[0x0e]	301378	1			T1	2		T3	1336		T4	912
valid_sources[0x0f]	291012	1			T1	22		T2	48		T3	1439
valid_sources[0x10]	291899	1			T1	17		T2	27		T3	1324
valid_sources[0x11]	294263	1			T1	27		T2	6		T3	1321
valid_sources[0x12]	293951	1			T1	44		T3	1324		T5	11
valid_sources[0x13]	679000	1			T1	12		T2	13		T3	1360
valid_sources[0x14]	296279	1			T1	19		T3	1373		T5	38
valid_sources[0x15]	298979	1			T1	14		T2	5		T3	1288
valid_sources[0x16]	302632	1			T1	39		T2	37		T3	1297
valid_sources[0x17]	299143	1			T1	9		T2	13		T3	1303
valid_sources[0x18]	301801	1			T1	30		T2	44		T3	1250
valid_sources[0x19]	304751	1			T1	18		T2	10		T3	1242
valid_sources[0x1a]	292994	1			T1	30		T2	4		T3	1343
valid_sources[0x1b]	755619	1			T1	29		T2	64		T3	1444
valid_sources[0x1c]	298492	1			T1	13		T3	1359		T5	8
valid_sources[0x1d]	310345	1			T1	17		T3	1402		T4	917
valid_sources[0x1e]	320058	1			T1	23		T3	1239		T5	3
valid_sources[0x1f]	304148	1			T1	25		T3	1247		T5	13
valid_sources[0x20]	294283	1			T1	9		T3	1434		T5	3
valid_sources[0x21]	721141	1			T1	18		T2	9		T3	1386
valid_sources[0x22]	322688	1			T1	1		T3	1397		T5	1
valid_sources[0x23]	300144	1			T1	28		T2	8		T3	1348
valid_sources[0x24]	299909	1			T1	21		T2	10		T3	1388
valid_sources[0x25]	291347	1			T1	4		T2	20		T3	1316
valid_sources[0x26]	296213	1			T1	21		T3	1271		T5	9
valid_sources[0x27]	294228	1			T1	10		T3	1337		T5	32
valid_sources[0x28]	289669	1			T1	23		T3	1412		T5	1
valid_sources[0x29]	303715	1			T1	2		T2	43		T3	1436
valid_sources[0x2a]	288698	1			T1	30		T2	10		T3	1215
valid_sources[0x2b]	294836	1			T1	51		T3	1296		T4	1024
valid_sources[0x2c]	319633	1			T1	22		T3	1317		T5	1
valid_sources[0x2d]	296554	1			T1	5		T3	1330		T5	16
valid_sources[0x2e]	311116	1			T1	26		T3	1335		T5	11
valid_sources[0x2f]	295779	1			T1	22		T3	1387		T5	47
valid_sources[0x30]	289599	1			T1	30		T3	1381		T5	2
valid_sources[0x31]	748366	1			T1	15		T2	10		T3	1393
valid_sources[0x32]	295447	1			T1	20		T3	1374		T4	964
valid_sources[0x33]	542084	1			T1	21		T2	23		T3	1308
valid_sources[0x34]	291134	1			T1	13		T2	9		T3	1381
valid_sources[0x35]	296555	1			T1	56		T3	1391		T5	23
valid_sources[0x36]	309999	1			T1	17		T3	1392		T5	7
valid_sources[0x37]	737624	1			T1	8		T2	3		T3	1367
valid_sources[0x38]	307780	1			T1	53		T3	1382		T4	968
valid_sources[0x39]	300661	1			T1	10		T2	22		T3	1299
valid_sources[0x3a]	309625	1			T1	28		T3	1276		T5	2
valid_sources[0x3b]	583539	1			T1	14		T3	1321		T5	31
valid_sources[0x3c]	548603	1			T1	36		T2	5		T3	1371
valid_sources[0x3d]	293808	1			T1	18		T2	3		T3	1424
valid_sources[0x3e]	291625	1			T1	8		T2	37		T3	1390
valid_sources[0x3f]	323465	1			T1	18		T3	1295		T4	786
valid_sources[0x40]	303169	1			T1	13		T3	1351		T5	24
valid_sources[0x41]	296870	1			T1	11		T3	1320		T5	5
valid_sources[0x42]	304175	1			T1	21		T2	20		T3	1350
valid_sources[0x43]	290842	1			T1	41		T2	14		T3	1406
valid_sources[0x44]	302592	1			T1	6		T3	1268		T4	1032
valid_sources[0x45]	309517	1			T1	11		T2	20		T3	1289
valid_sources[0x46]	789603	1			T1	15		T2	22		T3	1415
valid_sources[0x47]	301568	1			T1	10		T2	74		T3	1296
valid_sources[0x48]	715670	1			T1	55		T2	42		T3	1291
valid_sources[0x49]	625089	1			T1	17		T2	11		T3	1382
valid_sources[0x4a]	290324	1			T1	16		T3	1418		T4	975
valid_sources[0x4b]	295095	1			T1	19		T2	36		T3	1368
valid_sources[0x4c]	290627	1			T1	37		T3	1255		T5	9
valid_sources[0x4d]	291949	1			T1	38		T2	13		T3	1384
valid_sources[0x4e]	297860	1			T1	23		T3	1358		T4	983
valid_sources[0x4f]	301566	1			T1	22		T2	7		T3	1284
valid_sources[0x50]	299061	1			T1	22		T2	2		T3	1357
valid_sources[0x51]	296307	1			T1	22		T2	1		T3	1311
valid_sources[0x52]	639676	1			T1	15		T2	3		T3	1418
valid_sources[0x53]	780481	1			T1	29		T3	1478		T5	64
valid_sources[0x54]	295122	1			T1	36		T3	1399		T5	36
valid_sources[0x55]	669398	1			T1	16		T2	15		T3	1460
valid_sources[0x56]	302369	1			T1	26		T3	1363		T4	924
valid_sources[0x57]	299374	1			T1	49		T3	1334		T5	29
valid_sources[0x58]	299706	1			T1	20		T2	18		T3	1290
valid_sources[0x59]	303598	1			T1	6		T2	13		T3	1316
valid_sources[0x5a]	295221	1			T1	14		T2	4		T3	1409
valid_sources[0x5b]	297515	1			T1	18		T2	5		T3	1313
valid_sources[0x5c]	299487	1			T1	14		T3	1351		T4	990
valid_sources[0x5d]	534699	1			T1	25		T3	1313		T5	4
valid_sources[0x5e]	297759	1			T1	60		T2	92		T3	1271
valid_sources[0x5f]	303467	1			T1	10		T2	25		T3	1272
valid_sources[0x60]	290114	1			T1	35		T3	1301		T5	7
valid_sources[0x61]	323918	1			T1	19		T3	1423		T4	867
valid_sources[0x62]	294088	1			T1	25		T2	10		T3	1265
valid_sources[0x63]	311852	1			T1	21		T3	1322		T4	915
valid_sources[0x64]	304925	1			T1	21		T2	3		T3	1306
valid_sources[0x65]	291663	1			T1	11		T2	40		T3	1269
valid_sources[0x66]	614118	1			T1	10		T3	1215		T4	960
valid_sources[0x67]	288673	1			T1	16		T3	1301		T5	19
valid_sources[0x68]	304556	1			T1	10		T2	23		T3	1393
valid_sources[0x69]	659138	1			T1	15		T2	27		T3	1337
valid_sources[0x6a]	296849	1			T1	23		T3	1336		T5	6
valid_sources[0x6b]	304729	1			T1	44		T2	15		T3	1327
valid_sources[0x6c]	673070	1			T1	20		T2	7		T3	1318
valid_sources[0x6d]	293521	1			T1	11		T3	1445		T5	16
valid_sources[0x6e]	313251	1			T1	14		T2	19		T3	1251
valid_sources[0x6f]	297779	1			T1	8		T2	9		T3	1466
valid_sources[0x70]	938845	1			T1	25		T3	1373		T5	13
valid_sources[0x71]	288817	1			T1	20		T3	1278		T4	969
valid_sources[0x72]	288931	1			T1	38		T2	22		T3	1443
valid_sources[0x73]	294494	1			T1	31		T2	5		T3	1283
valid_sources[0x74]	709556	1			T1	30		T2	33		T3	1303
valid_sources[0x75]	293161	1			T1	7		T3	1432		T5	8
valid_sources[0x76]	296816	1			T1	30		T2	2		T3	1379
valid_sources[0x77]	771280	1			T1	8		T2	4		T3	1303
valid_sources[0x78]	302927	1			T1	8		T2	6		T3	1416
valid_sources[0x79]	294805	1			T1	5		T2	42		T3	1315
valid_sources[0x7a]	292648	1			T1	11		T2	2		T3	1362
valid_sources[0x7b]	289314	1			T1	8		T2	8		T3	1370
valid_sources[0x7c]	292538	1			T1	12		T3	1396		T5	1
valid_sources[0x7d]	292167	1			T1	25		T3	1376		T5	4
valid_sources[0x7e]	294958	1			T1	45		T3	1354		T5	6
valid_sources[0x7f]	299954	1			T1	23		T3	1346		T5	9
valid_sources[0x80]	295167	1			T1	36		T3	1302		T4	1021

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6842149

1

T1

338

T2

143

T3

21397

values[0x0]

all_enables

biggest_size

14524515

1

T1

846

T2

470

T3

56747

values[0x1]

all_enables

biggest_size

8467380

1

T1

476

T2

257

T3

31580