Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 62545062 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 30026235 1 T1 95 T2 113605 T3 3292



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14177769 1 T1 27 T2 44707 T3 1725
values[0x0] 38515028 1 T1 144 T2 156183 T3 3967
values[0x1] 39878500 1 T1 179 T2 156477 T3 3879



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 53738661 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 38832636 1 T1 124 T2 143779 T3 4107



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 295561 1 T2 1403 T3 48 T18 23
valid_sources[0x01] 299638 1 T2 1349 T3 33 T18 18
valid_sources[0x02] 296188 1 T2 1392 T3 26 T18 15
valid_sources[0x03] 294949 1 T2 1441 T3 30 T18 34
valid_sources[0x04] 298531 1 T2 1372 T3 36 T18 19
valid_sources[0x05] 294996 1 T2 1422 T3 36 T18 12
valid_sources[0x06] 289590 1 T2 1402 T3 50 T18 14
valid_sources[0x07] 325459 1 T2 1396 T3 36 T18 12
valid_sources[0x08] 291338 1 T2 1441 T3 44 T18 15
valid_sources[0x09] 290988 1 T2 1370 T3 36 T18 13
valid_sources[0x0a] 292917 1 T2 1382 T3 45 T18 16
valid_sources[0x0b] 512108 1 T2 1361 T3 44 T18 19
valid_sources[0x0c] 293829 1 T2 1361 T3 39 T18 15
valid_sources[0x0d] 299844 1 T2 1342 T3 36 T18 26
valid_sources[0x0e] 293641 1 T2 1397 T3 36 T18 23
valid_sources[0x0f] 290143 1 T2 1397 T3 38 T18 27
valid_sources[0x10] 295305 1 T2 1329 T3 26 T18 27
valid_sources[0x11] 293747 1 T2 1425 T3 37 T18 26
valid_sources[0x12] 299701 1 T2 1376 T3 33 T18 27
valid_sources[0x13] 662872 1 T2 1376 T3 39 T18 14
valid_sources[0x14] 289244 1 T2 1324 T3 45 T18 19
valid_sources[0x15] 304433 1 T2 1354 T3 49 T18 14
valid_sources[0x16] 290325 1 T2 1285 T3 34 T18 9
valid_sources[0x17] 947714 1 T2 1393 T3 24 T18 9
valid_sources[0x18] 294673 1 T2 1409 T3 43 T18 16
valid_sources[0x19] 322598 1 T2 1451 T3 39 T18 21
valid_sources[0x1a] 722127 1 T2 1361 T3 42 T18 18
valid_sources[0x1b] 300223 1 T2 1357 T3 38 T18 17
valid_sources[0x1c] 292349 1 T2 1451 T3 20 T18 18
valid_sources[0x1d] 331589 1 T2 1442 T3 22 T18 18
valid_sources[0x1e] 289099 1 T2 1350 T3 33 T18 33
valid_sources[0x1f] 288489 1 T2 1471 T3 42 T18 21
valid_sources[0x20] 294520 1 T2 1332 T3 59 T18 28
valid_sources[0x21] 301585 1 T1 24 T2 1339 T3 47
valid_sources[0x22] 301064 1 T2 1430 T3 26 T18 28
valid_sources[0x23] 292425 1 T2 1466 T3 36 T18 29
valid_sources[0x24] 288131 1 T1 42 T2 1411 T3 30
valid_sources[0x25] 559425 1 T2 1364 T3 28 T18 11
valid_sources[0x26] 631080 1 T1 30 T2 1361 T3 40
valid_sources[0x27] 409042 1 T2 1381 T3 40 T18 17
valid_sources[0x28] 880326 1 T2 1427 T3 32 T18 19
valid_sources[0x29] 292469 1 T2 1382 T3 27 T18 13
valid_sources[0x2a] 289794 1 T2 1347 T3 58 T18 14
valid_sources[0x2b] 286704 1 T2 1357 T3 26 T18 27
valid_sources[0x2c] 663409 1 T2 1405 T3 32 T18 15
valid_sources[0x2d] 296959 1 T2 1387 T3 34 T18 16
valid_sources[0x2e] 291994 1 T2 1383 T3 28 T18 20
valid_sources[0x2f] 664575 1 T2 1407 T3 35 T18 12
valid_sources[0x30] 896784 1 T1 19 T2 1411 T3 27
valid_sources[0x31] 565597 1 T2 1389 T3 37 T18 18
valid_sources[0x32] 288010 1 T2 1374 T3 30 T18 23
valid_sources[0x33] 680357 1 T2 1475 T3 16 T18 21
valid_sources[0x34] 293594 1 T2 1375 T3 42 T18 22
valid_sources[0x35] 300660 1 T2 1453 T3 31 T18 22
valid_sources[0x36] 291084 1 T2 1329 T3 47 T18 24
valid_sources[0x37] 288166 1 T2 1405 T3 42 T18 12
valid_sources[0x38] 299070 1 T2 1345 T3 30 T18 25
valid_sources[0x39] 293602 1 T1 22 T2 1368 T3 54
valid_sources[0x3a] 297273 1 T2 1429 T3 31 T18 14
valid_sources[0x3b] 288820 1 T2 1406 T3 40 T18 8
valid_sources[0x3c] 298050 1 T1 21 T2 1428 T3 52
valid_sources[0x3d] 307162 1 T2 1390 T3 29 T18 25
valid_sources[0x3e] 300753 1 T1 16 T2 1405 T3 32
valid_sources[0x3f] 305937 1 T2 1459 T3 28 T18 22
valid_sources[0x40] 296762 1 T2 1365 T3 48 T18 19
valid_sources[0x41] 298868 1 T2 1441 T3 42 T18 18
valid_sources[0x42] 300315 1 T2 1415 T3 35 T18 9
valid_sources[0x43] 286524 1 T2 1366 T3 29 T18 12
valid_sources[0x44] 768079 1 T2 1406 T3 35 T18 14
valid_sources[0x45] 619281 1 T2 1321 T3 42 T18 25
valid_sources[0x46] 305004 1 T2 1400 T3 39 T18 28
valid_sources[0x47] 295567 1 T2 1382 T3 31 T18 23
valid_sources[0x48] 721056 1 T2 1338 T3 39 T18 28
valid_sources[0x49] 301403 1 T2 1452 T3 33 T18 17
valid_sources[0x4a] 286426 1 T2 1406 T3 33 T18 14
valid_sources[0x4b] 296628 1 T2 1370 T3 28 T18 18
valid_sources[0x4c] 296397 1 T2 1397 T3 40 T18 12
valid_sources[0x4d] 289190 1 T2 1509 T3 32 T18 20
valid_sources[0x4e] 300072 1 T2 1375 T3 29 T18 12
valid_sources[0x4f] 296237 1 T2 1354 T3 38 T18 30
valid_sources[0x50] 297570 1 T2 1369 T3 33 T18 18
valid_sources[0x51] 288202 1 T2 1366 T3 29 T18 20
valid_sources[0x52] 287414 1 T2 1411 T3 21 T18 22
valid_sources[0x53] 301958 1 T2 1383 T3 44 T18 16
valid_sources[0x54] 291236 1 T2 1430 T3 37 T18 20
valid_sources[0x55] 659427 1 T2 1479 T3 34 T18 11
valid_sources[0x56] 700266 1 T2 1376 T3 29 T18 14
valid_sources[0x57] 291258 1 T2 1335 T3 57 T18 34
valid_sources[0x58] 295962 1 T2 1446 T3 35 T18 26
valid_sources[0x59] 286644 1 T2 1396 T3 47 T18 20
valid_sources[0x5a] 668504 1 T2 1407 T3 43 T18 17
valid_sources[0x5b] 306237 1 T2 1358 T3 52 T18 22
valid_sources[0x5c] 297150 1 T2 1411 T3 32 T18 16
valid_sources[0x5d] 292915 1 T2 1459 T3 28 T18 25
valid_sources[0x5e] 294100 1 T2 1428 T3 44 T18 16
valid_sources[0x5f] 321516 1 T2 1331 T3 48 T18 25
valid_sources[0x60] 296448 1 T2 1419 T3 48 T18 18
valid_sources[0x61] 287722 1 T2 1345 T3 31 T18 10
valid_sources[0x62] 288402 1 T2 1423 T3 54 T18 20
valid_sources[0x63] 294012 1 T2 1472 T3 28 T18 20
valid_sources[0x64] 300352 1 T2 1345 T3 36 T18 20
valid_sources[0x65] 296387 1 T2 1400 T3 36 T18 10
valid_sources[0x66] 307201 1 T2 1399 T3 32 T18 8
valid_sources[0x67] 290484 1 T2 1410 T3 33 T18 19
valid_sources[0x68] 297658 1 T2 1415 T3 35 T18 15
valid_sources[0x69] 627815 1 T2 1318 T3 42 T18 20
valid_sources[0x6a] 292244 1 T1 21 T2 1360 T3 47
valid_sources[0x6b] 332148 1 T2 1366 T3 37 T18 18
valid_sources[0x6c] 307014 1 T2 1378 T3 38 T18 9
valid_sources[0x6d] 291448 1 T2 1354 T3 45 T18 17
valid_sources[0x6e] 694871 1 T2 1406 T3 36 T18 22
valid_sources[0x6f] 283084 1 T2 1387 T3 42 T18 20
valid_sources[0x70] 293587 1 T2 1430 T3 40 T18 10
valid_sources[0x71] 301130 1 T2 1421 T3 52 T18 14
valid_sources[0x72] 301311 1 T2 1310 T3 47 T18 17
valid_sources[0x73] 441913 1 T2 1359 T3 34 T18 26
valid_sources[0x74] 290329 1 T2 1457 T3 45 T18 8
valid_sources[0x75] 291515 1 T2 1443 T3 32 T18 14
valid_sources[0x76] 295047 1 T2 1432 T3 60 T18 10
valid_sources[0x77] 294226 1 T2 1391 T3 35 T18 18
valid_sources[0x78] 294851 1 T2 1377 T3 37 T18 14
valid_sources[0x79] 285681 1 T2 1323 T3 35 T18 18
valid_sources[0x7a] 290290 1 T2 1436 T3 43 T18 19
valid_sources[0x7b] 284742 1 T2 1473 T3 40 T18 24
valid_sources[0x7c] 288115 1 T2 1469 T3 48 T18 15
valid_sources[0x7d] 306683 1 T2 1404 T3 31 T18 21
valid_sources[0x7e] 716943 1 T2 1457 T3 31 T18 7
valid_sources[0x7f] 683674 1 T2 1368 T3 63 T18 22
valid_sources[0x80] 293473 1 T2 1385 T3 30 T18 11



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 6949738 1 T1 15 T2 22400 T3 870
values[0x0] all_enables biggest_size 14618294 1 T1 51 T2 58329 T3 1509
values[0x1] all_enables biggest_size 8458203 1 T1 29 T2 32876 T3 913

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%