Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	63751131	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31063096

1

T1

2731

T2

3592

T3

2604

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14499926	1			T1	1088		T2	2943		T3	1438
values[0x0]	39016356	1			T1	3713		T2	3744		T3	3221
values[0x1]	41297945	1			T1	3615		T2	3520		T3	3161

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54232422	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

40581805

1

T1

3474

T2

4493

T3

3261

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	316690	1			T2	39		T16	30		T5	1504
valid_sources[0x01]	303971	1			T2	43		T16	21		T5	1363
valid_sources[0x02]	307980	1			T2	31		T16	15		T5	1531
valid_sources[0x03]	306980	1			T2	41		T16	20		T5	1557
valid_sources[0x04]	305377	1			T2	33		T16	18		T5	1531
valid_sources[0x05]	309485	1			T2	41		T16	21		T5	1592
valid_sources[0x06]	307632	1			T2	36		T16	10		T5	1506
valid_sources[0x07]	308350	1			T2	38		T16	12		T5	1424
valid_sources[0x08]	301372	1			T2	35		T16	22		T5	1477
valid_sources[0x09]	311253	1			T2	34		T16	16		T5	1518
valid_sources[0x0a]	340401	1			T2	37		T16	11		T5	1402
valid_sources[0x0b]	326370	1			T2	49		T16	20		T5	1526
valid_sources[0x0c]	309370	1			T2	50		T16	22		T5	1499
valid_sources[0x0d]	314752	1			T2	34		T16	18		T5	1496
valid_sources[0x0e]	308467	1			T2	37		T16	27		T5	1435
valid_sources[0x0f]	306953	1			T2	37		T16	11		T5	1459
valid_sources[0x10]	320165	1			T2	27		T16	9		T5	1489
valid_sources[0x11]	306060	1			T2	38		T16	17		T5	1448
valid_sources[0x12]	313254	1			T2	35		T16	27		T5	1490
valid_sources[0x13]	314699	1			T2	23		T16	14		T5	1436
valid_sources[0x14]	309268	1			T2	33		T16	23		T5	1489
valid_sources[0x15]	814348	1			T2	38		T16	22		T5	1500
valid_sources[0x16]	322116	1			T2	44		T16	20		T5	1495
valid_sources[0x17]	314071	1			T2	33		T16	22		T5	1602
valid_sources[0x18]	307166	1			T2	51		T16	22		T5	1505
valid_sources[0x19]	308517	1			T2	31		T16	16		T5	1492
valid_sources[0x1a]	317243	1			T2	36		T16	18		T5	1510
valid_sources[0x1b]	303510	1			T2	39		T16	24		T5	1489
valid_sources[0x1c]	304731	1			T2	46		T16	21		T5	1441
valid_sources[0x1d]	303605	1			T2	39		T16	16		T5	1505
valid_sources[0x1e]	322473	1			T2	35		T16	17		T5	1431
valid_sources[0x1f]	318873	1			T2	47		T16	13		T5	1549
valid_sources[0x20]	312247	1			T2	46		T16	18		T5	1450
valid_sources[0x21]	727686	1			T2	62		T16	14		T5	1476
valid_sources[0x22]	298698	1			T2	38		T16	26		T5	1574
valid_sources[0x23]	306223	1			T2	39		T16	18		T5	1502
valid_sources[0x24]	305873	1			T2	39		T16	14		T5	1436
valid_sources[0x25]	303248	1			T2	39		T16	25		T5	1539
valid_sources[0x26]	310054	1			T2	32		T16	21		T5	1481
valid_sources[0x27]	310041	1			T2	42		T16	18		T5	1470
valid_sources[0x28]	302412	1			T2	31		T16	19		T5	1482
valid_sources[0x29]	314775	1			T2	45		T16	16		T5	1473
valid_sources[0x2a]	309456	1			T2	41		T16	32		T5	1520
valid_sources[0x2b]	579455	1			T2	55		T16	21		T5	1464
valid_sources[0x2c]	303345	1			T2	36		T16	25		T5	1486
valid_sources[0x2d]	307528	1			T2	34		T16	20		T5	1533
valid_sources[0x2e]	580215	1			T2	41		T16	22		T5	1495
valid_sources[0x2f]	315505	1			T2	40		T16	23		T5	1504
valid_sources[0x30]	308514	1			T2	37		T16	16		T5	1547
valid_sources[0x31]	308750	1			T2	39		T16	21		T5	1476
valid_sources[0x32]	705076	1			T2	41		T16	24		T5	1486
valid_sources[0x33]	312986	1			T2	28		T16	13		T5	1431
valid_sources[0x34]	308852	1			T2	35		T16	11		T5	1498
valid_sources[0x35]	313913	1			T2	46		T16	20		T5	1489
valid_sources[0x36]	703426	1			T2	33		T16	15		T5	1430
valid_sources[0x37]	311591	1			T2	33		T16	21		T5	1586
valid_sources[0x38]	325029	1			T2	40		T16	21		T5	1455
valid_sources[0x39]	313852	1			T2	46		T16	22		T5	1490
valid_sources[0x3a]	304552	1			T2	48		T16	24		T5	1513
valid_sources[0x3b]	316639	1			T2	35		T16	13		T5	1515
valid_sources[0x3c]	307401	1			T2	40		T16	29		T5	1460
valid_sources[0x3d]	312859	1			T2	37		T16	14		T5	1459
valid_sources[0x3e]	316585	1			T2	43		T16	19		T5	1488
valid_sources[0x3f]	301758	1			T2	31		T16	18		T5	1458
valid_sources[0x40]	1089738	1			T2	41		T16	16		T5	1433
valid_sources[0x41]	301298	1			T2	35		T16	25		T5	1559
valid_sources[0x42]	559352	1			T2	31		T16	17		T5	1471
valid_sources[0x43]	311427	1			T2	31		T16	19		T5	1513
valid_sources[0x44]	657810	1			T2	38		T16	17		T5	1546
valid_sources[0x45]	309506	1			T2	36		T16	22		T5	1460
valid_sources[0x46]	306033	1			T2	45		T16	21		T5	1580
valid_sources[0x47]	314002	1			T2	36		T16	21		T5	1464
valid_sources[0x48]	316310	1			T2	34		T16	20		T5	1451
valid_sources[0x49]	308733	1			T2	42		T16	14		T5	1576
valid_sources[0x4a]	307729	1			T2	34		T16	9		T5	1454
valid_sources[0x4b]	302565	1			T2	36		T16	20		T5	1537
valid_sources[0x4c]	342666	1			T2	57		T16	15		T5	1571
valid_sources[0x4d]	306846	1			T2	48		T16	16		T5	1502
valid_sources[0x4e]	698406	1			T2	61		T16	19		T5	1515
valid_sources[0x4f]	306347	1			T2	40		T16	19		T5	1481
valid_sources[0x50]	306488	1			T2	40		T16	19		T5	1492
valid_sources[0x51]	304000	1			T2	53		T16	29		T5	1570
valid_sources[0x52]	310631	1			T2	43		T16	21		T5	1443
valid_sources[0x53]	307390	1			T2	39		T16	33		T5	1521
valid_sources[0x54]	306025	1			T2	43		T16	20		T5	1466
valid_sources[0x55]	598406	1			T2	36		T16	22		T5	1506
valid_sources[0x56]	629189	1			T2	33		T16	29		T5	1461
valid_sources[0x57]	306117	1			T2	44		T16	27		T5	1587
valid_sources[0x58]	307132	1			T2	30		T16	15		T5	1510
valid_sources[0x59]	313650	1			T2	46		T16	19		T5	1537
valid_sources[0x5a]	307406	1			T2	35		T16	16		T5	1471
valid_sources[0x5b]	413585	1			T2	48		T16	14		T5	1503
valid_sources[0x5c]	317869	1			T2	37		T16	23		T5	1587
valid_sources[0x5d]	321715	1			T2	29		T16	17		T5	1413
valid_sources[0x5e]	709640	1			T2	38		T16	12		T17	354
valid_sources[0x5f]	306846	1			T2	33		T16	16		T5	1518
valid_sources[0x60]	304403	1			T2	33		T16	19		T5	1425
valid_sources[0x61]	307208	1			T2	46		T16	18		T5	1531
valid_sources[0x62]	306286	1			T2	36		T16	21		T5	1520
valid_sources[0x63]	304861	1			T2	40		T16	23		T5	1415
valid_sources[0x64]	317462	1			T2	39		T16	21		T5	1462
valid_sources[0x65]	314897	1			T2	48		T16	13		T5	1456
valid_sources[0x66]	305203	1			T2	34		T16	20		T5	1508
valid_sources[0x67]	305772	1			T2	43		T16	16		T5	1488
valid_sources[0x68]	304482	1			T2	46		T16	12		T5	1538
valid_sources[0x69]	704481	1			T2	39		T16	20		T5	1430
valid_sources[0x6a]	305694	1			T2	50		T16	16		T5	1464
valid_sources[0x6b]	756315	1			T2	38		T16	22		T5	1541
valid_sources[0x6c]	311210	1			T2	35		T16	20		T5	1429
valid_sources[0x6d]	306974	1			T2	40		T16	27		T5	1442
valid_sources[0x6e]	317633	1			T2	36		T16	23		T5	1458
valid_sources[0x6f]	570136	1			T2	41		T16	20		T5	1461
valid_sources[0x70]	337897	1			T2	40		T16	17		T5	1539
valid_sources[0x71]	794116	1			T2	41		T16	18		T5	1488
valid_sources[0x72]	458589	1			T2	44		T16	18		T5	1503
valid_sources[0x73]	309545	1			T2	32		T16	19		T5	1521
valid_sources[0x74]	643420	1			T2	42		T16	13		T5	1472
valid_sources[0x75]	312111	1			T2	44		T16	29		T5	1506
valid_sources[0x76]	300909	1			T2	50		T16	21		T5	1477
valid_sources[0x77]	313692	1			T2	40		T16	11		T5	1460
valid_sources[0x78]	307594	1			T2	38		T16	17		T5	1480
valid_sources[0x79]	308052	1			T2	51		T16	23		T5	1387
valid_sources[0x7a]	311262	1			T2	36		T16	23		T5	1541
valid_sources[0x7b]	312590	1			T2	34		T16	19		T5	1505
valid_sources[0x7c]	540695	1			T2	38		T16	20		T5	1524
valid_sources[0x7d]	307839	1			T2	23		T16	17		T5	1509
valid_sources[0x7e]	308287	1			T2	51		T16	20		T5	1343
valid_sources[0x7f]	310410	1			T2	46		T16	13		T5	1548
valid_sources[0x80]	586225	1			T2	44		T16	20		T5	1493

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7226155

1

T1

563

T2

1459

T3

723

values[0x0]

all_enables

biggest_size

15012141

1

T1

1361

T2

1385

T3

1192

values[0x1]

all_enables

biggest_size

8824800

1

T1

807

T2

748

T3

689