Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62839002	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30496480

1

T1

3157

T2

168015

T3

147246

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14195480	1			T1	1250		T2	66864		T3	57117
values[0x0]	38593741	1			T1	4217		T2	230033		T3	203632
values[0x1]	40546261	1			T1	4047		T2	231070		T3	203162

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53651166	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

39684316

1

T1

3953

T2

212284

T3

185774

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	692608	1			T1	35		T5	1002		T17	44
valid_sources[0x01]	309309	1			T1	39		T5	1046		T17	31
valid_sources[0x02]	300481	1			T1	39		T5	1093		T17	27
valid_sources[0x03]	306119	1			T1	39		T5	1150		T17	31
valid_sources[0x04]	292619	1			T1	36		T5	1150		T17	32
valid_sources[0x05]	301619	1			T1	31		T5	985		T17	28
valid_sources[0x06]	297911	1			T1	27		T5	1191		T17	23
valid_sources[0x07]	292280	1			T1	27		T5	1089		T17	19
valid_sources[0x08]	307485	1			T1	31		T5	1103		T17	22
valid_sources[0x09]	296940	1			T1	42		T5	1124		T17	17
valid_sources[0x0a]	302963	1			T1	51		T5	1063		T17	33
valid_sources[0x0b]	329543	1			T1	44		T5	1044		T17	28
valid_sources[0x0c]	307704	1			T1	32		T5	1163		T17	37
valid_sources[0x0d]	301602	1			T1	42		T5	1113		T17	13
valid_sources[0x0e]	301151	1			T1	43		T5	1115		T17	27
valid_sources[0x0f]	302176	1			T1	42		T5	1278		T17	19
valid_sources[0x10]	310633	1			T1	50		T5	1118		T17	19
valid_sources[0x11]	320616	1			T1	32		T5	1106		T17	37
valid_sources[0x12]	308784	1			T1	28		T5	1044		T17	25
valid_sources[0x13]	310585	1			T1	36		T5	1057		T17	13
valid_sources[0x14]	301808	1			T1	48		T5	985		T17	16
valid_sources[0x15]	292963	1			T1	34		T5	1179		T17	22
valid_sources[0x16]	292544	1			T1	41		T5	1084		T17	31
valid_sources[0x17]	299165	1			T1	39		T5	1116		T17	12
valid_sources[0x18]	297939	1			T1	32		T5	948		T17	38
valid_sources[0x19]	304500	1			T1	29		T5	1032		T17	23
valid_sources[0x1a]	316176	1			T1	35		T5	1014		T17	19
valid_sources[0x1b]	302159	1			T1	42		T5	1122		T17	20
valid_sources[0x1c]	302000	1			T1	33		T5	1092		T17	23
valid_sources[0x1d]	295485	1			T1	36		T5	1087		T17	15
valid_sources[0x1e]	295147	1			T1	56		T5	1052		T17	12
valid_sources[0x1f]	319440	1			T1	36		T5	1136		T17	43
valid_sources[0x20]	297311	1			T1	42		T5	1038		T17	33
valid_sources[0x21]	298179	1			T1	48		T5	945		T17	34
valid_sources[0x22]	586189	1			T1	34		T5	951		T17	9
valid_sources[0x23]	301555	1			T1	40		T5	1049		T17	40
valid_sources[0x24]	297023	1			T1	51		T5	1231		T17	20
valid_sources[0x25]	642453	1			T1	49		T5	914		T17	43
valid_sources[0x26]	306008	1			T1	38		T5	1088		T17	12
valid_sources[0x27]	765963	1			T1	38		T5	1167		T17	8
valid_sources[0x28]	604358	1			T1	31		T5	955		T17	34
valid_sources[0x29]	311946	1			T1	43		T5	1001		T17	24
valid_sources[0x2a]	655209	1			T1	25		T5	1085		T17	11
valid_sources[0x2b]	541793	1			T1	40		T5	1147		T17	29
valid_sources[0x2c]	298898	1			T1	42		T5	1057		T17	21
valid_sources[0x2d]	304433	1			T1	26		T5	1062		T17	24
valid_sources[0x2e]	327908	1			T1	41		T5	1008		T17	33
valid_sources[0x2f]	293413	1			T1	50		T5	1054		T17	20
valid_sources[0x30]	626498	1			T1	30		T5	996		T17	39
valid_sources[0x31]	300801	1			T1	39		T5	1160		T17	15
valid_sources[0x32]	298135	1			T1	49		T5	1134		T17	51
valid_sources[0x33]	293270	1			T1	32		T5	1123		T17	19
valid_sources[0x34]	296423	1			T1	40		T5	1055		T17	18
valid_sources[0x35]	300658	1			T1	31		T5	985		T17	37
valid_sources[0x36]	298096	1			T1	36		T5	1114		T17	38
valid_sources[0x37]	296666	1			T1	29		T5	1233		T17	26
valid_sources[0x38]	297491	1			T1	25		T5	1222		T17	32
valid_sources[0x39]	304956	1			T1	38		T5	998		T17	8
valid_sources[0x3a]	299071	1			T1	37		T5	1073		T17	23
valid_sources[0x3b]	527402	1			T1	37		T5	1027		T17	31
valid_sources[0x3c]	306539	1			T1	47		T5	1115		T17	13
valid_sources[0x3d]	294403	1			T1	38		T5	1039		T17	10
valid_sources[0x3e]	304098	1			T1	30		T5	1074		T17	29
valid_sources[0x3f]	296262	1			T1	38		T5	1037		T17	30
valid_sources[0x40]	297247	1			T1	47		T5	1045		T17	38
valid_sources[0x41]	296967	1			T1	34		T5	1031		T17	11
valid_sources[0x42]	298070	1			T1	47		T5	1171		T17	21
valid_sources[0x43]	306312	1			T1	30		T5	1230		T17	9
valid_sources[0x44]	305642	1			T1	45		T5	1196		T17	29
valid_sources[0x45]	304593	1			T1	35		T5	1173		T17	21
valid_sources[0x46]	309513	1			T1	23		T5	1099		T17	12
valid_sources[0x47]	308010	1			T1	33		T5	1135		T17	18
valid_sources[0x48]	298507	1			T1	60		T5	1133		T17	27
valid_sources[0x49]	786096	1			T1	44		T5	1105		T17	10
valid_sources[0x4a]	1154367	1			T1	23		T3	463911		T5	1077
valid_sources[0x4b]	744817	1			T1	32		T5	1158		T17	3
valid_sources[0x4c]	299238	1			T1	42		T5	1039		T17	33
valid_sources[0x4d]	298866	1			T1	53		T5	1043		T17	22
valid_sources[0x4e]	305236	1			T1	30		T5	1017		T17	33
valid_sources[0x4f]	305567	1			T1	36		T5	1109		T17	19
valid_sources[0x50]	324884	1			T1	46		T5	1008		T17	28
valid_sources[0x51]	304631	1			T1	33		T5	1284		T17	30
valid_sources[0x52]	628568	1			T1	38		T5	1074		T17	23
valid_sources[0x53]	305282	1			T1	36		T5	1086		T17	14
valid_sources[0x54]	303469	1			T1	43		T5	1040		T17	18
valid_sources[0x55]	295053	1			T1	31		T5	1212		T17	24
valid_sources[0x56]	303203	1			T1	24		T5	1074		T17	15
valid_sources[0x57]	319062	1			T1	33		T5	1217		T17	36
valid_sources[0x58]	297485	1			T1	41		T5	1179		T17	43
valid_sources[0x59]	826239	1			T1	36		T2	527967		T5	1128
valid_sources[0x5a]	303231	1			T1	28		T5	1102		T17	21
valid_sources[0x5b]	300660	1			T1	37		T5	1043		T17	11
valid_sources[0x5c]	297350	1			T1	30		T5	1042		T17	22
valid_sources[0x5d]	687601	1			T1	31		T5	980		T17	24
valid_sources[0x5e]	309231	1			T1	41		T5	930		T17	55
valid_sources[0x5f]	308764	1			T1	40		T5	1063		T17	29
valid_sources[0x60]	308371	1			T1	44		T5	1098		T17	15
valid_sources[0x61]	299727	1			T1	30		T5	1123		T17	32
valid_sources[0x62]	326928	1			T1	30		T5	1139		T17	11
valid_sources[0x63]	510589	1			T1	33		T5	1236		T17	27
valid_sources[0x64]	293552	1			T1	38		T5	1127		T17	22
valid_sources[0x65]	299815	1			T1	37		T5	1189		T17	44
valid_sources[0x66]	667234	1			T1	38		T5	1047		T17	23
valid_sources[0x67]	298938	1			T1	36		T5	1108		T17	34
valid_sources[0x68]	293757	1			T1	42		T5	1245		T17	23
valid_sources[0x69]	325583	1			T1	43		T5	1122		T17	7
valid_sources[0x6a]	302988	1			T1	33		T5	1033		T17	20
valid_sources[0x6b]	744484	1			T1	31		T5	1082		T17	18
valid_sources[0x6c]	303497	1			T1	45		T5	1103		T17	28
valid_sources[0x6d]	298841	1			T1	27		T5	1199		T17	6
valid_sources[0x6e]	292888	1			T1	43		T5	1108		T17	15
valid_sources[0x6f]	310506	1			T1	35		T5	907		T17	13
valid_sources[0x70]	293699	1			T1	27		T5	1047		T17	9
valid_sources[0x71]	296053	1			T1	43		T5	1019		T17	26
valid_sources[0x72]	299223	1			T1	35		T5	1138		T17	31
valid_sources[0x73]	295522	1			T1	41		T5	1099		T17	32
valid_sources[0x74]	342518	1			T1	32		T5	947		T17	29
valid_sources[0x75]	312323	1			T1	25		T5	1145		T17	33
valid_sources[0x76]	760911	1			T1	28		T5	1137		T17	17
valid_sources[0x77]	303370	1			T1	38		T5	1156		T17	2
valid_sources[0x78]	625468	1			T1	41		T5	1223		T17	26
valid_sources[0x79]	301493	1			T1	35		T5	907		T17	22
valid_sources[0x7a]	299143	1			T1	33		T5	1175		T17	29
valid_sources[0x7b]	543432	1			T1	31		T5	1209		T17	42
valid_sources[0x7c]	297253	1			T1	49		T5	1161		T17	22
valid_sources[0x7d]	596954	1			T1	51		T5	1143		T17	30
valid_sources[0x7e]	298081	1			T1	29		T5	1026		T17	21
valid_sources[0x7f]	305466	1			T1	30		T5	1087		T17	32
valid_sources[0x80]	298129	1			T1	31		T5	980		T17	22

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7068987

1

T1

623

T2

33549

T3

28583

values[0x0]

all_enables

biggest_size

14785672

1

T1

1639

T2

85916

T3

75516

values[0x1]

all_enables

biggest_size

8641821

1

T1

895

T2

48550

T3

43147