Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61626109	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

29955744

1

T1

1303

T2

123194

T3

2820

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	13823323	1			T1	594		T2	47742		T3	1343
values[0x0]	37873810	1			T1	1702		T2	170708		T3	3759
values[0x1]	39884720	1			T1	1752		T2	170960		T3	3869

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52588319	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

38993534

1

T1

1665

T2

155729

T3

3592

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	672313	1			T2	1562		T3	30		T4	1760
valid_sources[0x01]	632577	1			T2	1527		T3	39		T4	1690
valid_sources[0x02]	288775	1			T2	1485		T3	38		T4	1317
valid_sources[0x03]	631215	1			T2	1459		T3	27		T4	1159
valid_sources[0x04]	300310	1			T2	1486		T3	42		T4	1662
valid_sources[0x05]	286820	1			T2	1593		T3	31		T4	2037
valid_sources[0x06]	283377	1			T2	1625		T3	33		T4	1516
valid_sources[0x07]	289393	1			T2	1501		T3	29		T4	1772
valid_sources[0x08]	286250	1			T2	1515		T3	26		T4	1549
valid_sources[0x09]	292100	1			T2	1497		T3	29		T4	1409
valid_sources[0x0a]	847676	1			T2	1511		T3	38		T4	1567
valid_sources[0x0b]	861437	1			T2	1515		T3	36		T4	1760
valid_sources[0x0c]	295148	1			T2	1592		T3	26		T4	1252
valid_sources[0x0d]	288169	1			T2	1491		T3	29		T4	2079
valid_sources[0x0e]	301556	1			T2	1583		T3	30		T4	1725
valid_sources[0x0f]	291305	1			T2	1541		T3	39		T4	1525
valid_sources[0x10]	649253	1			T2	1527		T3	38		T4	1868
valid_sources[0x11]	288572	1			T2	1670		T3	34		T4	1776
valid_sources[0x12]	291242	1			T2	1582		T3	35		T4	1723
valid_sources[0x13]	283902	1			T2	1513		T3	42		T4	1486
valid_sources[0x14]	287650	1			T2	1501		T3	43		T4	1815
valid_sources[0x15]	291902	1			T2	1522		T3	31		T4	1646
valid_sources[0x16]	288447	1			T2	1584		T3	42		T4	1400
valid_sources[0x17]	302291	1			T2	1517		T3	41		T4	1307
valid_sources[0x18]	290008	1			T2	1527		T3	43		T4	2055
valid_sources[0x19]	296488	1			T2	1465		T3	36		T4	1678
valid_sources[0x1a]	288985	1			T2	1558		T3	37		T4	1515
valid_sources[0x1b]	294137	1			T2	1514		T3	37		T4	1815
valid_sources[0x1c]	296411	1			T2	1509		T3	38		T4	1523
valid_sources[0x1d]	284241	1			T2	1483		T3	35		T4	1163
valid_sources[0x1e]	289653	1			T2	1478		T3	23		T4	1389
valid_sources[0x1f]	292875	1			T2	1569		T3	30		T4	1370
valid_sources[0x20]	286496	1			T2	1437		T3	27		T4	1619
valid_sources[0x21]	586427	1			T2	1560		T3	32		T4	1126
valid_sources[0x22]	294731	1			T2	1455		T3	34		T4	1439
valid_sources[0x23]	572773	1			T2	1490		T3	32		T4	1362
valid_sources[0x24]	335946	1			T2	1550		T3	28		T4	1478
valid_sources[0x25]	289684	1			T2	1442		T3	41		T4	1662
valid_sources[0x26]	285066	1			T2	1479		T3	33		T4	1333
valid_sources[0x27]	290906	1			T2	1550		T3	35		T4	1573
valid_sources[0x28]	295309	1			T2	1567		T3	31		T4	1488
valid_sources[0x29]	283634	1			T2	1594		T3	43		T4	1635
valid_sources[0x2a]	292059	1			T2	1500		T3	29		T4	1206
valid_sources[0x2b]	288172	1			T2	1508		T3	43		T4	1947
valid_sources[0x2c]	1270496	1			T2	1478		T3	33		T4	1487
valid_sources[0x2d]	340387	1			T2	1629		T3	37		T4	1615
valid_sources[0x2e]	290854	1			T2	1505		T3	45		T4	1497
valid_sources[0x2f]	772809	1			T2	1593		T3	42		T4	1817
valid_sources[0x30]	285565	1			T2	1565		T3	46		T4	1348
valid_sources[0x31]	297084	1			T2	1542		T3	42		T4	1877
valid_sources[0x32]	686875	1			T2	1524		T3	37		T4	1384
valid_sources[0x33]	290994	1			T2	1486		T3	39		T4	1919
valid_sources[0x34]	892177	1			T2	1599		T3	36		T4	1541
valid_sources[0x35]	322996	1			T2	1504		T3	33		T4	1658
valid_sources[0x36]	289890	1			T2	1484		T3	31		T4	1590
valid_sources[0x37]	294647	1			T2	1501		T3	32		T4	1383
valid_sources[0x38]	322302	1			T2	1573		T3	47		T4	1229
valid_sources[0x39]	289324	1			T2	1540		T3	49		T4	1707
valid_sources[0x3a]	293954	1			T2	1597		T3	30		T4	1227
valid_sources[0x3b]	291087	1			T2	1567		T3	39		T4	2334
valid_sources[0x3c]	285998	1			T2	1539		T3	25		T4	1737
valid_sources[0x3d]	569133	1			T2	1561		T3	31		T4	1454
valid_sources[0x3e]	285475	1			T2	1526		T3	50		T4	1496
valid_sources[0x3f]	810817	1			T2	1539		T3	39		T4	1593
valid_sources[0x40]	293672	1			T2	1577		T3	32		T4	1082
valid_sources[0x41]	652493	1			T2	1517		T3	39		T4	1737
valid_sources[0x42]	286453	1			T2	1483		T3	33		T4	1427
valid_sources[0x43]	327301	1			T2	1508		T3	32		T4	1462
valid_sources[0x44]	292212	1			T2	1498		T3	38		T4	1794
valid_sources[0x45]	306381	1			T2	1502		T3	25		T4	1539
valid_sources[0x46]	669328	1			T2	1532		T3	37		T4	1748
valid_sources[0x47]	286974	1			T2	1502		T3	29		T4	1318
valid_sources[0x48]	293458	1			T2	1550		T3	36		T4	1364
valid_sources[0x49]	287707	1			T2	1581		T3	41		T4	1523
valid_sources[0x4a]	284766	1			T2	1500		T3	33		T4	1360
valid_sources[0x4b]	296901	1			T2	1428		T3	38		T4	1859
valid_sources[0x4c]	294221	1			T2	1521		T3	29		T4	1835
valid_sources[0x4d]	285601	1			T2	1589		T3	35		T4	1648
valid_sources[0x4e]	288186	1			T2	1492		T3	43		T4	1394
valid_sources[0x4f]	288672	1			T2	1478		T3	29		T4	2053
valid_sources[0x50]	285381	1			T2	1540		T3	29		T4	1914
valid_sources[0x51]	715757	1			T2	1474		T3	36		T4	1162
valid_sources[0x52]	286972	1			T2	1503		T3	39		T4	1256
valid_sources[0x53]	531822	1			T2	1380		T3	30		T4	1787
valid_sources[0x54]	288366	1			T2	1610		T3	37		T4	1356
valid_sources[0x55]	285644	1			T2	1513		T3	39		T4	1602
valid_sources[0x56]	287244	1			T2	1644		T3	31		T4	963
valid_sources[0x57]	282924	1			T2	1433		T3	43		T4	1682
valid_sources[0x58]	288465	1			T2	1507		T3	29		T4	1610
valid_sources[0x59]	694343	1			T2	1506		T3	35		T4	1459
valid_sources[0x5a]	295601	1			T2	1537		T3	39		T4	1892
valid_sources[0x5b]	293811	1			T2	1602		T3	27		T4	1529
valid_sources[0x5c]	285330	1			T2	1523		T3	29		T4	1379
valid_sources[0x5d]	292825	1			T2	1593		T3	32		T4	1847
valid_sources[0x5e]	285773	1			T2	1467		T3	19		T4	1320
valid_sources[0x5f]	289817	1			T2	1463		T3	41		T4	1821
valid_sources[0x60]	294180	1			T2	1547		T3	28		T4	1650
valid_sources[0x61]	284439	1			T2	1561		T3	36		T4	2114
valid_sources[0x62]	289769	1			T2	1561		T3	35		T4	1644
valid_sources[0x63]	286979	1			T2	1512		T3	31		T4	1702
valid_sources[0x64]	311316	1			T2	1614		T3	37		T4	1573
valid_sources[0x65]	286325	1			T2	1483		T3	39		T4	1688
valid_sources[0x66]	292570	1			T2	1466		T3	41		T4	1684
valid_sources[0x67]	737766	1			T2	1578		T3	36		T4	1377
valid_sources[0x68]	295344	1			T2	1508		T3	43		T4	1371
valid_sources[0x69]	289173	1			T2	1511		T3	41		T4	1453
valid_sources[0x6a]	721778	1			T2	1445		T3	39		T4	2007
valid_sources[0x6b]	294468	1			T2	1513		T3	29		T4	1299
valid_sources[0x6c]	284617	1			T2	1504		T3	24		T4	1527
valid_sources[0x6d]	280387	1			T2	1556		T3	36		T4	1866
valid_sources[0x6e]	294521	1			T2	1535		T3	33		T4	1559
valid_sources[0x6f]	285843	1			T2	1584		T3	36		T4	1287
valid_sources[0x70]	286521	1			T2	1528		T3	33		T4	1782
valid_sources[0x71]	287773	1			T2	1429		T3	29		T4	1584
valid_sources[0x72]	625573	1			T2	1557		T3	34		T4	1807
valid_sources[0x73]	294116	1			T2	1464		T3	40		T4	1557
valid_sources[0x74]	673707	1			T2	1625		T3	35		T4	1254
valid_sources[0x75]	286834	1			T2	1459		T3	31		T4	1660
valid_sources[0x76]	281360	1			T2	1524		T3	23		T4	1506
valid_sources[0x77]	629848	1			T2	1473		T3	34		T4	1058
valid_sources[0x78]	289908	1			T2	1522		T3	37		T4	1697
valid_sources[0x79]	289410	1			T2	1452		T3	42		T4	1878
valid_sources[0x7a]	296259	1			T2	1525		T3	32		T4	1729
valid_sources[0x7b]	283756	1			T2	1580		T3	37		T4	1980
valid_sources[0x7c]	287826	1			T2	1529		T3	22		T4	1915
valid_sources[0x7d]	282571	1			T2	1561		T3	39		T4	1529
valid_sources[0x7e]	503634	1			T2	1512		T3	26		T4	1778
valid_sources[0x7f]	290615	1			T2	1516		T3	39		T4	1800
valid_sources[0x80]	290582	1			T2	1570		T3	35		T4	1720

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6900280

1

T1

281

T2

23781

T3

647

values[0x0]

all_enables

biggest_size

14531406

1

T1

633

T2

63489

T3

1391

values[0x1]

all_enables

biggest_size

8524058

1

T1

389

T2

35924

T3

782