Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64087830	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31228585

1

T1

3392

T2

150

T3

154569

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14282069	1			T1	2056		T2	73		T3	58066
values[0x0]	39369041	1			T1	3998		T2	198		T3	172198
values[0x1]	41665305	1			T1	3977		T2	182		T3	210928

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54563007	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

40753408

1

T1

4226

T2

196

T3

213638

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	315890	1			T2	9		T3	1774		T4	2222
valid_sources[0x01]	316535	1			T2	3		T3	1986		T4	2315
valid_sources[0x02]	307715	1			T3	1517		T4	2311		T5	28
valid_sources[0x03]	307967	1			T2	1		T3	1525		T4	2306
valid_sources[0x04]	309012	1			T3	1884		T4	2398		T5	41
valid_sources[0x05]	307942	1			T3	1774		T4	2340		T5	83
valid_sources[0x06]	542494	1			T2	8		T3	1593		T4	2331
valid_sources[0x07]	309590	1			T3	1778		T4	2340		T5	6
valid_sources[0x08]	304314	1			T3	1556		T4	2428		T5	39
valid_sources[0x09]	637035	1			T2	3		T3	1647		T4	2294
valid_sources[0x0a]	305028	1			T2	2		T3	1836		T4	2347
valid_sources[0x0b]	306055	1			T2	1		T3	1881		T4	2268
valid_sources[0x0c]	306885	1			T3	1921		T4	2460		T5	50
valid_sources[0x0d]	318328	1			T3	1818		T4	2394		T5	109
valid_sources[0x0e]	311649	1			T3	1936		T4	2469		T5	38
valid_sources[0x0f]	308963	1			T3	1600		T4	2318		T5	80
valid_sources[0x10]	314776	1			T3	1855		T4	2301		T5	53
valid_sources[0x11]	307922	1			T2	1		T3	1652		T4	2236
valid_sources[0x12]	310040	1			T2	6		T3	1483		T4	2361
valid_sources[0x13]	309623	1			T2	4		T3	1637		T4	2291
valid_sources[0x14]	319405	1			T2	5		T3	1644		T4	2376
valid_sources[0x15]	306284	1			T3	1874		T4	2356		T5	44
valid_sources[0x16]	302255	1			T3	1620		T4	2325		T5	23
valid_sources[0x17]	311563	1			T3	1719		T4	2429		T5	63
valid_sources[0x18]	316587	1			T2	1		T3	1607		T4	2319
valid_sources[0x19]	339826	1			T3	1722		T4	2333		T5	28
valid_sources[0x1a]	316999	1			T3	1780		T4	2216		T5	62
valid_sources[0x1b]	312980	1			T2	2		T3	1625		T4	2352
valid_sources[0x1c]	776335	1			T2	1		T3	1850		T4	2333
valid_sources[0x1d]	587881	1			T2	6		T3	1809		T4	2339
valid_sources[0x1e]	320566	1			T3	1809		T4	2229		T5	72
valid_sources[0x1f]	310713	1			T2	3		T3	1781		T4	2395
valid_sources[0x20]	323864	1			T2	6		T3	1691		T4	2464
valid_sources[0x21]	311001	1			T2	1		T3	1622		T4	2436
valid_sources[0x22]	344076	1			T2	2		T3	1637		T4	2375
valid_sources[0x23]	323454	1			T3	1679		T4	2354		T5	36
valid_sources[0x24]	305376	1			T3	1689		T4	2464		T5	1
valid_sources[0x25]	324782	1			T2	6		T3	1745		T4	2267
valid_sources[0x26]	304190	1			T3	1832		T4	2393		T5	61
valid_sources[0x27]	317187	1			T2	2		T3	1855		T4	2325
valid_sources[0x28]	313315	1			T3	1516		T4	2323		T5	82
valid_sources[0x29]	306448	1			T3	1808		T4	2349		T5	94
valid_sources[0x2a]	767653	1			T3	1722		T4	2307		T5	62
valid_sources[0x2b]	802842	1			T3	1692		T4	2284		T5	11
valid_sources[0x2c]	324643	1			T2	1		T3	1729		T4	2289
valid_sources[0x2d]	323710	1			T2	2		T3	1541		T4	2452
valid_sources[0x2e]	316317	1			T3	1880		T4	2377		T5	37
valid_sources[0x2f]	305773	1			T3	1627		T4	2374		T5	39
valid_sources[0x30]	305745	1			T3	1647		T4	2407		T5	82
valid_sources[0x31]	319832	1			T2	1		T3	1805		T4	2181
valid_sources[0x32]	342064	1			T3	1739		T4	2275		T5	39
valid_sources[0x33]	305697	1			T3	1751		T4	2335		T5	22
valid_sources[0x34]	310249	1			T2	1		T3	1621		T4	2284
valid_sources[0x35]	312682	1			T3	1629		T4	2350		T5	41
valid_sources[0x36]	314738	1			T2	9		T3	1687		T4	2290
valid_sources[0x37]	306685	1			T2	4		T3	1520		T4	2309
valid_sources[0x38]	604786	1			T2	1		T3	1712		T4	2292
valid_sources[0x39]	313227	1			T2	1		T3	1735		T4	2338
valid_sources[0x3a]	299676	1			T2	1		T3	1631		T4	2405
valid_sources[0x3b]	327230	1			T3	1741		T4	2270		T5	7
valid_sources[0x3c]	302057	1			T2	3		T3	1693		T4	2339
valid_sources[0x3d]	324851	1			T2	1		T3	1662		T4	2344
valid_sources[0x3e]	315847	1			T2	2		T3	1641		T4	2346
valid_sources[0x3f]	315494	1			T3	1757		T4	2344		T5	12
valid_sources[0x40]	303162	1			T2	1		T3	1748		T4	2297
valid_sources[0x41]	752052	1			T3	1608		T4	2327		T5	44
valid_sources[0x42]	693053	1			T3	1668		T4	2316		T5	77
valid_sources[0x43]	315557	1			T2	2		T3	1672		T4	2317
valid_sources[0x44]	694245	1			T2	2		T3	1658		T4	2326
valid_sources[0x45]	317285	1			T2	3		T3	1868		T4	2376
valid_sources[0x46]	304276	1			T2	1		T3	1691		T4	2334
valid_sources[0x47]	307245	1			T2	9		T3	1573		T4	2330
valid_sources[0x48]	310484	1			T2	2		T3	1911		T4	2349
valid_sources[0x49]	323037	1			T3	1555		T4	2319		T5	27
valid_sources[0x4a]	329220	1			T2	2		T3	1688		T4	2405
valid_sources[0x4b]	305483	1			T3	1588		T4	2427		T5	25
valid_sources[0x4c]	321153	1			T2	3		T3	1947		T4	2283
valid_sources[0x4d]	313102	1			T3	1621		T4	2330		T5	42
valid_sources[0x4e]	324629	1			T3	1699		T4	2303		T5	25
valid_sources[0x4f]	313847	1			T2	1		T3	1678		T4	2360
valid_sources[0x50]	329758	1			T3	1952		T4	2368		T5	66
valid_sources[0x51]	312961	1			T3	1733		T4	2288		T5	38
valid_sources[0x52]	308101	1			T2	2		T3	1694		T4	2351
valid_sources[0x53]	350064	1			T2	5		T3	1794		T4	2346
valid_sources[0x54]	312269	1			T3	1707		T4	2394		T5	11
valid_sources[0x55]	319243	1			T2	4		T3	1847		T4	2282
valid_sources[0x56]	780895	1			T2	3		T3	1687		T4	2336
valid_sources[0x57]	315966	1			T3	1839		T4	2413		T5	87
valid_sources[0x58]	315077	1			T3	1804		T4	2223		T5	76
valid_sources[0x59]	327922	1			T2	3		T3	1661		T4	2303
valid_sources[0x5a]	314238	1			T3	1707		T4	2316		T5	46
valid_sources[0x5b]	800291	1			T2	1		T3	1777		T4	2335
valid_sources[0x5c]	311155	1			T2	4		T3	1761		T4	2427
valid_sources[0x5d]	313120	1			T2	2		T3	1670		T4	2317
valid_sources[0x5e]	315351	1			T3	1889		T4	2314		T5	19
valid_sources[0x5f]	312378	1			T2	2		T3	1615		T4	2331
valid_sources[0x60]	309852	1			T2	3		T3	1890		T4	2371
valid_sources[0x61]	309681	1			T2	3		T3	1841		T4	2314
valid_sources[0x62]	633859	1			T3	1525		T4	2367		T5	17
valid_sources[0x63]	312377	1			T2	2		T3	1855		T4	2347
valid_sources[0x64]	314182	1			T1	10031		T2	3		T3	1709
valid_sources[0x65]	569244	1			T2	2		T3	1667		T4	2368
valid_sources[0x66]	316419	1			T3	1817		T4	2240		T5	107
valid_sources[0x67]	778064	1			T3	1696		T4	2294		T5	24
valid_sources[0x68]	694252	1			T2	1		T3	1849		T4	2446
valid_sources[0x69]	316460	1			T2	2		T3	1770		T4	2345
valid_sources[0x6a]	310427	1			T3	1646		T4	2306		T5	44
valid_sources[0x6b]	777674	1			T2	4		T3	1850		T4	2352
valid_sources[0x6c]	302596	1			T2	1		T3	1733		T4	2449
valid_sources[0x6d]	314960	1			T2	5		T3	1713		T4	2340
valid_sources[0x6e]	312914	1			T3	1788		T4	2323		T5	95
valid_sources[0x6f]	773175	1			T2	3		T3	1603		T4	2372
valid_sources[0x70]	308684	1			T2	4		T3	1769		T4	2296
valid_sources[0x71]	307844	1			T3	1542		T4	2319		T5	6
valid_sources[0x72]	577709	1			T2	5		T3	1647		T4	2376
valid_sources[0x73]	316244	1			T2	1		T3	1941		T4	2365
valid_sources[0x74]	310142	1			T2	2		T3	1720		T4	2378
valid_sources[0x75]	534766	1			T2	1		T3	1875		T4	2377
valid_sources[0x76]	338916	1			T2	1		T3	1672		T4	2305
valid_sources[0x77]	306053	1			T3	1676		T4	2340		T5	49
valid_sources[0x78]	361493	1			T2	1		T3	1675		T4	2287
valid_sources[0x79]	304910	1			T2	3		T3	1592		T4	2479
valid_sources[0x7a]	311127	1			T2	3		T3	1786		T4	2336
valid_sources[0x7b]	776594	1			T3	1529		T4	2369		T5	3
valid_sources[0x7c]	311232	1			T3	1792		T4	2304		T5	24
valid_sources[0x7d]	298614	1			T2	8		T3	1741		T4	2304
valid_sources[0x7e]	322269	1			T2	10		T3	1981		T4	2425
valid_sources[0x7f]	983503	1			T2	5		T3	1588		T4	2338
valid_sources[0x80]	303100	1			T2	2		T3	1757		T4	2353

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7170845

1

T1

1052

T2

37

T3

33838

values[0x0]

all_enables

biggest_size

15154334

1

T1

1530

T2

77

T3

73337

values[0x1]

all_enables

biggest_size

8903406

1

T1

810

T2

36

T3

47394