Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 68048555 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 33194635 1 T1 166253 T2 89 T3 2583



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 15318281 1 T1 66277 T2 25 T3 1155
values[0x0] 41662009 1 T1 229951 T2 156 T3 3463
values[0x1] 44262900 1 T1 231502 T2 165 T3 3393



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 57810047 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 43433143 1 T1 210467 T2 117 T3 3303



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 327119 1 T1 2029 T12 82 T6 4
valid_sources[0x01] 1158192 1 T1 2115 T12 66 T6 11
valid_sources[0x02] 751728 1 T1 1855 T12 48 T6 34
valid_sources[0x03] 608108 1 T1 1924 T12 55 T6 40
valid_sources[0x04] 331530 1 T1 1893 T12 54 T6 49
valid_sources[0x05] 628362 1 T1 1930 T12 45 T6 10
valid_sources[0x06] 684797 1 T1 2539 T12 64 T6 24
valid_sources[0x07] 332917 1 T1 1932 T12 66 T6 37
valid_sources[0x08] 333066 1 T1 1889 T12 68 T6 12
valid_sources[0x09] 734341 1 T1 1936 T12 75 T6 11
valid_sources[0x0a] 335584 1 T1 2509 T12 71 T6 20
valid_sources[0x0b] 334797 1 T1 2108 T12 52 T6 33
valid_sources[0x0c] 345200 1 T1 1785 T12 59 T6 16
valid_sources[0x0d] 334121 1 T1 2481 T12 55 T6 37
valid_sources[0x0e] 344584 1 T1 1926 T12 55 T6 26
valid_sources[0x0f] 332228 1 T1 1623 T12 71 T6 46
valid_sources[0x10] 360270 1 T1 1974 T12 44 T6 18
valid_sources[0x11] 338385 1 T1 1902 T12 76 T6 17
valid_sources[0x12] 328759 1 T1 2219 T12 54 T6 23
valid_sources[0x13] 336027 1 T1 2318 T12 59 T6 15
valid_sources[0x14] 325779 1 T1 1998 T12 57 T6 18
valid_sources[0x15] 741455 1 T1 2261 T12 51 T6 59
valid_sources[0x16] 332076 1 T1 1762 T12 52 T6 8
valid_sources[0x17] 327964 1 T1 2174 T12 53 T6 27
valid_sources[0x18] 334975 1 T1 2343 T12 61 T6 27
valid_sources[0x19] 339271 1 T1 2409 T12 47 T6 6
valid_sources[0x1a] 774250 1 T1 1818 T12 49 T6 28
valid_sources[0x1b] 335576 1 T1 1845 T12 62 T6 20
valid_sources[0x1c] 344062 1 T1 2054 T12 51 T6 18
valid_sources[0x1d] 337923 1 T1 2137 T12 60 T6 7
valid_sources[0x1e] 333133 1 T1 1666 T12 54 T6 42
valid_sources[0x1f] 330832 1 T1 1925 T12 61 T6 17
valid_sources[0x20] 321863 1 T1 2195 T12 61 T6 32
valid_sources[0x21] 331221 1 T1 2005 T12 52 T6 24
valid_sources[0x22] 425942 1 T1 1921 T12 67 T6 7
valid_sources[0x23] 496540 1 T1 2284 T12 61 T6 11
valid_sources[0x24] 339450 1 T1 2155 T12 56 T6 8
valid_sources[0x25] 332370 1 T1 2359 T12 58 T6 21
valid_sources[0x26] 338109 1 T1 2286 T12 61 T6 43
valid_sources[0x27] 335860 1 T1 2162 T12 56 T6 10
valid_sources[0x28] 336677 1 T1 2084 T12 58 T6 1
valid_sources[0x29] 897899 1 T1 2158 T12 49 T6 30
valid_sources[0x2a] 327166 1 T1 2087 T12 48 T6 37
valid_sources[0x2b] 332591 1 T1 2214 T12 58 T6 5
valid_sources[0x2c] 338441 1 T1 2381 T12 64 T6 17
valid_sources[0x2d] 331056 1 T1 2472 T12 51 T6 50
valid_sources[0x2e] 760218 1 T1 2041 T12 53 T6 25
valid_sources[0x2f] 333108 1 T1 2079 T12 48 T6 35
valid_sources[0x30] 329451 1 T1 2432 T12 62 T6 4
valid_sources[0x31] 360453 1 T1 1991 T12 60 T6 8
valid_sources[0x32] 825881 1 T1 2415 T12 84 T6 41
valid_sources[0x33] 332723 1 T1 1802 T12 67 T6 65
valid_sources[0x34] 339721 1 T1 2307 T12 52 T6 12
valid_sources[0x35] 335417 1 T1 1970 T12 64 T6 15
valid_sources[0x36] 340581 1 T1 2222 T12 68 T6 19
valid_sources[0x37] 760125 1 T1 2035 T12 69 T6 30
valid_sources[0x38] 324523 1 T1 2073 T12 41 T6 21
valid_sources[0x39] 337492 1 T1 2411 T12 65 T6 21
valid_sources[0x3a] 327889 1 T1 2177 T12 69 T6 15
valid_sources[0x3b] 333500 1 T1 1950 T12 56 T6 5
valid_sources[0x3c] 326713 1 T1 2118 T12 70 T6 9
valid_sources[0x3d] 351684 1 T1 2057 T12 57 T6 23
valid_sources[0x3e] 332689 1 T1 1947 T12 48 T6 10
valid_sources[0x3f] 348029 1 T1 2323 T12 58 T6 19
valid_sources[0x40] 333038 1 T1 2097 T12 66 T6 20
valid_sources[0x41] 415131 1 T1 1336 T12 47 T6 34
valid_sources[0x42] 335833 1 T1 2043 T12 60 T6 14
valid_sources[0x43] 333658 1 T1 2374 T12 69 T6 39
valid_sources[0x44] 334046 1 T1 1926 T12 62 T6 14
valid_sources[0x45] 751487 1 T1 2323 T12 52 T6 23
valid_sources[0x46] 330334 1 T1 2020 T12 59 T6 6
valid_sources[0x47] 336760 1 T1 2108 T12 76 T6 56
valid_sources[0x48] 337329 1 T1 1912 T12 48 T6 29
valid_sources[0x49] 614649 1 T1 2027 T12 59 T6 10
valid_sources[0x4a] 813307 1 T1 1978 T12 59 T6 20
valid_sources[0x4b] 337595 1 T1 2311 T12 49 T6 10
valid_sources[0x4c] 326742 1 T1 2019 T12 58 T6 30
valid_sources[0x4d] 330575 1 T1 2261 T12 47 T6 12
valid_sources[0x4e] 347132 1 T1 2508 T12 66 T6 43
valid_sources[0x4f] 342272 1 T1 1930 T12 57 T6 27
valid_sources[0x50] 339509 1 T1 2124 T12 69 T6 31
valid_sources[0x51] 696407 1 T1 2352 T12 48 T6 38
valid_sources[0x52] 344018 1 T1 2537 T12 64 T6 35
valid_sources[0x53] 337981 1 T1 1815 T12 69 T6 35
valid_sources[0x54] 339054 1 T1 1743 T12 45 T6 10
valid_sources[0x55] 331582 1 T1 2117 T12 48 T6 15
valid_sources[0x56] 324471 1 T1 1788 T12 53 T6 4
valid_sources[0x57] 330542 1 T1 1924 T12 52 T6 47
valid_sources[0x58] 337813 1 T1 2283 T12 45 T6 18
valid_sources[0x59] 344700 1 T1 1727 T12 68 T6 31
valid_sources[0x5a] 332938 1 T1 1877 T12 63 T6 34
valid_sources[0x5b] 332566 1 T1 2255 T12 67 T6 22
valid_sources[0x5c] 347610 1 T1 2196 T12 58 T6 15
valid_sources[0x5d] 347573 1 T1 1538 T12 56 T6 6
valid_sources[0x5e] 345371 1 T1 1837 T12 45 T6 31
valid_sources[0x5f] 338959 1 T1 1906 T12 63 T6 10
valid_sources[0x60] 334874 1 T1 1919 T12 47 T6 19
valid_sources[0x61] 331618 1 T1 2130 T12 54 T6 36
valid_sources[0x62] 321738 1 T1 2001 T12 57 T6 25
valid_sources[0x63] 325999 1 T1 2193 T12 55 T6 48
valid_sources[0x64] 334762 1 T1 2297 T12 64 T6 40
valid_sources[0x65] 335177 1 T1 2010 T12 53 T6 16
valid_sources[0x66] 324888 1 T1 2222 T12 47 T6 7
valid_sources[0x67] 334509 1 T1 2363 T12 69 T6 38
valid_sources[0x68] 344268 1 T1 2319 T12 50 T6 12
valid_sources[0x69] 341930 1 T1 2113 T12 59 T6 39
valid_sources[0x6a] 337043 1 T1 2271 T12 59 T6 16
valid_sources[0x6b] 336471 1 T1 2058 T12 51 T6 17
valid_sources[0x6c] 334899 1 T1 1864 T12 63 T6 58
valid_sources[0x6d] 334139 1 T1 2251 T2 346 T12 56
valid_sources[0x6e] 335742 1 T1 2055 T12 72 T6 28
valid_sources[0x6f] 352759 1 T1 2227 T12 64 T6 22
valid_sources[0x70] 748556 1 T1 1959 T12 62 T6 19
valid_sources[0x71] 334229 1 T1 1979 T12 57 T6 12
valid_sources[0x72] 333560 1 T1 2027 T12 53 T6 14
valid_sources[0x73] 332657 1 T1 2329 T12 74 T6 39
valid_sources[0x74] 334638 1 T1 2159 T12 58 T6 35
valid_sources[0x75] 355920 1 T1 1707 T12 66 T6 23
valid_sources[0x76] 335294 1 T1 1963 T12 49 T6 41
valid_sources[0x77] 340647 1 T1 1769 T12 60 T6 12
valid_sources[0x78] 371768 1 T1 1665 T12 43 T6 18
valid_sources[0x79] 337334 1 T1 2199 T12 61 T6 15
valid_sources[0x7a] 738662 1 T1 1962 T12 49 T6 26
valid_sources[0x7b] 333906 1 T1 2110 T12 41 T6 26
valid_sources[0x7c] 329708 1 T1 2054 T12 64 T6 27
valid_sources[0x7d] 345004 1 T1 1729 T12 35 T6 18
valid_sources[0x7e] 338563 1 T1 2240 T12 51 T6 43
valid_sources[0x7f] 329696 1 T1 2005 T12 60 T6 52
valid_sources[0x80] 336578 1 T1 2107 T12 64 T6 18



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 7667404 1 T1 32934 T2 10 T3 579
values[0x0] all_enables biggest_size 16060887 1 T1 85157 T2 46 T3 1297
values[0x1] all_enables biggest_size 9466344 1 T1 48162 T2 33 T3 707

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%