Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64655654	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31309367

1

T1

99526

T2

232

T3

1799

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14517933	1			T1	41605		T2	157		T3	702
values[0x0]	39765736	1			T1	136426		T2	220		T3	2730
values[0x1]	41681352	1			T1	136043		T2	227		T3	2702

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55279094	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

40685927

1

T1

125730

T2

291

T3

2327

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	292051	1			T1	1230		T2	2		T4	11
valid_sources[0x01]	287120	1			T1	1254		T2	1		T3	73
valid_sources[0x02]	902680	1			T1	1218		T2	2		T3	96
valid_sources[0x03]	292395	1			T1	1178		T2	1		T3	17
valid_sources[0x04]	289035	1			T1	1269		T2	4		T3	60
valid_sources[0x05]	306940	1			T1	1192		T2	1		T4	11
valid_sources[0x06]	289765	1			T1	1250		T4	11		T17	18
valid_sources[0x07]	297309	1			T1	1176		T2	5		T3	250
valid_sources[0x08]	281741	1			T1	1158		T2	3		T3	14
valid_sources[0x09]	284069	1			T1	1248		T2	1		T3	131
valid_sources[0x0a]	291173	1			T1	1237		T2	1		T3	18
valid_sources[0x0b]	803061	1			T1	1249		T2	5		T3	42
valid_sources[0x0c]	286539	1			T1	1266		T2	1		T4	14
valid_sources[0x0d]	282220	1			T1	1260		T2	1		T4	9
valid_sources[0x0e]	297537	1			T1	1272		T2	3		T3	25
valid_sources[0x0f]	287706	1			T1	1218		T2	3		T4	9
valid_sources[0x10]	292417	1			T1	1166		T2	1		T4	12
valid_sources[0x11]	291511	1			T1	1278		T3	91		T4	9
valid_sources[0x12]	281684	1			T1	1282		T3	82		T4	10
valid_sources[0x13]	761317	1			T1	1234		T2	1		T4	12
valid_sources[0x14]	658911	1			T1	1346		T2	2		T4	15
valid_sources[0x15]	287560	1			T1	1249		T2	4		T3	161
valid_sources[0x16]	289956	1			T1	1145		T2	3		T3	9
valid_sources[0x17]	312911	1			T1	1250		T2	2		T4	10
valid_sources[0x18]	293896	1			T1	1264		T2	3		T3	16
valid_sources[0x19]	286334	1			T1	1226		T2	2		T3	94
valid_sources[0x1a]	282047	1			T1	1255		T2	1		T4	10
valid_sources[0x1b]	293370	1			T1	1207		T2	3		T4	11
valid_sources[0x1c]	522471	1			T1	1247		T2	6		T4	15
valid_sources[0x1d]	286861	1			T1	1250		T2	1		T4	17
valid_sources[0x1e]	289656	1			T1	1180		T2	2		T4	9
valid_sources[0x1f]	296463	1			T1	1261		T2	1		T3	67
valid_sources[0x20]	290622	1			T1	1257		T2	3		T3	1
valid_sources[0x21]	293823	1			T1	1209		T2	2		T4	8
valid_sources[0x22]	295011	1			T1	1198		T2	3		T3	59
valid_sources[0x23]	486285	1			T1	1136		T2	5		T4	10
valid_sources[0x24]	334969	1			T1	1272		T2	1		T4	11
valid_sources[0x25]	290069	1			T1	1186		T2	4		T4	9
valid_sources[0x26]	286627	1			T1	1294		T3	7		T4	17
valid_sources[0x27]	279913	1			T1	1243		T2	3		T3	115
valid_sources[0x28]	303043	1			T1	1237		T4	11		T16	3
valid_sources[0x29]	294241	1			T1	1165		T2	1		T4	14
valid_sources[0x2a]	280880	1			T1	1302		T2	4		T3	93
valid_sources[0x2b]	288940	1			T1	1203		T2	2		T4	14
valid_sources[0x2c]	295910	1			T1	1195		T2	2		T4	12
valid_sources[0x2d]	306880	1			T1	1191		T2	1		T3	33
valid_sources[0x2e]	335741	1			T1	1194		T3	133		T4	10
valid_sources[0x2f]	758914	1			T1	1247		T2	3		T3	26
valid_sources[0x30]	286873	1			T1	1262		T2	2		T3	36
valid_sources[0x31]	290311	1			T1	1241		T2	5		T3	31
valid_sources[0x32]	294773	1			T1	1196		T2	1		T3	39
valid_sources[0x33]	292145	1			T1	1220		T2	2		T3	67
valid_sources[0x34]	281444	1			T1	1200		T2	4		T4	16
valid_sources[0x35]	332790	1			T1	1257		T2	3		T4	13
valid_sources[0x36]	291362	1			T1	1297		T2	4		T4	12
valid_sources[0x37]	290017	1			T1	1176		T4	17		T17	15
valid_sources[0x38]	573739	1			T1	1252		T2	1		T4	8
valid_sources[0x39]	289382	1			T1	1214		T2	2		T3	49
valid_sources[0x3a]	292944	1			T1	1259		T2	3		T4	9
valid_sources[0x3b]	740076	1			T1	1112		T4	9		T17	16
valid_sources[0x3c]	300024	1			T1	1163		T2	1		T4	9
valid_sources[0x3d]	924592	1			T1	1195		T2	2		T4	18
valid_sources[0x3e]	308661	1			T1	1219		T2	3		T3	12
valid_sources[0x3f]	284602	1			T1	1200		T4	12		T17	13
valid_sources[0x40]	673469	1			T1	1222		T2	4		T3	212
valid_sources[0x41]	291915	1			T1	1253		T2	4		T4	16
valid_sources[0x42]	309377	1			T1	1187		T2	4		T3	75
valid_sources[0x43]	287186	1			T1	1179		T2	3		T4	5
valid_sources[0x44]	287530	1			T1	1219		T2	2		T4	15
valid_sources[0x45]	335667	1			T1	1230		T2	3		T3	6
valid_sources[0x46]	293380	1			T1	1200		T2	3		T4	11
valid_sources[0x47]	923309	1			T1	1249		T2	2		T3	29
valid_sources[0x48]	918690	1			T1	1215		T2	2		T4	14
valid_sources[0x49]	643616	1			T1	1181		T2	7		T4	15
valid_sources[0x4a]	303609	1			T1	1218		T2	3		T3	13
valid_sources[0x4b]	287426	1			T1	1176		T2	1		T3	1
valid_sources[0x4c]	285207	1			T1	1224		T2	2		T3	31
valid_sources[0x4d]	288332	1			T1	1190		T2	2		T3	18
valid_sources[0x4e]	283531	1			T1	1274		T2	5		T3	33
valid_sources[0x4f]	290110	1			T1	1202		T2	3		T3	72
valid_sources[0x50]	279540	1			T1	1206		T2	2		T4	6
valid_sources[0x51]	293085	1			T1	1229		T2	3		T3	1
valid_sources[0x52]	283532	1			T1	1238		T2	3		T4	10
valid_sources[0x53]	291599	1			T1	1191		T4	12		T17	29
valid_sources[0x54]	281781	1			T1	1263		T2	6		T4	9
valid_sources[0x55]	573980	1			T1	1267		T3	72		T4	10
valid_sources[0x56]	286026	1			T1	1198		T2	4		T3	123
valid_sources[0x57]	730018	1			T1	1216		T2	2		T4	14
valid_sources[0x58]	594334	1			T1	1206		T2	2		T4	7
valid_sources[0x59]	282544	1			T1	1225		T2	3		T3	2
valid_sources[0x5a]	300172	1			T1	1223		T2	1		T3	6
valid_sources[0x5b]	288896	1			T1	1288		T2	2		T3	39
valid_sources[0x5c]	276443	1			T1	1221		T2	1		T3	81
valid_sources[0x5d]	296180	1			T1	1256		T2	2		T4	7
valid_sources[0x5e]	293117	1			T1	1172		T3	24		T4	15
valid_sources[0x5f]	290868	1			T1	1202		T2	2		T4	10
valid_sources[0x60]	294003	1			T1	1265		T2	1		T4	14
valid_sources[0x61]	540399	1			T1	1220		T2	3		T4	11
valid_sources[0x62]	301526	1			T1	1266		T2	1		T4	16
valid_sources[0x63]	299515	1			T1	1250		T2	2		T4	14
valid_sources[0x64]	292066	1			T1	1216		T2	3		T4	11
valid_sources[0x65]	292626	1			T1	1234		T2	1		T4	11
valid_sources[0x66]	289663	1			T1	1198		T2	2		T3	58
valid_sources[0x67]	287574	1			T1	1167		T2	1		T3	35
valid_sources[0x68]	315768	1			T1	1212		T2	2		T3	26
valid_sources[0x69]	285094	1			T1	1246		T2	2		T3	61
valid_sources[0x6a]	288134	1			T1	1214		T2	3		T4	10
valid_sources[0x6b]	287518	1			T1	1266		T2	2		T3	12
valid_sources[0x6c]	294294	1			T1	1225		T2	3		T3	48
valid_sources[0x6d]	283045	1			T1	1198		T2	2		T4	7
valid_sources[0x6e]	290849	1			T1	1224		T2	1		T3	58
valid_sources[0x6f]	938670	1			T1	1185		T2	4		T4	17
valid_sources[0x70]	293806	1			T1	1263		T2	5		T4	13
valid_sources[0x71]	759130	1			T1	1249		T2	2		T3	44
valid_sources[0x72]	291015	1			T1	1211		T2	6		T4	6
valid_sources[0x73]	290706	1			T1	1223		T2	6		T4	5
valid_sources[0x74]	293792	1			T1	1221		T2	1		T4	13
valid_sources[0x75]	286985	1			T1	1262		T2	2		T3	34
valid_sources[0x76]	296593	1			T1	1200		T2	2		T3	15
valid_sources[0x77]	724010	1			T1	1234		T2	1		T4	11
valid_sources[0x78]	284845	1			T1	1272		T3	21		T4	15
valid_sources[0x79]	286340	1			T1	1215		T2	3		T4	10
valid_sources[0x7a]	337815	1			T1	1225		T2	3		T3	100
valid_sources[0x7b]	287210	1			T1	1274		T2	3		T3	77
valid_sources[0x7c]	287951	1			T1	1237		T2	3		T4	10
valid_sources[0x7d]	1018372	1			T1	1237		T2	6		T3	10
valid_sources[0x7e]	681967	1			T1	1243		T2	9		T3	45
valid_sources[0x7f]	292158	1			T1	1144		T2	8		T3	44
valid_sources[0x80]	292296	1			T1	1235		T2	1		T4	20

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7217250

1

T1

20694

T2

89

T3

350

values[0x0]

all_enables

biggest_size

15211916

1

T1

50528

T2

96

T3

928

values[0x1]

all_enables

biggest_size

8880201

1

T1

28304

T2

47

T3

521