Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69660033	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33998143

1

T1

66227

T2

12151

T3

89

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	15472314	1			T1	24856		T2	4877		T3	19
values[0x0]	42738942	1			T1	71149		T2	17241		T3	163
values[0x1]	45446920	1			T1	92615		T2	17283		T3	152

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	59192051	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

44466125

1

T1

94345

T2

15491

T3

111

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	353790	1			T1	696		T2	105		T4	1142
valid_sources[0x01]	390503	1			T1	759		T2	233		T4	1103
valid_sources[0x02]	361572	1			T1	690		T2	197		T4	1179
valid_sources[0x03]	351251	1			T1	631		T2	116		T4	1138
valid_sources[0x04]	356105	1			T1	739		T2	203		T4	1154
valid_sources[0x05]	358585	1			T1	681		T2	101		T4	1090
valid_sources[0x06]	349356	1			T1	680		T2	264		T4	1092
valid_sources[0x07]	366803	1			T1	780		T2	138		T4	1105
valid_sources[0x08]	362217	1			T1	746		T2	241		T4	1080
valid_sources[0x09]	349723	1			T1	794		T2	129		T4	1139
valid_sources[0x0a]	548790	1			T1	761		T2	221		T4	1117
valid_sources[0x0b]	334794	1			T1	685		T2	202		T4	1118
valid_sources[0x0c]	349744	1			T1	740		T2	227		T4	1154
valid_sources[0x0d]	349858	1			T1	719		T2	219		T4	1147
valid_sources[0x0e]	351683	1			T1	676		T2	92		T4	1073
valid_sources[0x0f]	353576	1			T1	715		T2	269		T4	1149
valid_sources[0x10]	904120	1			T1	640		T2	102		T4	1163
valid_sources[0x11]	382987	1			T1	773		T2	113		T4	1097
valid_sources[0x12]	349246	1			T1	709		T2	53		T4	1049
valid_sources[0x13]	815243	1			T1	690		T2	95		T4	1103
valid_sources[0x14]	634497	1			T1	710		T2	236		T4	1111
valid_sources[0x15]	353820	1			T1	697		T2	43		T4	1073
valid_sources[0x16]	369977	1			T1	756		T2	148		T4	1116
valid_sources[0x17]	1096376	1			T1	715		T2	185		T4	1072
valid_sources[0x18]	357736	1			T1	792		T2	55		T4	1172
valid_sources[0x19]	354932	1			T1	761		T2	184		T4	1078
valid_sources[0x1a]	343773	1			T1	794		T2	155		T4	1075
valid_sources[0x1b]	347539	1			T1	678		T2	142		T4	1119
valid_sources[0x1c]	352318	1			T1	720		T2	159		T4	1129
valid_sources[0x1d]	388269	1			T1	657		T2	137		T4	1118
valid_sources[0x1e]	369513	1			T1	727		T2	124		T4	1155
valid_sources[0x1f]	376393	1			T1	699		T2	97		T4	1134
valid_sources[0x20]	345286	1			T1	704		T2	60		T4	1109
valid_sources[0x21]	576108	1			T1	695		T2	103		T4	1085
valid_sources[0x22]	351065	1			T1	758		T2	75		T4	1090
valid_sources[0x23]	711732	1			T1	778		T2	162		T4	1113
valid_sources[0x24]	368915	1			T1	779		T2	186		T4	1149
valid_sources[0x25]	363361	1			T1	711		T2	247		T4	1130
valid_sources[0x26]	347557	1			T1	787		T2	233		T4	1151
valid_sources[0x27]	670611	1			T1	750		T2	146		T4	1090
valid_sources[0x28]	347131	1			T1	738		T2	177		T4	1122
valid_sources[0x29]	362021	1			T1	732		T2	147		T4	1091
valid_sources[0x2a]	389699	1			T1	777		T2	256		T4	1083
valid_sources[0x2b]	349295	1			T1	741		T2	62		T4	1107
valid_sources[0x2c]	359005	1			T1	667		T2	86		T4	1123
valid_sources[0x2d]	361268	1			T1	707		T2	153		T4	1151
valid_sources[0x2e]	419159	1			T1	726		T2	73		T4	1090
valid_sources[0x2f]	363804	1			T1	804		T2	43		T4	1103
valid_sources[0x30]	820287	1			T1	781		T2	81		T4	1116
valid_sources[0x31]	349599	1			T1	763		T2	106		T4	1113
valid_sources[0x32]	347666	1			T1	798		T2	18		T4	1167
valid_sources[0x33]	353085	1			T1	791		T2	36		T4	1126
valid_sources[0x34]	347537	1			T1	834		T2	80		T4	1076
valid_sources[0x35]	356271	1			T1	801		T2	121		T4	1137
valid_sources[0x36]	390375	1			T1	694		T2	82		T4	1086
valid_sources[0x37]	358306	1			T1	708		T2	263		T4	1079
valid_sources[0x38]	352531	1			T1	800		T2	169		T4	1166
valid_sources[0x39]	353997	1			T1	703		T2	122		T4	1083
valid_sources[0x3a]	351986	1			T1	702		T2	457		T4	1152
valid_sources[0x3b]	721012	1			T1	769		T2	48		T4	1148
valid_sources[0x3c]	349493	1			T1	789		T2	112		T4	1192
valid_sources[0x3d]	357889	1			T1	753		T2	138		T4	1098
valid_sources[0x3e]	367764	1			T1	778		T2	112		T4	1152
valid_sources[0x3f]	613889	1			T1	793		T2	63		T4	1123
valid_sources[0x40]	350437	1			T1	755		T2	228		T4	1101
valid_sources[0x41]	349266	1			T1	709		T2	53		T4	1139
valid_sources[0x42]	357304	1			T1	736		T2	163		T4	1106
valid_sources[0x43]	349477	1			T1	723		T2	118		T4	1157
valid_sources[0x44]	353555	1			T1	649		T2	165		T4	1156
valid_sources[0x45]	355950	1			T1	708		T2	243		T4	1136
valid_sources[0x46]	600868	1			T1	783		T2	231		T4	1130
valid_sources[0x47]	341067	1			T1	733		T2	70		T4	1140
valid_sources[0x48]	352337	1			T1	761		T2	147		T4	1111
valid_sources[0x49]	377271	1			T1	759		T2	163		T4	1082
valid_sources[0x4a]	348576	1			T1	732		T2	111		T4	1051
valid_sources[0x4b]	628372	1			T1	789		T2	110		T4	1100
valid_sources[0x4c]	357785	1			T1	777		T2	211		T4	1068
valid_sources[0x4d]	355811	1			T1	699		T2	55		T4	1111
valid_sources[0x4e]	349753	1			T1	714		T2	196		T4	1147
valid_sources[0x4f]	346272	1			T1	679		T2	203		T4	1137
valid_sources[0x50]	698105	1			T1	667		T2	177		T4	1096
valid_sources[0x51]	360279	1			T1	680		T2	57		T4	1119
valid_sources[0x52]	348224	1			T1	778		T2	147		T4	1159
valid_sources[0x53]	352327	1			T1	777		T2	122		T4	1088
valid_sources[0x54]	352501	1			T1	772		T2	131		T4	1154
valid_sources[0x55]	353540	1			T1	757		T2	182		T4	1078
valid_sources[0x56]	358559	1			T1	707		T2	183		T4	1075
valid_sources[0x57]	347556	1			T1	726		T2	157		T4	1115
valid_sources[0x58]	353882	1			T1	749		T2	77		T4	1090
valid_sources[0x59]	400771	1			T1	683		T2	189		T4	1104
valid_sources[0x5a]	362807	1			T1	775		T2	169		T4	1114
valid_sources[0x5b]	345454	1			T1	751		T2	161		T4	1163
valid_sources[0x5c]	349603	1			T1	783		T2	153		T4	1147
valid_sources[0x5d]	363929	1			T1	674		T2	61		T4	1058
valid_sources[0x5e]	354367	1			T1	767		T2	48		T4	1067
valid_sources[0x5f]	683245	1			T1	687		T2	226		T4	1097
valid_sources[0x60]	381846	1			T1	762		T2	69		T4	1170
valid_sources[0x61]	360876	1			T1	721		T2	56		T4	1103
valid_sources[0x62]	354884	1			T1	703		T2	194		T4	1125
valid_sources[0x63]	368790	1			T1	782		T2	183		T4	1155
valid_sources[0x64]	355591	1			T1	739		T2	32		T4	1129
valid_sources[0x65]	344407	1			T1	676		T2	223		T4	1117
valid_sources[0x66]	353253	1			T1	707		T2	177		T4	1102
valid_sources[0x67]	360590	1			T1	784		T2	154		T4	1053
valid_sources[0x68]	351395	1			T1	749		T2	255		T4	1119
valid_sources[0x69]	354429	1			T1	725		T2	295		T4	1063
valid_sources[0x6a]	359412	1			T1	775		T2	150		T4	1191
valid_sources[0x6b]	345050	1			T1	683		T2	129		T4	1089
valid_sources[0x6c]	368967	1			T1	714		T2	197		T4	1133
valid_sources[0x6d]	371631	1			T1	722		T2	30		T4	1126
valid_sources[0x6e]	356124	1			T1	723		T2	103		T4	1119
valid_sources[0x6f]	355697	1			T1	652		T2	146		T4	1157
valid_sources[0x70]	697610	1			T1	829		T2	92		T4	1134
valid_sources[0x71]	350456	1			T1	798		T2	148		T4	1111
valid_sources[0x72]	808079	1			T1	697		T2	266		T4	1113
valid_sources[0x73]	352895	1			T1	774		T2	182		T4	1131
valid_sources[0x74]	350522	1			T1	678		T2	80		T4	1132
valid_sources[0x75]	366231	1			T1	693		T2	195		T4	1141
valid_sources[0x76]	349605	1			T1	798		T2	201		T4	1122
valid_sources[0x77]	344968	1			T1	730		T2	234		T4	1115
valid_sources[0x78]	357579	1			T1	729		T2	90		T4	1058
valid_sources[0x79]	359813	1			T1	753		T2	267		T4	1043
valid_sources[0x7a]	352917	1			T1	724		T2	81		T4	1115
valid_sources[0x7b]	373814	1			T1	702		T2	73		T4	1047
valid_sources[0x7c]	358559	1			T1	695		T2	163		T4	1123
valid_sources[0x7d]	366362	1			T1	749		T2	213		T4	1152
valid_sources[0x7e]	352306	1			T1	734		T2	189		T4	1104
valid_sources[0x7f]	348213	1			T1	725		T2	128		T4	1079
valid_sources[0x80]	347163	1			T1	720		T2	245		T4	1171

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7786545

1

T1

14649

T2

2461

T3

8

values[0x0]

all_enables

biggest_size

16491373

1

T1

30889

T2

6257

T3

57

values[0x1]

all_enables

biggest_size

9720225

1

T1

20689

T2

3433

T3

24