Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 66193404 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 31948818 1 T1 145085 T2 35683 T3 1279



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14753127 1 T1 56559 T2 13939 T3 670
values[0x0] 40829163 1 T1 202217 T2 49149 T3 1556
values[0x1] 42559932 1 T1 202193 T2 49054 T3 1528



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56738528 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 41403694 1 T1 183896 T2 45080 T3 1610



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 303685 1 T1 1691 T3 63 T5 30
valid_sources[0x01] 303785 1 T1 1951 T3 58 T5 48
valid_sources[0x02] 317475 1 T1 2206 T5 33 T18 69
valid_sources[0x03] 299881 1 T1 1865 T3 2 T5 30
valid_sources[0x04] 309685 1 T1 1737 T5 35 T18 71
valid_sources[0x05] 299340 1 T1 1526 T3 8 T5 41
valid_sources[0x06] 319952 1 T1 1614 T5 53 T18 71
valid_sources[0x07] 311718 1 T1 1913 T3 38 T5 17
valid_sources[0x08] 306942 1 T1 1535 T3 41 T5 14
valid_sources[0x09] 315492 1 T1 1818 T3 11 T5 23
valid_sources[0x0a] 308237 1 T1 2005 T3 6 T5 57
valid_sources[0x0b] 767602 1 T1 1709 T5 28 T18 66
valid_sources[0x0c] 686611 1 T1 1671 T3 27 T5 35
valid_sources[0x0d] 302804 1 T1 1813 T3 37 T5 30
valid_sources[0x0e] 302221 1 T1 2007 T3 19 T5 32
valid_sources[0x0f] 303052 1 T1 1777 T5 59 T18 72
valid_sources[0x10] 300722 1 T1 1737 T3 4 T5 21
valid_sources[0x11] 1179941 1 T1 1800 T5 47 T18 79
valid_sources[0x12] 308077 1 T1 1681 T5 31 T18 83
valid_sources[0x13] 308866 1 T1 1542 T3 13 T5 38
valid_sources[0x14] 304507 1 T1 1934 T3 1 T5 39
valid_sources[0x15] 312629 1 T1 2101 T3 4 T5 29
valid_sources[0x16] 306013 1 T1 1811 T3 32 T5 35
valid_sources[0x17] 313305 1 T1 1677 T3 33 T5 36
valid_sources[0x18] 298827 1 T1 1426 T5 47 T18 68
valid_sources[0x19] 302300 1 T1 2199 T3 4 T5 54
valid_sources[0x1a] 310083 1 T1 1693 T3 12 T5 57
valid_sources[0x1b] 300142 1 T1 1957 T5 42 T18 88
valid_sources[0x1c] 319358 1 T1 1575 T5 21 T18 80
valid_sources[0x1d] 313685 1 T1 1556 T3 38 T5 32
valid_sources[0x1e] 309526 1 T1 1556 T3 17 T5 39
valid_sources[0x1f] 295340 1 T1 1490 T3 32 T5 38
valid_sources[0x20] 353415 1 T1 2150 T3 40 T5 53
valid_sources[0x21] 308064 1 T1 1684 T3 10 T5 46
valid_sources[0x22] 307929 1 T1 2063 T3 17 T5 24
valid_sources[0x23] 331476 1 T1 1772 T5 49 T18 65
valid_sources[0x24] 305362 1 T1 1962 T3 11 T5 19
valid_sources[0x25] 859843 1 T1 1787 T5 36 T18 71
valid_sources[0x26] 306294 1 T1 1784 T3 7 T5 47
valid_sources[0x27] 342961 1 T1 1836 T3 63 T5 39
valid_sources[0x28] 325567 1 T1 1634 T3 35 T5 40
valid_sources[0x29] 307859 1 T1 1587 T3 9 T5 37
valid_sources[0x2a] 318253 1 T1 2009 T3 16 T5 33
valid_sources[0x2b] 308186 1 T1 1706 T3 19 T5 48
valid_sources[0x2c] 323409 1 T1 1657 T3 14 T5 38
valid_sources[0x2d] 771542 1 T1 1692 T5 34 T18 69
valid_sources[0x2e] 423521 1 T1 1857 T2 112142 T3 9
valid_sources[0x2f] 301018 1 T1 2050 T5 65 T18 59
valid_sources[0x30] 298724 1 T1 1987 T5 51 T18 75
valid_sources[0x31] 329468 1 T1 1819 T5 32 T18 78
valid_sources[0x32] 317222 1 T1 1992 T3 9 T5 16
valid_sources[0x33] 305340 1 T1 1746 T5 39 T18 92
valid_sources[0x34] 307943 1 T1 1853 T5 30 T18 89
valid_sources[0x35] 300362 1 T1 1862 T3 5 T5 26
valid_sources[0x36] 313000 1 T1 1532 T5 32 T18 74
valid_sources[0x37] 301735 1 T1 1609 T3 10 T5 28
valid_sources[0x38] 510963 1 T1 1599 T3 6 T5 23
valid_sources[0x39] 314824 1 T1 2067 T5 48 T18 74
valid_sources[0x3a] 752683 1 T1 1647 T3 10 T5 43
valid_sources[0x3b] 304993 1 T1 1611 T3 16 T5 32
valid_sources[0x3c] 301377 1 T1 1850 T3 25 T5 56
valid_sources[0x3d] 307485 1 T1 2027 T5 33 T18 64
valid_sources[0x3e] 305648 1 T1 1867 T3 31 T5 34
valid_sources[0x3f] 309179 1 T1 2169 T3 54 T5 25
valid_sources[0x40] 313543 1 T1 1787 T3 18 T5 36
valid_sources[0x41] 297543 1 T1 1741 T3 5 T5 53
valid_sources[0x42] 303233 1 T1 1731 T3 53 T5 32
valid_sources[0x43] 301778 1 T1 2136 T3 1 T5 57
valid_sources[0x44] 304764 1 T1 2277 T3 18 T5 30
valid_sources[0x45] 314598 1 T1 1670 T3 2 T5 67
valid_sources[0x46] 308926 1 T1 1868 T3 80 T5 43
valid_sources[0x47] 352028 1 T1 1706 T5 18 T18 65
valid_sources[0x48] 307302 1 T1 1487 T3 8 T5 29
valid_sources[0x49] 300516 1 T1 2071 T5 34 T18 59
valid_sources[0x4a] 346718 1 T1 1557 T3 55 T5 31
valid_sources[0x4b] 311933 1 T1 2056 T3 2 T5 22
valid_sources[0x4c] 837538 1 T1 1638 T3 39 T5 49
valid_sources[0x4d] 309406 1 T1 1694 T3 33 T5 24
valid_sources[0x4e] 301201 1 T1 2157 T5 35 T18 65
valid_sources[0x4f] 315906 1 T1 1652 T5 47 T18 76
valid_sources[0x50] 310089 1 T1 1752 T5 44 T18 78
valid_sources[0x51] 299711 1 T1 1600 T5 25 T18 65
valid_sources[0x52] 304694 1 T1 1711 T5 32 T18 80
valid_sources[0x53] 656073 1 T1 2104 T5 23 T18 63
valid_sources[0x54] 635073 1 T1 1450 T3 35 T5 41
valid_sources[0x55] 312415 1 T1 1775 T5 40 T18 64
valid_sources[0x56] 316514 1 T1 1602 T5 50 T18 80
valid_sources[0x57] 736030 1 T1 1760 T5 54 T18 66
valid_sources[0x58] 305320 1 T1 1855 T3 1 T5 30
valid_sources[0x59] 312108 1 T1 1312 T3 8 T5 61
valid_sources[0x5a] 296137 1 T1 1804 T3 9 T5 39
valid_sources[0x5b] 312589 1 T1 1975 T5 30 T18 77
valid_sources[0x5c] 303500 1 T1 1734 T3 12 T5 40
valid_sources[0x5d] 307147 1 T1 1515 T3 7 T5 27
valid_sources[0x5e] 314977 1 T1 2114 T5 44 T18 48
valid_sources[0x5f] 306417 1 T1 1602 T5 40 T18 73
valid_sources[0x60] 316561 1 T1 1519 T3 16 T5 36
valid_sources[0x61] 300047 1 T1 1977 T3 79 T5 32
valid_sources[0x62] 1052170 1 T1 1891 T3 6 T5 35
valid_sources[0x63] 308440 1 T1 2037 T3 11 T5 34
valid_sources[0x64] 347854 1 T1 1558 T5 35 T18 59
valid_sources[0x65] 319415 1 T1 1941 T3 24 T5 25
valid_sources[0x66] 571722 1 T1 1691 T3 24 T5 56
valid_sources[0x67] 304141 1 T1 1768 T3 32 T5 35
valid_sources[0x68] 299524 1 T1 1764 T3 46 T5 35
valid_sources[0x69] 317862 1 T1 1984 T5 21 T18 75
valid_sources[0x6a] 313436 1 T1 1907 T3 9 T5 19
valid_sources[0x6b] 561447 1 T1 1704 T5 41 T18 70
valid_sources[0x6c] 586070 1 T1 2043 T3 29 T5 34
valid_sources[0x6d] 300835 1 T1 1767 T3 56 T5 47
valid_sources[0x6e] 872301 1 T1 1804 T3 11 T5 39
valid_sources[0x6f] 318984 1 T1 1802 T3 14 T5 56
valid_sources[0x70] 303411 1 T1 1928 T5 30 T18 82
valid_sources[0x71] 298391 1 T1 1717 T3 20 T5 48
valid_sources[0x72] 307806 1 T1 1714 T5 40 T18 73
valid_sources[0x73] 311334 1 T1 2264 T3 13 T5 51
valid_sources[0x74] 317166 1 T1 1672 T3 28 T5 43
valid_sources[0x75] 336388 1 T1 1876 T3 12 T5 59
valid_sources[0x76] 686235 1 T1 1634 T5 26 T18 59
valid_sources[0x77] 312771 1 T1 1702 T5 23 T18 65
valid_sources[0x78] 305808 1 T1 1714 T3 12 T5 44
valid_sources[0x79] 317303 1 T1 1723 T3 6 T5 50
valid_sources[0x7a] 304178 1 T1 1740 T3 30 T5 38
valid_sources[0x7b] 299734 1 T1 1767 T5 34 T18 91
valid_sources[0x7c] 299617 1 T1 1949 T5 35 T18 65
valid_sources[0x7d] 301590 1 T1 1707 T3 1 T5 30
valid_sources[0x7e] 305707 1 T1 2215 T5 29 T18 83
valid_sources[0x7f] 903329 1 T1 1548 T3 8 T5 47
valid_sources[0x80] 307487 1 T1 1488 T3 11 T5 49



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 7319233 1 T1 28339 T2 7040 T3 325
values[0x0] all_enables biggest_size 15572799 1 T1 74737 T2 18407 T3 608
values[0x1] all_enables biggest_size 9056786 1 T1 42009 T2 10236 T3 346

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%