Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 62121848 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 30074887 1 T1 3121 T2 1380 T3 1542



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 14068716 1 T1 2265 T2 1165 T3 643
values[0x0] 38172075 1 T1 3535 T2 1469 T3 2001
values[0x1] 39955944 1 T1 3658 T2 1470 T3 1979



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 53129833 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 39066902 1 T1 3937 T2 1735 T3 1969



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 275473 1 T1 39 T4 49 T5 5
valid_sources[0x01] 494698 1 T1 53 T4 181 T5 11
valid_sources[0x02] 273768 1 T1 30 T5 6 T6 1248
valid_sources[0x03] 272199 1 T1 42 T5 2 T6 1133
valid_sources[0x04] 278193 1 T1 19 T5 3 T6 1229
valid_sources[0x05] 282413 1 T1 50 T4 6 T5 6
valid_sources[0x06] 275899 1 T1 52 T4 8 T5 10
valid_sources[0x07] 517696 1 T1 41 T5 8 T6 1052
valid_sources[0x08] 269788 1 T1 48 T4 32 T5 4
valid_sources[0x09] 277053 1 T1 41 T5 5 T6 1256
valid_sources[0x0a] 665521 1 T1 38 T3 62 T5 6
valid_sources[0x0b] 271328 1 T1 30 T4 111 T5 1
valid_sources[0x0c] 286081 1 T1 35 T5 1 T6 1325
valid_sources[0x0d] 283957 1 T1 35 T5 2 T6 1156
valid_sources[0x0e] 280635 1 T1 33 T4 15 T5 4
valid_sources[0x0f] 803473 1 T1 34 T4 32 T5 3
valid_sources[0x10] 282639 1 T1 21 T3 39 T4 108
valid_sources[0x11] 280386 1 T1 26 T5 3 T6 1205
valid_sources[0x12] 272802 1 T1 36 T5 7 T6 1309
valid_sources[0x13] 265002 1 T1 58 T5 4 T6 1112
valid_sources[0x14] 710629 1 T1 35 T4 91 T5 2
valid_sources[0x15] 271671 1 T1 38 T3 29 T4 33
valid_sources[0x16] 280926 1 T1 33 T3 81 T4 7
valid_sources[0x17] 270434 1 T1 38 T5 3 T6 1336
valid_sources[0x18] 283580 1 T1 33 T5 9 T6 1268
valid_sources[0x19] 273922 1 T1 24 T4 147 T5 8
valid_sources[0x1a] 271647 1 T1 38 T3 61 T4 21
valid_sources[0x1b] 285726 1 T1 40 T5 4 T6 1446
valid_sources[0x1c] 269623 1 T1 35 T5 7 T6 1122
valid_sources[0x1d] 486425 1 T1 33 T5 4 T6 1337
valid_sources[0x1e] 558103 1 T1 28 T4 20 T5 10
valid_sources[0x1f] 294230 1 T1 45 T4 42 T5 1
valid_sources[0x20] 285015 1 T1 41 T3 40 T5 5
valid_sources[0x21] 295617 1 T1 46 T5 1 T6 1187
valid_sources[0x22] 281751 1 T1 37 T3 26 T4 49
valid_sources[0x23] 285844 1 T1 26 T3 52 T5 7
valid_sources[0x24] 319762 1 T1 35 T5 4 T6 1200
valid_sources[0x25] 550363 1 T1 37 T4 9 T5 2
valid_sources[0x26] 279740 1 T1 46 T4 79 T5 3
valid_sources[0x27] 278217 1 T1 41 T4 107 T5 4
valid_sources[0x28] 280501 1 T1 45 T3 10 T5 5
valid_sources[0x29] 286057 1 T1 35 T3 45 T4 2
valid_sources[0x2a] 540356 1 T1 32 T4 77 T5 2
valid_sources[0x2b] 281166 1 T1 38 T5 1 T6 1275
valid_sources[0x2c] 284595 1 T1 46 T4 46 T5 11
valid_sources[0x2d] 567695 1 T1 37 T5 6 T6 1277
valid_sources[0x2e] 280364 1 T1 32 T5 5 T6 1278
valid_sources[0x2f] 519090 1 T1 33 T4 30 T5 5
valid_sources[0x30] 272759 1 T1 21 T3 48 T4 4
valid_sources[0x31] 279259 1 T1 36 T5 2 T6 1414
valid_sources[0x32] 289869 1 T1 43 T3 11 T4 61
valid_sources[0x33] 284184 1 T1 37 T4 3 T5 4
valid_sources[0x34] 276991 1 T1 43 T3 51 T5 8
valid_sources[0x35] 1032060 1 T1 35 T4 8 T5 5
valid_sources[0x36] 295047 1 T1 48 T3 2 T4 2
valid_sources[0x37] 281634 1 T1 35 T3 47 T4 6
valid_sources[0x38] 272258 1 T1 33 T4 1 T6 1330
valid_sources[0x39] 279323 1 T1 32 T3 74 T5 4
valid_sources[0x3a] 277269 1 T1 30 T3 54 T4 52
valid_sources[0x3b] 289199 1 T1 47 T5 2 T6 1339
valid_sources[0x3c] 1073793 1 T1 46 T3 21 T5 5
valid_sources[0x3d] 274627 1 T1 40 T6 1199 T7 1088
valid_sources[0x3e] 275995 1 T1 37 T3 22 T5 7
valid_sources[0x3f] 292495 1 T1 50 T3 19 T4 5
valid_sources[0x40] 272573 1 T1 54 T3 99 T5 4
valid_sources[0x41] 279757 1 T1 30 T5 5 T6 1082
valid_sources[0x42] 290020 1 T1 38 T3 14 T5 2
valid_sources[0x43] 271760 1 T1 38 T3 136 T4 53
valid_sources[0x44] 278126 1 T1 44 T5 7 T6 1163
valid_sources[0x45] 284607 1 T1 40 T3 37 T4 117
valid_sources[0x46] 530835 1 T1 36 T3 19 T4 22
valid_sources[0x47] 276910 1 T1 43 T3 70 T6 1307
valid_sources[0x48] 616244 1 T1 36 T3 86 T4 26
valid_sources[0x49] 272930 1 T1 38 T4 40 T5 6
valid_sources[0x4a] 278354 1 T1 38 T4 7 T5 9
valid_sources[0x4b] 289156 1 T1 27 T3 92 T4 23
valid_sources[0x4c] 270324 1 T1 20 T5 9 T6 1285
valid_sources[0x4d] 283570 1 T1 46 T3 67 T5 6
valid_sources[0x4e] 271091 1 T1 33 T5 9 T6 1249
valid_sources[0x4f] 275535 1 T1 47 T3 17 T5 7
valid_sources[0x50] 308740 1 T1 28 T5 9 T6 1312
valid_sources[0x51] 292488 1 T1 45 T3 37 T4 143
valid_sources[0x52] 780970 1 T1 38 T4 4 T6 1347
valid_sources[0x53] 280721 1 T1 35 T3 15 T5 2
valid_sources[0x54] 347454 1 T1 43 T4 27 T5 9
valid_sources[0x55] 276021 1 T1 46 T4 20 T5 4
valid_sources[0x56] 282296 1 T1 43 T4 22 T5 9
valid_sources[0x57] 578112 1 T1 40 T4 50 T5 8
valid_sources[0x58] 272738 1 T1 25 T3 149 T4 128
valid_sources[0x59] 765426 1 T1 26 T3 55 T4 57
valid_sources[0x5a] 281991 1 T1 29 T3 87 T5 4
valid_sources[0x5b] 1233673 1 T1 40 T3 22 T5 2
valid_sources[0x5c] 282732 1 T1 27 T5 1 T6 1379
valid_sources[0x5d] 562044 1 T1 35 T3 220 T4 61
valid_sources[0x5e] 296396 1 T1 43 T3 20 T5 5
valid_sources[0x5f] 287058 1 T1 46 T5 9 T6 1444
valid_sources[0x60] 999127 1 T1 34 T4 19 T5 4
valid_sources[0x61] 281926 1 T1 39 T4 35 T5 5
valid_sources[0x62] 276706 1 T1 39 T5 1 T6 1178
valid_sources[0x63] 274378 1 T1 42 T3 76 T4 48
valid_sources[0x64] 288387 1 T1 37 T3 20 T4 48
valid_sources[0x65] 283817 1 T1 39 T5 3 T6 1263
valid_sources[0x66] 275047 1 T1 35 T5 4 T6 1218
valid_sources[0x67] 1026773 1 T1 43 T4 79 T5 7
valid_sources[0x68] 276757 1 T1 39 T4 273 T5 9
valid_sources[0x69] 1047857 1 T1 49 T5 2 T6 1212
valid_sources[0x6a] 281869 1 T1 42 T5 5 T6 1239
valid_sources[0x6b] 284241 1 T1 24 T4 31 T5 5
valid_sources[0x6c] 276109 1 T1 40 T5 10 T6 1372
valid_sources[0x6d] 281891 1 T1 27 T5 3 T6 1326
valid_sources[0x6e] 281022 1 T1 33 T5 12 T6 1235
valid_sources[0x6f] 279522 1 T1 46 T4 27 T5 5
valid_sources[0x70] 275566 1 T1 43 T4 10 T5 3
valid_sources[0x71] 687264 1 T1 46 T4 4 T5 2
valid_sources[0x72] 276085 1 T1 38 T3 3 T5 9
valid_sources[0x73] 783213 1 T1 39 T3 35 T5 6
valid_sources[0x74] 273981 1 T1 38 T3 2 T5 2
valid_sources[0x75] 320589 1 T1 39 T3 86 T4 20
valid_sources[0x76] 282564 1 T1 46 T3 105 T4 32
valid_sources[0x77] 265260 1 T1 52 T5 3 T6 1228
valid_sources[0x78] 270861 1 T1 33 T3 2 T4 3
valid_sources[0x79] 272096 1 T1 28 T3 9 T5 5
valid_sources[0x7a] 296986 1 T1 39 T5 2 T6 1236
valid_sources[0x7b] 603473 1 T1 37 T5 5 T6 1159
valid_sources[0x7c] 292900 1 T1 29 T5 7 T6 1306
valid_sources[0x7d] 696372 1 T1 38 T5 3 T6 1364
valid_sources[0x7e] 275307 1 T1 29 T5 2 T6 1289
valid_sources[0x7f] 280795 1 T1 31 T3 78 T5 4
valid_sources[0x80] 280804 1 T1 40 T5 5 T6 1227



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 6972894 1 T1 1099 T2 555 T3 311
values[0x0] all_enables biggest_size 14588857 1 T1 1271 T2 533 T3 769
values[0x1] all_enables biggest_size 8513136 1 T1 751 T2 292 T3 462

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%