Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	59193948	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

28629422

1

T1

1082

T2

2505

T3

130732

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	13342314	1			T1	491		T2	3012		T3	50936
values[0x0]	36437226	1			T1	1321		T2	1670		T3	180058
values[0x1]	38043830	1			T1	1257		T2	1712		T3	179630

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50696502	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

37126868

1

T1

1314

T2

3107

T3

165009

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	293472	1			T1	8		T2	13		T3	1572
valid_sources[0x01]	295634	1			T1	11		T2	7		T3	1596
valid_sources[0x02]	309213	1			T1	4		T2	26		T3	1676
valid_sources[0x03]	291573	1			T1	12		T2	46		T3	1641
valid_sources[0x04]	284943	1			T1	9		T2	33		T3	1495
valid_sources[0x05]	283314	1			T1	8		T2	20		T3	1665
valid_sources[0x06]	289381	1			T1	12		T2	27		T3	1645
valid_sources[0x07]	583805	1			T1	11		T2	40		T3	1501
valid_sources[0x08]	289285	1			T1	11		T2	30		T3	1567
valid_sources[0x09]	283272	1			T1	9		T2	17		T3	1546
valid_sources[0x0a]	671939	1			T1	8		T2	19		T3	1600
valid_sources[0x0b]	287492	1			T1	11		T2	24		T3	1567
valid_sources[0x0c]	292381	1			T1	12		T2	41		T3	1611
valid_sources[0x0d]	290952	1			T1	17		T2	8		T3	1533
valid_sources[0x0e]	288201	1			T1	14		T2	52		T3	1658
valid_sources[0x0f]	285658	1			T1	11		T2	15		T3	1636
valid_sources[0x10]	296733	1			T1	10		T2	33		T3	1652
valid_sources[0x11]	301466	1			T1	11		T2	42		T3	1626
valid_sources[0x12]	280726	1			T1	13		T2	11		T3	1657
valid_sources[0x13]	291329	1			T1	7		T2	36		T3	1528
valid_sources[0x14]	290873	1			T1	12		T2	17		T3	1616
valid_sources[0x15]	291777	1			T1	10		T2	12		T3	1489
valid_sources[0x16]	285793	1			T1	15		T2	20		T3	1678
valid_sources[0x17]	750333	1			T1	15		T2	10		T3	1628
valid_sources[0x18]	283339	1			T1	12		T2	51		T3	1627
valid_sources[0x19]	290282	1			T1	8		T2	20		T3	1563
valid_sources[0x1a]	284828	1			T1	11		T2	30		T3	1690
valid_sources[0x1b]	1065895	1			T1	14		T2	15		T3	1611
valid_sources[0x1c]	289387	1			T1	11		T2	5		T3	1779
valid_sources[0x1d]	343870	1			T1	9		T2	25		T3	1671
valid_sources[0x1e]	290995	1			T1	17		T2	26		T3	1509
valid_sources[0x1f]	289620	1			T1	13		T2	6		T3	1568
valid_sources[0x20]	294460	1			T1	9		T2	16		T3	1679
valid_sources[0x21]	645745	1			T1	12		T2	13		T3	1553
valid_sources[0x22]	290801	1			T1	17		T2	38		T3	1628
valid_sources[0x23]	287963	1			T1	11		T2	21		T3	1640
valid_sources[0x24]	304386	1			T1	12		T2	28		T3	1627
valid_sources[0x25]	290353	1			T1	17		T2	32		T3	1590
valid_sources[0x26]	296995	1			T1	16		T2	24		T3	1616
valid_sources[0x27]	283558	1			T1	16		T2	32		T3	1515
valid_sources[0x28]	292902	1			T1	11		T2	40		T3	1565
valid_sources[0x29]	297565	1			T1	15		T2	47		T3	1630
valid_sources[0x2a]	556502	1			T1	11		T2	45		T3	1656
valid_sources[0x2b]	289171	1			T1	12		T2	23		T3	1456
valid_sources[0x2c]	285223	1			T1	15		T2	28		T3	1664
valid_sources[0x2d]	289965	1			T1	12		T2	18		T3	1574
valid_sources[0x2e]	291144	1			T1	6		T2	18		T3	1554
valid_sources[0x2f]	282876	1			T1	16		T2	30		T3	1675
valid_sources[0x30]	288872	1			T1	23		T2	28		T3	1620
valid_sources[0x31]	300283	1			T1	12		T2	23		T3	1628
valid_sources[0x32]	287875	1			T1	13		T2	15		T3	1683
valid_sources[0x33]	283172	1			T1	18		T2	18		T3	1486
valid_sources[0x34]	293456	1			T1	9		T2	13		T3	1628
valid_sources[0x35]	330674	1			T1	12		T2	13		T3	1670
valid_sources[0x36]	569849	1			T1	18		T2	11		T3	1587
valid_sources[0x37]	286815	1			T1	10		T2	17		T3	1559
valid_sources[0x38]	287343	1			T1	11		T2	35		T3	1613
valid_sources[0x39]	980717	1			T1	9		T2	24		T3	1572
valid_sources[0x3a]	285085	1			T1	14		T2	10		T3	1605
valid_sources[0x3b]	282330	1			T1	16		T2	21		T3	1609
valid_sources[0x3c]	690863	1			T1	9		T2	27		T3	1613
valid_sources[0x3d]	294350	1			T1	10		T2	26		T3	1601
valid_sources[0x3e]	288256	1			T1	16		T2	28		T3	1535
valid_sources[0x3f]	296715	1			T1	15		T2	23		T3	1599
valid_sources[0x40]	304207	1			T1	14		T2	5		T3	1687
valid_sources[0x41]	292304	1			T1	8		T2	40		T3	1553
valid_sources[0x42]	328862	1			T1	14		T2	4		T3	1654
valid_sources[0x43]	297131	1			T1	13		T2	8		T3	1589
valid_sources[0x44]	287049	1			T1	16		T2	13		T3	1653
valid_sources[0x45]	283217	1			T1	10		T2	1		T3	1640
valid_sources[0x46]	289708	1			T1	12		T2	30		T3	1522
valid_sources[0x47]	498396	1			T1	14		T2	37		T3	1652
valid_sources[0x48]	285476	1			T1	9		T2	27		T3	1644
valid_sources[0x49]	286521	1			T1	12		T2	50		T3	1626
valid_sources[0x4a]	301391	1			T1	9		T2	30		T3	1479
valid_sources[0x4b]	724213	1			T1	12		T2	50		T3	1570
valid_sources[0x4c]	289941	1			T1	14		T2	14		T3	1579
valid_sources[0x4d]	289163	1			T1	9		T2	4		T3	1702
valid_sources[0x4e]	287382	1			T1	13		T2	48		T3	1544
valid_sources[0x4f]	286404	1			T1	5		T2	13		T3	1661
valid_sources[0x50]	284783	1			T1	10		T2	23		T3	1529
valid_sources[0x51]	280306	1			T1	18		T2	47		T3	1581
valid_sources[0x52]	292612	1			T1	8		T2	43		T3	1604
valid_sources[0x53]	297945	1			T1	15		T2	25		T3	1729
valid_sources[0x54]	284481	1			T1	7		T2	27		T3	1634
valid_sources[0x55]	296218	1			T1	11		T2	30		T3	1632
valid_sources[0x56]	292029	1			T1	12		T2	18		T3	1542
valid_sources[0x57]	288253	1			T1	10		T2	44		T3	1601
valid_sources[0x58]	296016	1			T1	8		T2	36		T3	1682
valid_sources[0x59]	571415	1			T1	10		T2	41		T3	1580
valid_sources[0x5a]	702090	1			T1	13		T2	17		T3	1595
valid_sources[0x5b]	287997	1			T1	15		T2	25		T3	1568
valid_sources[0x5c]	290428	1			T1	11		T2	39		T3	1604
valid_sources[0x5d]	285675	1			T1	12		T2	56		T3	1569
valid_sources[0x5e]	791806	1			T1	8		T2	14		T3	1594
valid_sources[0x5f]	566760	1			T1	19		T2	31		T3	1658
valid_sources[0x60]	285936	1			T1	9		T2	14		T3	1483
valid_sources[0x61]	289799	1			T1	11		T2	32		T3	1614
valid_sources[0x62]	291238	1			T1	22		T2	13		T3	1483
valid_sources[0x63]	291075	1			T1	13		T2	49		T3	1748
valid_sources[0x64]	284810	1			T1	10		T2	21		T3	1617
valid_sources[0x65]	280280	1			T1	14		T2	41		T3	1611
valid_sources[0x66]	299175	1			T1	15		T2	32		T3	1687
valid_sources[0x67]	280994	1			T1	17		T2	9		T3	1510
valid_sources[0x68]	280567	1			T1	19		T2	23		T3	1570
valid_sources[0x69]	499759	1			T1	7		T2	24		T3	1584
valid_sources[0x6a]	319947	1			T1	8		T2	28		T3	1700
valid_sources[0x6b]	288573	1			T1	11		T2	14		T3	1676
valid_sources[0x6c]	287383	1			T1	14		T2	15		T3	1571
valid_sources[0x6d]	527586	1			T1	13		T2	9		T3	1720
valid_sources[0x6e]	282976	1			T1	18		T2	25		T3	1509
valid_sources[0x6f]	295872	1			T1	22		T2	6		T3	1664
valid_sources[0x70]	288331	1			T1	15		T2	31		T3	1600
valid_sources[0x71]	290424	1			T1	7		T2	19		T3	1582
valid_sources[0x72]	287201	1			T1	15		T2	45		T3	1499
valid_sources[0x73]	291227	1			T1	13		T2	16		T3	1609
valid_sources[0x74]	293940	1			T1	16		T2	46		T3	1699
valid_sources[0x75]	290056	1			T1	12		T2	22		T3	1579
valid_sources[0x76]	292178	1			T1	15		T2	17		T3	1527
valid_sources[0x77]	306019	1			T1	21		T2	29		T3	1553
valid_sources[0x78]	287778	1			T1	13		T2	42		T3	1536
valid_sources[0x79]	292597	1			T1	11		T2	5		T3	1702
valid_sources[0x7a]	290379	1			T1	5		T2	46		T3	1654
valid_sources[0x7b]	305476	1			T1	12		T2	7		T3	1528
valid_sources[0x7c]	298876	1			T1	7		T2	17		T3	1598
valid_sources[0x7d]	281082	1			T1	13		T2	56		T3	1675
valid_sources[0x7e]	285129	1			T1	15		T2	24		T3	1567
valid_sources[0x7f]	301553	1			T1	15		T2	28		T3	1641
valid_sources[0x80]	291345	1			T1	13		T2	21		T3	1566

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6622329

1

T1

272

T2

1504

T3

25643

values[0x0]

all_enables

biggest_size

13909533

1

T1

540

T2

632

T3

67356

values[0x1]

all_enables

biggest_size

8097560

1

T1

270

T2

369

T3

37733