Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67588437	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33012146

1

T1

43821

T2

74253

T3

1699

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	15198172	1			T1	16914		T2	28808		T3	682
values[0x0]	41355282	1			T1	62450		T2	102875		T3	2354
values[0x1]	44047129	1			T1	62190		T2	102571		T3	2336

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57350710	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

43249873

1

T1

55573

T2

93777

T3

2154

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	341853	1			T1	580		T2	979		T3	27
valid_sources[0x01]	331420	1			T1	583		T2	949		T3	16
valid_sources[0x02]	350415	1			T1	517		T2	975		T3	18
valid_sources[0x03]	330066	1			T1	555		T2	864		T3	19
valid_sources[0x04]	331108	1			T1	580		T2	863		T3	23
valid_sources[0x05]	328525	1			T1	488		T2	885		T3	25
valid_sources[0x06]	551765	1			T1	543		T2	864		T3	32
valid_sources[0x07]	332391	1			T1	605		T2	918		T3	16
valid_sources[0x08]	329986	1			T1	521		T2	943		T3	19
valid_sources[0x09]	332550	1			T1	543		T2	955		T3	11
valid_sources[0x0a]	711086	1			T1	581		T2	893		T3	26
valid_sources[0x0b]	336942	1			T1	581		T2	978		T3	18
valid_sources[0x0c]	346220	1			T1	540		T2	828		T3	12
valid_sources[0x0d]	693454	1			T1	571		T2	981		T3	19
valid_sources[0x0e]	358971	1			T1	526		T2	992		T3	22
valid_sources[0x0f]	326601	1			T1	563		T2	926		T3	20
valid_sources[0x10]	334050	1			T1	545		T2	905		T3	22
valid_sources[0x11]	662285	1			T1	404		T2	1033		T3	24
valid_sources[0x12]	336005	1			T1	486		T2	920		T3	13
valid_sources[0x13]	335218	1			T1	564		T2	861		T3	25
valid_sources[0x14]	330094	1			T1	564		T2	1029		T3	25
valid_sources[0x15]	333499	1			T1	458		T2	875		T3	30
valid_sources[0x16]	332038	1			T1	527		T2	902		T3	13
valid_sources[0x17]	331884	1			T1	512		T2	987		T3	23
valid_sources[0x18]	729941	1			T1	536		T2	903		T3	16
valid_sources[0x19]	335090	1			T1	525		T2	873		T3	22
valid_sources[0x1a]	326734	1			T1	535		T2	943		T3	14
valid_sources[0x1b]	327592	1			T1	536		T2	1130		T3	24
valid_sources[0x1c]	582945	1			T1	639		T2	901		T3	23
valid_sources[0x1d]	349454	1			T1	508		T2	921		T3	12
valid_sources[0x1e]	325079	1			T1	561		T2	862		T3	16
valid_sources[0x1f]	327477	1			T1	560		T2	915		T3	17
valid_sources[0x20]	337079	1			T1	466		T2	947		T3	21
valid_sources[0x21]	331087	1			T1	588		T2	801		T3	14
valid_sources[0x22]	328409	1			T1	518		T2	934		T3	29
valid_sources[0x23]	331397	1			T1	620		T2	918		T3	22
valid_sources[0x24]	328093	1			T1	567		T2	975		T3	23
valid_sources[0x25]	417183	1			T1	536		T2	970		T3	25
valid_sources[0x26]	329260	1			T1	545		T2	910		T3	13
valid_sources[0x27]	344352	1			T1	543		T2	1022		T3	26
valid_sources[0x28]	326130	1			T1	489		T2	938		T3	23
valid_sources[0x29]	334572	1			T1	471		T2	883		T3	17
valid_sources[0x2a]	581543	1			T1	644		T2	960		T3	27
valid_sources[0x2b]	332992	1			T1	572		T2	967		T3	12
valid_sources[0x2c]	810270	1			T1	560		T2	932		T3	19
valid_sources[0x2d]	331555	1			T1	534		T2	857		T3	19
valid_sources[0x2e]	330374	1			T1	525		T2	883		T3	21
valid_sources[0x2f]	330468	1			T1	617		T2	915		T3	26
valid_sources[0x30]	327105	1			T1	563		T2	903		T3	24
valid_sources[0x31]	714430	1			T1	615		T2	1019		T3	21
valid_sources[0x32]	333172	1			T1	547		T2	937		T3	19
valid_sources[0x33]	331857	1			T1	580		T2	951		T3	29
valid_sources[0x34]	331131	1			T1	695		T2	921		T3	28
valid_sources[0x35]	329847	1			T1	561		T2	929		T3	26
valid_sources[0x36]	334551	1			T1	591		T2	882		T3	20
valid_sources[0x37]	333386	1			T1	446		T2	900		T3	37
valid_sources[0x38]	652276	1			T1	574		T2	867		T3	16
valid_sources[0x39]	327421	1			T1	486		T2	937		T3	26
valid_sources[0x3a]	328366	1			T1	543		T2	920		T3	23
valid_sources[0x3b]	325749	1			T1	484		T2	910		T3	17
valid_sources[0x3c]	819109	1			T1	603		T2	907		T3	16
valid_sources[0x3d]	333158	1			T1	609		T2	831		T3	26
valid_sources[0x3e]	802569	1			T1	595		T2	985		T3	24
valid_sources[0x3f]	333552	1			T1	549		T2	912		T3	17
valid_sources[0x40]	333472	1			T1	608		T2	796		T3	19
valid_sources[0x41]	330660	1			T1	467		T2	883		T3	37
valid_sources[0x42]	360806	1			T1	510		T2	872		T3	18
valid_sources[0x43]	337606	1			T1	483		T2	974		T3	20
valid_sources[0x44]	338300	1			T1	624		T2	863		T3	31
valid_sources[0x45]	337892	1			T1	606		T2	928		T3	13
valid_sources[0x46]	330162	1			T1	540		T2	847		T3	16
valid_sources[0x47]	325944	1			T1	551		T2	887		T3	16
valid_sources[0x48]	332923	1			T1	531		T2	972		T3	14
valid_sources[0x49]	360629	1			T1	606		T2	824		T3	23
valid_sources[0x4a]	339080	1			T1	551		T2	922		T3	23
valid_sources[0x4b]	331682	1			T1	597		T2	825		T3	14
valid_sources[0x4c]	324736	1			T1	581		T2	872		T3	24
valid_sources[0x4d]	335898	1			T1	452		T2	1018		T3	22
valid_sources[0x4e]	808297	1			T1	693		T2	945		T3	22
valid_sources[0x4f]	591608	1			T1	502		T2	863		T3	33
valid_sources[0x50]	344854	1			T1	442		T2	1010		T3	19
valid_sources[0x51]	326834	1			T1	523		T2	985		T3	24
valid_sources[0x52]	334126	1			T1	558		T2	833		T3	28
valid_sources[0x53]	566735	1			T1	597		T2	929		T3	23
valid_sources[0x54]	594807	1			T1	471		T2	852		T3	11
valid_sources[0x55]	329474	1			T1	635		T2	957		T3	25
valid_sources[0x56]	330222	1			T1	571		T2	824		T3	23
valid_sources[0x57]	335484	1			T1	473		T2	889		T3	20
valid_sources[0x58]	343226	1			T1	579		T2	946		T3	17
valid_sources[0x59]	336029	1			T1	593		T2	805		T3	14
valid_sources[0x5a]	550819	1			T1	505		T2	868		T3	18
valid_sources[0x5b]	325441	1			T1	627		T2	879		T3	17
valid_sources[0x5c]	326553	1			T1	564		T2	826		T3	16
valid_sources[0x5d]	340312	1			T1	672		T2	980		T3	12
valid_sources[0x5e]	332558	1			T1	606		T2	945		T3	28
valid_sources[0x5f]	324377	1			T1	484		T2	872		T3	14
valid_sources[0x60]	329429	1			T1	521		T2	928		T3	15
valid_sources[0x61]	335756	1			T1	471		T2	1047		T3	17
valid_sources[0x62]	329110	1			T1	659		T2	987		T3	18
valid_sources[0x63]	334115	1			T1	479		T2	956		T3	23
valid_sources[0x64]	335691	1			T1	506		T2	861		T3	22
valid_sources[0x65]	348996	1			T1	623		T2	943		T3	29
valid_sources[0x66]	336924	1			T1	581		T2	857		T3	29
valid_sources[0x67]	329613	1			T1	613		T2	879		T3	16
valid_sources[0x68]	337768	1			T1	535		T2	898		T3	18
valid_sources[0x69]	765168	1			T1	490		T2	934		T3	25
valid_sources[0x6a]	330364	1			T1	506		T2	970		T3	23
valid_sources[0x6b]	346958	1			T1	671		T2	828		T3	36
valid_sources[0x6c]	343569	1			T1	521		T2	933		T3	19
valid_sources[0x6d]	332942	1			T1	575		T2	1006		T3	16
valid_sources[0x6e]	328258	1			T1	628		T2	1017		T3	28
valid_sources[0x6f]	327918	1			T1	623		T2	855		T3	15
valid_sources[0x70]	800764	1			T1	453		T2	856		T3	19
valid_sources[0x71]	326864	1			T1	508		T2	828		T3	16
valid_sources[0x72]	630559	1			T1	500		T2	995		T3	17
valid_sources[0x73]	324291	1			T1	492		T2	864		T3	14
valid_sources[0x74]	576545	1			T1	523		T2	880		T3	18
valid_sources[0x75]	334361	1			T1	508		T2	887		T3	17
valid_sources[0x76]	346248	1			T1	586		T2	1068		T3	21
valid_sources[0x77]	327241	1			T1	574		T2	885		T3	24
valid_sources[0x78]	329204	1			T1	578		T2	948		T3	24
valid_sources[0x79]	335514	1			T1	560		T2	918		T3	19
valid_sources[0x7a]	327085	1			T1	525		T2	853		T3	24
valid_sources[0x7b]	332287	1			T1	551		T2	789		T3	14
valid_sources[0x7c]	718908	1			T1	568		T2	878		T3	28
valid_sources[0x7d]	333565	1			T1	533		T2	956		T3	17
valid_sources[0x7e]	337150	1			T1	552		T2	883		T3	30
valid_sources[0x7f]	334683	1			T1	562		T2	929		T3	13
valid_sources[0x80]	329757	1			T1	488		T2	890		T3	26

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7613713

1

T1

8391

T2

14462

T3

360

values[0x0]

all_enables

biggest_size

15973005

1

T1

22724

T2

38174

T3

864

values[0x1]

all_enables

biggest_size

9425428

1

T1

12706

T2

21617

T3

475