Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
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Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

218 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_13.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_14.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_15.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_16.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_17.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_18.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_19.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_2.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_20.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_21.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_22.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_23.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_24.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_25.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_26.en_a 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_3.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_30.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_31.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_32.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_33.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_34.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_35.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_36.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_37.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_38.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_39.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_4.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_40.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_41.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_42.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_43.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_44.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_45.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_46.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_47.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_48.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_accum_thresh_shadowed.classb_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase0_cyc_shadowed.classd_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase1_cyc_shadowed.classd_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase2_cyc_shadowed.classd_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase3_cyc_shadowed.classd_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_timeout_cyc_shadowed.classd_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_0.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_1.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_2.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_3.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_4.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_5.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_6.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_0.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_1.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_2.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_3.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_4.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_5.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_6.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timeout_cyc_shadowed.ping_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timer_en_shadowed.ping_timer_en_shadowed 100.00 1 100 1 64 64




Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 365 1 T167 1 T198 64 T149 2
auto[1] 380 1 T167 1 T114 2 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 380 1 T167 2 T198 64 T115 5
auto[1] 456 1 T113 1 T114 3 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 260 1 T167 1 T198 128 T149 2
auto[1] 548 1 T167 1 T169 1 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 317 1 T167 1 T198 128 T149 4
auto[1] 365 1 T113 5 T169 1 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 325 1 T167 1 T198 64 T115 7
auto[1] 410 1 T167 1 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 529 1 T167 1 T198 64 T225 1
auto[1] 432 1 T113 6 T167 1 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 461 1 T198 128 T149 3 T226 2
auto[1] 485 1 T167 2 T116 5 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 470 1 T198 64 T149 2 T226 1
auto[1] 503 1 T167 2 T114 6 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 332 1 T198 64 T149 1 T340 1
auto[1] 409 1 T113 6 T167 2 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 327 1 T167 2 T198 64 T149 4
auto[1] 1173 1 T113 3 T198 64 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 396 1 T198 64 T117 3 T149 2
auto[1] 635 1 T167 2 T168 37 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 318 1 T198 64 T149 2 T341 1
auto[1] 523 1 T167 2 T198 64 T127 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 564 1 T198 64 T149 2 T226 2
auto[1] 681 1 T167 2 T114 5 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 783 1 T198 128 T225 1 T341 1
auto[1] 262 1 T167 2 T114 3 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 422 1 T167 1 T198 128 T225 1
auto[1] 367 1 T113 3 T167 1 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 355 1 T167 1 T198 64 T149 1
auto[1] 411 1 T167 1 T114 6 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 390 1 T198 128 T115 4 T225 1
auto[1] 799 1 T113 6 T167 2 T114 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 262 1 T198 64 T149 1 T226 1
auto[1] 553 1 T167 2 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 402 1 T198 64 T149 2 T340 1
auto[1] 608 1 T167 2 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 512 1 T198 128 T115 2 T149 2
auto[1] 628 1 T167 2 T114 11 T115 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 531 1 T167 2 T198 64 T149 1
auto[1] 488 1 T113 6 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 625 1 T167 2 T198 64 T149 3
auto[1] 727 1 T114 2 T198 64 T116 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 680 1 T167 1 T169 1 T198 128
auto[1] 305 1 T167 1 T149 8 T226 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 378 1 T167 2 T198 128 T149 4
auto[1] 728 1 T114 8 T169 1 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 504 1 T198 64 T117 3 T149 2
auto[1] 307 1 T167 2 T114 8 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 461 1 T167 1 T198 128 T117 5
auto[1] 272 1 T113 3 T114 9 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 404 1 T167 1 T169 1 T198 64
auto[1] 486 1 T167 1 T168 107 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 273 1 T167 2 T198 128 T149 1
auto[1] 449 1 T114 2 T149 4 T226 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 351 1 T167 1 T198 128 T225 1
auto[1] 658 1 T113 5 T167 1 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 272 1 T198 64 T149 1 T342 1
auto[1] 763 1 T113 9 T167 2 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 573 1 T198 64 T226 2 T185 2
auto[1] 926 1 T167 2 T114 6 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 403 1 T167 1 T169 1 T198 128
auto[1] 298 1 T167 1 T114 4 T117 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 403 1 T167 1 T198 128 T149 4
auto[1] 519 1 T114 8 T127 5 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 355 1 T198 64 T115 2 T117 9
auto[1] 426 1 T167 2 T114 5 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 329 1 T198 64 T225 1 T149 1
auto[1] 882 1 T167 2 T168 14 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 405 1 T198 64 T115 4 T149 1
auto[1] 332 1 T167 1 T114 5 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 558 1 T198 64 T117 3 T341 1
auto[1] 452 1 T113 6 T167 2 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 473 1 T167 1 T198 128 T149 1
auto[1] 573 1 T113 6 T167 1 T114 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 344 1 T167 2 T198 64 T149 3
auto[1] 381 1 T113 6 T114 10 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 415 1 T167 2 T198 64 T115 3
auto[1] 689 1 T114 6 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 713 1 T198 64 T342 1 T341 1
auto[1] 580 1 T113 6 T167 2 T114 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 339 1 T167 1 T169 1 T198 64
auto[1] 435 1 T167 1 T168 43 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 565 1 T167 1 T198 128 T149 2
auto[1] 411 1 T167 1 T225 1 T149 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 421 1 T167 2 T198 128 T149 2
auto[1] 784 1 T113 5 T114 7 T115 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 388 1 T198 128 T115 4 T149 4
auto[1] 333 1 T113 6 T115 2 T127 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 525 1 T198 128 T115 1 T340 1
auto[1] 950 1 T113 4 T167 2 T115 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 615 1 T167 1 T198 128 T117 2
auto[1] 575 1 T167 1 T168 208 T169 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 320 1 T167 1 T198 64 T149 2
auto[1] 791 1 T114 2 T198 64 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 466 1 T198 128 T117 4 T149 3
auto[1] 504 1 T113 6 T167 2 T114 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 391 1 T167 2 T198 128 T115 2
auto[1] 784 1 T113 6 T168 271 T114 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 461 1 T167 2 T169 1 T198 128
auto[1] 497 1 T168 18 T114 6 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 488 1 T167 2 T198 64 T149 2
auto[1] 564 1 T114 7 T198 64 T127 9


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 265 1 T198 64 T149 2 T226 2
auto[1] 439 1 T167 2 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 512 1 T167 2 T169 1 T198 128
auto[1] 255 1 T168 69 T225 1 T149 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 343 1 T198 64 T117 6 T149 1
auto[1] 782 1 T113 4 T167 2 T114 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 419 1 T168 12 T198 128 T225 1
auto[1] 323 1 T113 5 T167 1 T149 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 634 1 T167 1 T198 128 T115 1
auto[1] 319 1 T113 4 T167 1 T114 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 216 1 T198 64 T115 1 T225 1
auto[1] 670 1 T167 2 T168 166 T114 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 332 1 T198 128 T117 6 T149 3
auto[1] 893 1 T167 2 T114 5 T117 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 600 1 T169 1 T198 128 T149 1
auto[1] 570 1 T167 2 T114 2 T127 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 379 1 T167 1 T198 64 T117 3
auto[1] 483 1 T169 1 T198 64 T225 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 728 1 T167 1 T198 128 T225 1
auto[1] 346 1 T167 1 T169 1 T127 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 382 1 T198 128 T115 2 T149 4
auto[1] 814 1 T167 2 T114 6 T115 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 356 1 T167 1 T168 27 T198 64
auto[1] 366 1 T167 1 T169 1 T198 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 251 1 T167 2 T198 64 T149 3
auto[1] 726 1 T169 1 T198 64 T127 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 29 1 T115 3 T117 2 T122 2
auto[1] 53 1 T115 4 T117 4 T122 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 14 1 T115 4 T126 4 T130 3
auto[1] 45 1 T115 2 T118 7 T119 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 35 1 T117 1 T122 6 T132 4
auto[1] 59 1 T114 5 T127 5 T117 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 25 1 T135 5 T126 4 T128 4
auto[1] 30 1 T114 8 T118 4 T125 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 10 1 T135 1 T126 2 T137 2
auto[1] 58 1 T118 4 T135 2 T119 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%