Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 99.31 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

48 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if 83.33 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if 83.33 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if 100.00 1 100 1 64 64
mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if 100.00 1 100 1 64 64




Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 1 5 83.33 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[15].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 1 5 83.33 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_cg_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[0].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[10].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[11].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[12].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[13].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[14].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[16].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[17].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[18].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[19].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[1].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[20].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[21].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[22].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[23].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[2].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[3].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[4].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[5].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[6].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[7].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[8].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0



Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.u_lpg_rst_en_cov_if.gen_mubi_cov_if[9].mubi_cov_if
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_value 6 0 6 100.00 100 1 1 0


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 35 1 T15 1 T16 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 16 1 T15 1 T16 1 T292 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 27 1 T16 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 29 1 T10 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 27 1 T15 1 T16 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 21 1 T10 1 T16 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 15 1 T292 1 T92 1 T306 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 34 1 T10 1 T15 1 T16 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 22 1 T15 1 T16 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 36 1 T10 1 T15 1 T32 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 16 1 T293 1 T292 1 T289 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 21 1 T15 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 19 1 T10 1 T16 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 22 1 T10 1 T15 1 T293 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 22 1 T62 1 T294 1 T32 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 21 1 T15 1 T16 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 19 1 T293 1 T292 1 T92 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 14 1 T294 1 T293 1 T292 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 15 1 T10 1 T32 1 T289 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 31 1 T10 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 19 1 T10 1 T15 1 T16 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 19 1 T15 1 T291 1 T92 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 14 1 T15 1 T291 1 T218 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 29 1 T15 1 T294 1 T293 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 15 1 T15 1 T16 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 36 1 T10 1 T15 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 33 1 T10 1 T15 1 T62 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 25 1 T15 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 15 1 T16 1 T62 1 T291 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 19 1 T10 1 T32 1 T292 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 31 1 T62 1 T294 1 T293 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 16 1 T16 1 T92 1 T312 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 32 1 T16 1 T62 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 16 1 T10 1 T16 1 T92 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 23 1 T10 1 T15 1 T16 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 17 1 T62 1 T293 1 T292 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 21 1 T15 1 T16 1 T291 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 25 1 T10 1 T15 1 T16 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 14 1 T15 1 T294 1 T32 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 16 1 T15 1 T293 1 T292 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 11 1 T291 1 T92 1 T317 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 12 1 T32 1 T289 1 T92 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 32 1 T15 1 T16 1 T294 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 13 1 T15 1 T16 1 T293 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 18 1 T15 1 T289 1 T290 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 1905 1 T5 32 T22 2 T23 1
others[1] 1919 1 T19 1 T5 33 T20 1
others[2] 1850 1 T1 1 T3 1 T5 38
others[3] 3318 1 T2 1 T17 1 T18 1
false 6870 1 T4 1 T5 128 T6 1
true 17 1 T15 1 T16 1 T312 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%