Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64067299	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31002499

1

T1

3377

T2

2697

T3

2069

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14298840	1			T1	2471		T2	1246		T3	788
values[0x0]	39423004	1			T1	3809		T2	3553		T3	2795
values[0x1]	41347954	1			T1	3767		T2	3625		T3	2845

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54761319	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

40308479

1

T1

4199

T2

3404

T3

2591

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	301664	1			T1	44		T2	53		T3	24
valid_sources[0x01]	284191	1			T1	34		T2	38		T3	28
valid_sources[0x02]	295876	1			T1	32		T2	28		T3	28
valid_sources[0x03]	291396	1			T1	46		T2	19		T3	25
valid_sources[0x04]	287921	1			T1	42		T2	33		T3	20
valid_sources[0x05]	292601	1			T1	38		T2	29		T3	24
valid_sources[0x06]	733085	1			T1	33		T2	25		T3	26
valid_sources[0x07]	286131	1			T1	36		T2	34		T3	20
valid_sources[0x08]	762517	1			T1	44		T2	30		T3	19
valid_sources[0x09]	563024	1			T1	44		T2	34		T3	16
valid_sources[0x0a]	291212	1			T1	36		T2	22		T3	36
valid_sources[0x0b]	298554	1			T1	31		T2	36		T3	19
valid_sources[0x0c]	289268	1			T1	36		T2	29		T3	25
valid_sources[0x0d]	297673	1			T1	40		T2	47		T3	38
valid_sources[0x0e]	293341	1			T1	38		T2	49		T3	36
valid_sources[0x0f]	309242	1			T1	42		T2	26		T3	29
valid_sources[0x10]	500144	1			T1	52		T2	33		T3	26
valid_sources[0x11]	289803	1			T1	50		T2	27		T3	26
valid_sources[0x12]	759335	1			T1	40		T2	27		T3	28
valid_sources[0x13]	292097	1			T1	32		T2	39		T3	29
valid_sources[0x14]	296084	1			T1	33		T2	38		T3	29
valid_sources[0x15]	820241	1			T1	44		T2	46		T3	28
valid_sources[0x16]	293169	1			T1	42		T2	28		T3	27
valid_sources[0x17]	289306	1			T1	45		T2	32		T3	22
valid_sources[0x18]	287077	1			T1	46		T2	32		T3	25
valid_sources[0x19]	741273	1			T1	36		T2	41		T3	16
valid_sources[0x1a]	296870	1			T1	46		T2	18		T3	16
valid_sources[0x1b]	300432	1			T1	35		T2	34		T3	26
valid_sources[0x1c]	293986	1			T1	40		T2	30		T3	18
valid_sources[0x1d]	287869	1			T1	32		T2	49		T3	22
valid_sources[0x1e]	759004	1			T1	41		T2	37		T3	22
valid_sources[0x1f]	291891	1			T1	39		T2	35		T3	23
valid_sources[0x20]	1083841	1			T1	42		T2	33		T3	30
valid_sources[0x21]	297236	1			T1	39		T2	41		T3	23
valid_sources[0x22]	288874	1			T1	50		T2	38		T3	20
valid_sources[0x23]	296787	1			T1	30		T2	28		T3	19
valid_sources[0x24]	295291	1			T1	27		T2	28		T3	28
valid_sources[0x25]	301076	1			T1	53		T2	36		T3	27
valid_sources[0x26]	341649	1			T1	36		T2	32		T3	30
valid_sources[0x27]	292676	1			T1	44		T2	24		T3	23
valid_sources[0x28]	642360	1			T1	41		T2	37		T3	32
valid_sources[0x29]	298593	1			T1	40		T2	27		T3	16
valid_sources[0x2a]	661142	1			T1	33		T2	40		T3	21
valid_sources[0x2b]	295432	1			T1	35		T2	44		T3	21
valid_sources[0x2c]	298091	1			T1	37		T2	36		T3	36
valid_sources[0x2d]	290876	1			T1	32		T2	30		T3	26
valid_sources[0x2e]	300808	1			T1	46		T2	34		T3	21
valid_sources[0x2f]	584695	1			T1	41		T2	41		T3	25
valid_sources[0x30]	296412	1			T1	41		T2	22		T3	17
valid_sources[0x31]	301012	1			T1	33		T2	17		T3	31
valid_sources[0x32]	287287	1			T1	48		T2	24		T3	20
valid_sources[0x33]	292730	1			T1	36		T2	42		T3	25
valid_sources[0x34]	296592	1			T1	39		T2	38		T3	25
valid_sources[0x35]	290854	1			T1	38		T2	32		T3	28
valid_sources[0x36]	288431	1			T1	30		T2	37		T3	26
valid_sources[0x37]	306626	1			T1	46		T2	36		T3	23
valid_sources[0x38]	293646	1			T1	28		T2	28		T3	34
valid_sources[0x39]	567689	1			T1	34		T2	24		T3	19
valid_sources[0x3a]	516863	1			T1	48		T2	44		T3	25
valid_sources[0x3b]	1063537	1			T1	44		T2	37		T3	33
valid_sources[0x3c]	296224	1			T1	40		T2	48		T3	34
valid_sources[0x3d]	291741	1			T1	44		T2	33		T3	31
valid_sources[0x3e]	298806	1			T1	46		T2	32		T3	24
valid_sources[0x3f]	293138	1			T1	51		T2	36		T3	25
valid_sources[0x40]	293968	1			T1	33		T2	37		T3	28
valid_sources[0x41]	290227	1			T1	39		T2	25		T3	23
valid_sources[0x42]	298528	1			T1	42		T2	40		T3	27
valid_sources[0x43]	590315	1			T1	36		T2	28		T3	20
valid_sources[0x44]	293310	1			T1	60		T2	35		T3	21
valid_sources[0x45]	291531	1			T1	22		T2	40		T3	25
valid_sources[0x46]	295670	1			T1	36		T2	43		T3	30
valid_sources[0x47]	287614	1			T1	41		T2	29		T3	19
valid_sources[0x48]	532321	1			T1	42		T2	19		T3	11
valid_sources[0x49]	302753	1			T1	39		T2	37		T3	31
valid_sources[0x4a]	306091	1			T1	46		T2	32		T3	19
valid_sources[0x4b]	924110	1			T1	36		T2	31		T3	28
valid_sources[0x4c]	293143	1			T1	41		T2	28		T3	21
valid_sources[0x4d]	299798	1			T1	46		T2	37		T3	36
valid_sources[0x4e]	287318	1			T1	30		T2	16		T3	32
valid_sources[0x4f]	908795	1			T1	37		T2	42		T3	25
valid_sources[0x50]	288543	1			T1	38		T2	31		T3	28
valid_sources[0x51]	288823	1			T1	37		T2	43		T3	20
valid_sources[0x52]	676017	1			T1	38		T2	28		T3	32
valid_sources[0x53]	312071	1			T1	28		T2	40		T3	29
valid_sources[0x54]	770679	1			T1	45		T2	37		T3	20
valid_sources[0x55]	287902	1			T1	41		T2	28		T3	30
valid_sources[0x56]	762504	1			T1	31		T2	23		T3	21
valid_sources[0x57]	292771	1			T1	34		T2	35		T3	28
valid_sources[0x58]	289300	1			T1	29		T2	37		T3	21
valid_sources[0x59]	296201	1			T1	58		T2	32		T3	31
valid_sources[0x5a]	289337	1			T1	40		T2	28		T3	26
valid_sources[0x5b]	291908	1			T1	49		T2	23		T3	34
valid_sources[0x5c]	548043	1			T1	33		T2	25		T3	17
valid_sources[0x5d]	580125	1			T1	52		T2	43		T3	33
valid_sources[0x5e]	321014	1			T1	43		T2	36		T3	30
valid_sources[0x5f]	287231	1			T1	41		T2	30		T3	27
valid_sources[0x60]	289108	1			T1	36		T2	40		T3	20
valid_sources[0x61]	605395	1			T1	43		T2	27		T3	18
valid_sources[0x62]	298914	1			T1	45		T2	30		T3	24
valid_sources[0x63]	297939	1			T1	28		T2	20		T3	30
valid_sources[0x64]	684580	1			T1	44		T2	39		T3	23
valid_sources[0x65]	323937	1			T1	35		T2	23		T3	19
valid_sources[0x66]	332723	1			T1	41		T2	32		T3	23
valid_sources[0x67]	304036	1			T1	34		T2	33		T3	22
valid_sources[0x68]	293485	1			T1	42		T2	33		T3	34
valid_sources[0x69]	288075	1			T1	40		T2	43		T3	24
valid_sources[0x6a]	308497	1			T1	46		T2	29		T3	26
valid_sources[0x6b]	290136	1			T1	39		T2	34		T3	20
valid_sources[0x6c]	290557	1			T1	30		T2	34		T3	33
valid_sources[0x6d]	289290	1			T1	35		T2	40		T3	27
valid_sources[0x6e]	748491	1			T1	34		T2	27		T3	23
valid_sources[0x6f]	305663	1			T1	52		T2	33		T3	22
valid_sources[0x70]	291896	1			T1	40		T2	35		T3	21
valid_sources[0x71]	296889	1			T1	44		T2	36		T3	32
valid_sources[0x72]	294542	1			T1	38		T2	36		T3	26
valid_sources[0x73]	289976	1			T1	50		T2	33		T3	25
valid_sources[0x74]	511726	1			T1	48		T2	31		T3	23
valid_sources[0x75]	292886	1			T1	48		T2	50		T3	28
valid_sources[0x76]	297525	1			T1	41		T2	32		T3	18
valid_sources[0x77]	526096	1			T1	28		T2	35		T3	18
valid_sources[0x78]	293633	1			T1	44		T2	35		T3	29
valid_sources[0x79]	287901	1			T1	40		T2	29		T3	29
valid_sources[0x7a]	288055	1			T1	42		T2	43		T3	23
valid_sources[0x7b]	288877	1			T1	33		T2	47		T3	28
valid_sources[0x7c]	290742	1			T1	35		T2	32		T3	25
valid_sources[0x7d]	290670	1			T1	35		T2	38		T3	26
valid_sources[0x7e]	295615	1			T1	36		T2	43		T3	23
valid_sources[0x7f]	569933	1			T1	39		T2	26		T3	31
valid_sources[0x80]	754183	1			T1	42		T2	28		T3	23

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7112229

1

T1

1257

T2

621

T3

400

values[0x0]

all_enables

biggest_size

15080417

1

T1

1370

T2

1320

T3

1033

values[0x1]

all_enables

biggest_size

8809853

1

T1

750

T2

756

T3

636