Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64905643	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31590058

1

T1

96

T2

144

T3

3956

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14650708	1			T1	31		T2	73		T3	1507
values[0x0]	39838476	1			T1	164		T2	193		T3	5426
values[0x1]	42006517	1			T1	151		T2	187		T3	5398

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55338492	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

41157209

1

T1

120

T2

189

T3

4932

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	307985	1			T1	2		T6	1356		T10	42
valid_sources[0x01]	319188	1			T3	12331		T6	1313		T10	28
valid_sources[0x02]	677592	1			T1	1		T6	1309		T10	35
valid_sources[0x03]	644720	1			T1	2		T6	1461		T10	42
valid_sources[0x04]	320156	1			T6	1371		T10	31		T11	1616
valid_sources[0x05]	688848	1			T6	1333		T10	33		T11	1522
valid_sources[0x06]	323520	1			T1	2		T6	1389		T10	41
valid_sources[0x07]	306661	1			T1	2		T6	1363		T10	39
valid_sources[0x08]	314892	1			T6	1301		T10	42		T11	1574
valid_sources[0x09]	313985	1			T6	1495		T10	35		T11	1576
valid_sources[0x0a]	313018	1			T1	2		T6	1354		T10	40
valid_sources[0x0b]	327493	1			T1	2		T6	1375		T10	30
valid_sources[0x0c]	560565	1			T1	2		T6	1282		T10	33
valid_sources[0x0d]	310670	1			T6	1431		T10	36		T11	1569
valid_sources[0x0e]	629998	1			T1	1		T6	1359		T10	32
valid_sources[0x0f]	320747	1			T6	1365		T10	32		T11	1571
valid_sources[0x10]	310116	1			T1	1		T6	1302		T10	46
valid_sources[0x11]	769322	1			T6	1475		T10	42		T11	1609
valid_sources[0x12]	327903	1			T1	1		T6	1373		T10	42
valid_sources[0x13]	307726	1			T1	1		T6	1422		T10	40
valid_sources[0x14]	317300	1			T1	1		T6	1400		T10	35
valid_sources[0x15]	313043	1			T1	1		T6	1397		T10	28
valid_sources[0x16]	308112	1			T1	2		T6	1363		T10	34
valid_sources[0x17]	311462	1			T1	1		T6	1340		T10	36
valid_sources[0x18]	322326	1			T1	2		T6	1394		T10	33
valid_sources[0x19]	802134	1			T1	2		T6	1381		T10	32
valid_sources[0x1a]	309909	1			T6	1373		T10	36		T11	1600
valid_sources[0x1b]	331325	1			T6	1309		T10	33		T11	1528
valid_sources[0x1c]	320497	1			T1	2		T6	1356		T10	49
valid_sources[0x1d]	302481	1			T6	1328		T10	29		T11	1682
valid_sources[0x1e]	310731	1			T1	3		T6	1360		T10	38
valid_sources[0x1f]	307002	1			T1	4		T6	1399		T10	41
valid_sources[0x20]	325854	1			T1	1		T6	1338		T10	33
valid_sources[0x21]	321822	1			T1	2		T6	1366		T10	39
valid_sources[0x22]	313366	1			T6	1352		T10	34		T11	1607
valid_sources[0x23]	308110	1			T6	1390		T10	40		T11	1581
valid_sources[0x24]	324906	1			T6	1297		T10	47		T11	1626
valid_sources[0x25]	310343	1			T6	1373		T10	52		T11	1519
valid_sources[0x26]	317801	1			T1	2		T6	1303		T10	32
valid_sources[0x27]	537515	1			T1	2		T6	1314		T10	42
valid_sources[0x28]	310745	1			T1	1		T6	1302		T10	31
valid_sources[0x29]	315302	1			T6	1382		T10	28		T11	1640
valid_sources[0x2a]	316732	1			T1	1		T6	1386		T10	28
valid_sources[0x2b]	318339	1			T6	1359		T10	38		T11	1577
valid_sources[0x2c]	303211	1			T1	1		T6	1339		T10	36
valid_sources[0x2d]	309912	1			T6	1418		T10	35		T11	1617
valid_sources[0x2e]	321266	1			T1	1		T6	1377		T10	49
valid_sources[0x2f]	311715	1			T1	3		T6	1394		T10	32
valid_sources[0x30]	306381	1			T1	2		T6	1347		T10	41
valid_sources[0x31]	343057	1			T1	4		T6	1362		T10	52
valid_sources[0x32]	304533	1			T1	1		T6	1423		T10	53
valid_sources[0x33]	303002	1			T6	1366		T10	42		T11	1651
valid_sources[0x34]	334328	1			T1	3		T6	1378		T10	45
valid_sources[0x35]	310333	1			T6	1412		T10	51		T11	1672
valid_sources[0x36]	311584	1			T6	1329		T10	39		T11	1562
valid_sources[0x37]	307907	1			T1	1		T6	1236		T10	35
valid_sources[0x38]	303369	1			T1	1		T6	1389		T10	41
valid_sources[0x39]	575839	1			T6	1309		T10	45		T11	1613
valid_sources[0x3a]	317741	1			T1	2		T6	1291		T10	41
valid_sources[0x3b]	792773	1			T1	2		T6	1391		T10	34
valid_sources[0x3c]	311640	1			T1	4		T6	1350		T10	50
valid_sources[0x3d]	306901	1			T1	1		T6	1320		T10	39
valid_sources[0x3e]	317073	1			T1	4		T6	1375		T10	37
valid_sources[0x3f]	318913	1			T1	2		T6	1310		T10	29
valid_sources[0x40]	325110	1			T1	2		T6	1388		T10	31
valid_sources[0x41]	310566	1			T6	1375		T10	48		T11	1590
valid_sources[0x42]	319623	1			T1	2		T6	1362		T10	47
valid_sources[0x43]	778890	1			T1	2		T6	1348		T10	50
valid_sources[0x44]	319354	1			T1	2		T6	1387		T10	44
valid_sources[0x45]	306601	1			T1	2		T6	1312		T10	39
valid_sources[0x46]	756057	1			T1	4		T6	1302		T10	44
valid_sources[0x47]	318121	1			T1	1		T6	1378		T10	37
valid_sources[0x48]	326499	1			T1	2		T6	1391		T10	47
valid_sources[0x49]	602923	1			T1	1		T6	1324		T10	48
valid_sources[0x4a]	308376	1			T1	1		T6	1359		T10	49
valid_sources[0x4b]	312030	1			T1	1		T6	1332		T10	43
valid_sources[0x4c]	317016	1			T6	1341		T10	44		T11	1530
valid_sources[0x4d]	325141	1			T1	1		T6	1398		T10	36
valid_sources[0x4e]	319036	1			T6	1339		T10	24		T11	1526
valid_sources[0x4f]	338404	1			T1	1		T6	1392		T10	37
valid_sources[0x50]	305293	1			T1	1		T6	1387		T10	40
valid_sources[0x51]	583536	1			T1	1		T6	1308		T10	41
valid_sources[0x52]	766713	1			T1	1		T6	1409		T10	45
valid_sources[0x53]	367830	1			T1	2		T6	1295		T10	37
valid_sources[0x54]	313756	1			T1	1		T6	1321		T10	44
valid_sources[0x55]	308556	1			T1	1		T6	1358		T10	43
valid_sources[0x56]	336868	1			T1	2		T6	1356		T10	39
valid_sources[0x57]	309102	1			T1	1		T6	1342		T10	45
valid_sources[0x58]	322251	1			T1	2		T6	1371		T10	37
valid_sources[0x59]	321243	1			T1	2		T6	1379		T10	38
valid_sources[0x5a]	321811	1			T1	2		T6	1338		T10	47
valid_sources[0x5b]	307413	1			T1	2		T6	1386		T10	32
valid_sources[0x5c]	308198	1			T1	2		T6	1412		T10	42
valid_sources[0x5d]	617891	1			T1	5		T6	1330		T10	31
valid_sources[0x5e]	317931	1			T1	2		T6	1276		T10	35
valid_sources[0x5f]	660069	1			T1	4		T6	1396		T10	38
valid_sources[0x60]	324042	1			T1	1		T6	1424		T10	32
valid_sources[0x61]	319959	1			T6	1393		T10	43		T11	1531
valid_sources[0x62]	326783	1			T1	1		T6	1343		T10	30
valid_sources[0x63]	332931	1			T1	4		T6	1384		T10	44
valid_sources[0x64]	310941	1			T1	3		T6	1353		T10	40
valid_sources[0x65]	307652	1			T1	1		T6	1355		T10	45
valid_sources[0x66]	316857	1			T1	1		T6	1404		T10	56
valid_sources[0x67]	311842	1			T1	4		T6	1330		T10	39
valid_sources[0x68]	304207	1			T6	1327		T10	29		T11	1572
valid_sources[0x69]	601946	1			T1	1		T6	1422		T10	49
valid_sources[0x6a]	318864	1			T1	1		T6	1389		T10	45
valid_sources[0x6b]	319414	1			T1	2		T6	1313		T10	33
valid_sources[0x6c]	320075	1			T1	2		T6	1366		T10	49
valid_sources[0x6d]	757559	1			T1	1		T6	1336		T10	47
valid_sources[0x6e]	325842	1			T6	1447		T10	43		T11	1556
valid_sources[0x6f]	692683	1			T1	1		T6	1358		T10	39
valid_sources[0x70]	300972	1			T6	1344		T10	38		T11	1578
valid_sources[0x71]	720266	1			T6	1367		T10	50		T11	1632
valid_sources[0x72]	327703	1			T1	1		T6	1386		T10	47
valid_sources[0x73]	319252	1			T1	2		T6	1339		T10	36
valid_sources[0x74]	703708	1			T1	2		T6	1412		T10	27
valid_sources[0x75]	309775	1			T1	1		T6	1363		T10	46
valid_sources[0x76]	317171	1			T1	2		T6	1300		T10	49
valid_sources[0x77]	330512	1			T6	1411		T10	49		T11	1517
valid_sources[0x78]	761023	1			T1	1		T6	1428		T10	31
valid_sources[0x79]	315699	1			T6	1308		T10	44		T11	1479
valid_sources[0x7a]	327386	1			T1	3		T6	1340		T10	52
valid_sources[0x7b]	844327	1			T1	1		T6	1329		T10	43
valid_sources[0x7c]	307003	1			T1	3		T6	1377		T10	49
valid_sources[0x7d]	318953	1			T1	1		T6	1352		T10	31
valid_sources[0x7e]	319034	1			T1	2		T6	1376		T10	36
valid_sources[0x7f]	315244	1			T1	2		T6	1353		T10	47
valid_sources[0x80]	339163	1			T1	1		T6	1400		T10	54

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7326575

1

T1

17

T2

41

T3

739

values[0x0]

all_enables

biggest_size

15298546

1

T1

56

T2

70

T3

2032

values[0x1]

all_enables

biggest_size

8964937

1

T1

23

T2

33

T3

1185