Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64429216	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

31186329

1

T1

2084

T2

77561

T3

109757

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	14538796	1			T1	782		T2	29079		T3	42862
values[0x0]	39558516	1			T1	2842		T2	87020		T3	150896
values[0x1]	41518233	1			T1	2737		T2	107480		T3	150040

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55031533	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

40584012

1

T1

2581

T2

108229

T3

138470

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	306504	1			T1	19		T2	2363		T3	1310
valid_sources[0x01]	306931	1			T1	28		T2	24		T3	1287
valid_sources[0x02]	306649	1			T1	26		T2	398		T3	1357
valid_sources[0x03]	595541	1			T1	45		T2	199		T3	1325
valid_sources[0x04]	331853	1			T1	19		T2	1344		T3	1339
valid_sources[0x05]	315647	1			T1	23		T2	518		T3	1296
valid_sources[0x06]	614108	1			T1	20		T2	171		T3	1440
valid_sources[0x07]	757704	1			T1	27		T2	175		T3	1357
valid_sources[0x08]	312142	1			T1	37		T2	949		T3	1368
valid_sources[0x09]	301157	1			T1	29		T2	79		T3	1303
valid_sources[0x0a]	541079	1			T1	21		T2	788		T3	1386
valid_sources[0x0b]	790240	1			T1	27		T2	989		T3	1294
valid_sources[0x0c]	304243	1			T1	33		T2	1246		T3	1302
valid_sources[0x0d]	611601	1			T1	33		T2	2448		T3	1297
valid_sources[0x0e]	308762	1			T1	27		T2	537		T3	1296
valid_sources[0x0f]	308612	1			T1	27		T2	837		T3	1411
valid_sources[0x10]	333819	1			T1	31		T2	557		T3	1329
valid_sources[0x11]	307219	1			T1	17		T2	2314		T3	1352
valid_sources[0x12]	389344	1			T1	20		T2	97		T3	1322
valid_sources[0x13]	613111	1			T1	26		T2	392		T3	1282
valid_sources[0x14]	305741	1			T1	30		T2	509		T3	1314
valid_sources[0x15]	315936	1			T1	21		T2	203		T3	1461
valid_sources[0x16]	302846	1			T1	25		T2	2103		T3	1380
valid_sources[0x17]	311701	1			T1	19		T2	610		T3	1336
valid_sources[0x18]	318335	1			T1	15		T2	2045		T3	1335
valid_sources[0x19]	587415	1			T1	27		T2	165		T3	1423
valid_sources[0x1a]	304155	1			T1	34		T2	337		T3	1336
valid_sources[0x1b]	300969	1			T1	16		T2	749		T3	1420
valid_sources[0x1c]	312719	1			T1	29		T2	1989		T3	1443
valid_sources[0x1d]	305548	1			T1	24		T2	1489		T3	1406
valid_sources[0x1e]	307725	1			T1	26		T2	1226		T3	1243
valid_sources[0x1f]	307720	1			T1	19		T2	2399		T3	1311
valid_sources[0x20]	715883	1			T1	32		T2	1721		T3	1195
valid_sources[0x21]	303813	1			T1	29		T2	178		T3	1242
valid_sources[0x22]	307015	1			T1	32		T2	669		T3	1380
valid_sources[0x23]	301231	1			T1	51		T2	12		T3	1363
valid_sources[0x24]	753614	1			T1	13		T3	1548		T6	1708
valid_sources[0x25]	311856	1			T1	38		T2	944		T3	1380
valid_sources[0x26]	310144	1			T1	23		T2	886		T3	1323
valid_sources[0x27]	527690	1			T1	22		T2	317		T3	1368
valid_sources[0x28]	303305	1			T1	22		T2	611		T3	1339
valid_sources[0x29]	306208	1			T1	21		T2	858		T3	1257
valid_sources[0x2a]	303154	1			T1	27		T2	324		T3	1194
valid_sources[0x2b]	558549	1			T1	19		T2	370		T3	1258
valid_sources[0x2c]	304914	1			T1	17		T2	2298		T3	1319
valid_sources[0x2d]	308009	1			T1	33		T2	1411		T3	1486
valid_sources[0x2e]	315268	1			T1	22		T2	1273		T3	1418
valid_sources[0x2f]	306819	1			T1	26		T2	761		T3	1299
valid_sources[0x30]	307225	1			T1	27		T2	1592		T3	1473
valid_sources[0x31]	303809	1			T1	31		T2	71		T3	1259
valid_sources[0x32]	313065	1			T1	22		T2	3004		T3	1310
valid_sources[0x33]	326215	1			T1	26		T2	2126		T3	1391
valid_sources[0x34]	308357	1			T1	22		T2	2671		T3	1285
valid_sources[0x35]	316635	1			T1	20		T2	148		T3	1406
valid_sources[0x36]	306076	1			T1	18		T2	2627		T3	1466
valid_sources[0x37]	317757	1			T1	23		T2	690		T3	1288
valid_sources[0x38]	317284	1			T1	22		T2	1591		T3	1380
valid_sources[0x39]	306225	1			T1	22		T2	781		T3	1384
valid_sources[0x3a]	308274	1			T1	22		T2	3095		T3	1333
valid_sources[0x3b]	309981	1			T1	35		T2	1152		T3	1244
valid_sources[0x3c]	311611	1			T1	27		T2	2		T3	1163
valid_sources[0x3d]	309562	1			T1	24		T2	307		T3	1450
valid_sources[0x3e]	304175	1			T1	26		T2	832		T3	1408
valid_sources[0x3f]	767009	1			T1	25		T2	603		T3	1384
valid_sources[0x40]	301205	1			T1	30		T2	459		T3	1329
valid_sources[0x41]	311607	1			T1	24		T2	1824		T3	1294
valid_sources[0x42]	302810	1			T1	31		T2	130		T3	1215
valid_sources[0x43]	304992	1			T1	23		T2	1719		T3	1371
valid_sources[0x44]	306336	1			T1	25		T2	437		T3	1381
valid_sources[0x45]	299310	1			T1	21		T2	180		T3	1276
valid_sources[0x46]	304854	1			T1	29		T2	2242		T3	1253
valid_sources[0x47]	314078	1			T1	14		T2	1178		T3	1405
valid_sources[0x48]	310659	1			T1	37		T2	1341		T3	1406
valid_sources[0x49]	302811	1			T1	33		T2	471		T3	1296
valid_sources[0x4a]	310239	1			T1	34		T2	413		T3	1373
valid_sources[0x4b]	700501	1			T1	25		T2	112		T3	1501
valid_sources[0x4c]	301146	1			T1	25		T2	35		T3	1310
valid_sources[0x4d]	306737	1			T1	8		T2	107		T3	1280
valid_sources[0x4e]	309657	1			T1	28		T2	2183		T3	1332
valid_sources[0x4f]	304744	1			T1	39		T2	294		T3	1277
valid_sources[0x50]	305387	1			T1	32		T2	1669		T3	1353
valid_sources[0x51]	537316	1			T1	33		T2	408		T3	1382
valid_sources[0x52]	314808	1			T1	25		T2	765		T3	1192
valid_sources[0x53]	309257	1			T1	25		T2	280		T3	1384
valid_sources[0x54]	309284	1			T1	27		T2	322		T3	1360
valid_sources[0x55]	302495	1			T1	17		T2	636		T3	1387
valid_sources[0x56]	558704	1			T1	22		T3	1397		T11	1
valid_sources[0x57]	315889	1			T1	16		T2	65		T3	1443
valid_sources[0x58]	306538	1			T1	19		T2	1531		T3	1349
valid_sources[0x59]	701268	1			T1	25		T2	1197		T3	1353
valid_sources[0x5a]	305560	1			T1	16		T2	85		T3	1390
valid_sources[0x5b]	303075	1			T1	26		T2	93		T3	1440
valid_sources[0x5c]	321523	1			T1	36		T2	809		T3	1298
valid_sources[0x5d]	308037	1			T1	30		T2	20		T3	1266
valid_sources[0x5e]	319320	1			T1	22		T2	796		T3	1275
valid_sources[0x5f]	303047	1			T1	19		T2	4266		T3	1313
valid_sources[0x60]	309178	1			T1	18		T2	283		T3	1304
valid_sources[0x61]	313102	1			T1	32		T2	267		T3	1384
valid_sources[0x62]	739904	1			T1	9		T2	764		T3	1241
valid_sources[0x63]	563310	1			T1	30		T2	316		T3	1312
valid_sources[0x64]	315793	1			T1	22		T2	209		T3	1379
valid_sources[0x65]	309539	1			T1	14		T2	624		T3	1320
valid_sources[0x66]	312087	1			T1	21		T2	817		T3	1255
valid_sources[0x67]	303471	1			T1	37		T2	2593		T3	1400
valid_sources[0x68]	942456	1			T1	23		T2	483		T3	1383
valid_sources[0x69]	312879	1			T1	29		T2	234		T3	1361
valid_sources[0x6a]	301488	1			T1	17		T3	1350		T11	4
valid_sources[0x6b]	311441	1			T1	26		T2	778		T3	1258
valid_sources[0x6c]	305132	1			T1	25		T2	3870		T3	1336
valid_sources[0x6d]	311800	1			T1	34		T2	302		T3	1245
valid_sources[0x6e]	303961	1			T1	37		T2	196		T3	1304
valid_sources[0x6f]	301416	1			T1	24		T2	465		T3	1385
valid_sources[0x70]	335657	1			T1	35		T2	512		T3	1234
valid_sources[0x71]	301855	1			T1	29		T2	122		T3	1357
valid_sources[0x72]	316545	1			T1	14		T2	2990		T3	1296
valid_sources[0x73]	320407	1			T1	26		T2	1152		T3	1390
valid_sources[0x74]	303293	1			T1	20		T2	71		T3	1431
valid_sources[0x75]	302233	1			T1	29		T2	76		T3	1430
valid_sources[0x76]	310992	1			T1	25		T2	471		T3	1418
valid_sources[0x77]	309857	1			T1	23		T2	1249		T3	1255
valid_sources[0x78]	308054	1			T1	23		T2	2026		T3	1410
valid_sources[0x79]	819775	1			T1	15		T3	1267		T11	4
valid_sources[0x7a]	722466	1			T1	28		T2	1804		T3	1200
valid_sources[0x7b]	305929	1			T1	32		T2	954		T3	1339
valid_sources[0x7c]	314239	1			T1	31		T2	1193		T3	1297
valid_sources[0x7d]	309264	1			T1	31		T2	1968		T3	1344
valid_sources[0x7e]	741107	1			T1	21		T2	1636		T3	1279
valid_sources[0x7f]	307825	1			T1	28		T2	232		T3	1245
valid_sources[0x80]	300478	1			T1	23		T2	345		T3	1471

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7214870

1

T1

400

T2

16697

T3

21355

values[0x0]

all_enables

biggest_size

15135937

1

T1

1053

T2

36586

T3

56451

values[0x1]

all_enables

biggest_size

8835522

1

T1

631

T2

24278

T3

31951