Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50075012	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

23638828

1

T1

5797

T2

90

T3

4705

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	11732711	1			T1	2780		T2	22		T3	1924
values[0x0]	30939957	1			T1	7734		T2	139		T3	6320
values[0x1]	31041172	1			T1	7746		T2	175		T3	6472

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43585755	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

30128085

1

T1

7343

T2

118

T3

5915

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	239093	1			T2	10		T3	27		T8	14
valid_sources[0x01]	534397	1			T3	88		T8	10		T12	11
valid_sources[0x02]	235289	1			T2	1		T3	34		T8	6
valid_sources[0x03]	527893	1			T3	59		T8	8		T12	23
valid_sources[0x04]	237674	1			T3	84		T8	15		T12	19
valid_sources[0x05]	577087	1			T3	85		T8	11		T12	12
valid_sources[0x06]	241665	1			T3	9		T8	15		T12	16
valid_sources[0x07]	236436	1			T2	3		T3	18		T8	21
valid_sources[0x08]	244863	1			T3	88		T8	13		T12	57
valid_sources[0x09]	231912	1			T3	36		T8	12		T12	46
valid_sources[0x0a]	233256	1			T3	31		T8	18		T12	21
valid_sources[0x0b]	233251	1			T3	26		T8	16		T12	21
valid_sources[0x0c]	950569	1			T3	66		T8	15		T12	6
valid_sources[0x0d]	235500	1			T3	43		T8	12		T12	13
valid_sources[0x0e]	234127	1			T3	52		T8	10		T12	6
valid_sources[0x0f]	236349	1			T3	5		T8	21		T12	20
valid_sources[0x10]	241379	1			T3	88		T8	19		T12	14
valid_sources[0x11]	235443	1			T3	65		T8	9		T12	13
valid_sources[0x12]	239841	1			T2	13		T3	52		T8	11
valid_sources[0x13]	237821	1			T3	38		T8	14		T12	7
valid_sources[0x14]	275129	1			T3	63		T8	13		T12	27
valid_sources[0x15]	236599	1			T3	59		T8	7		T12	14
valid_sources[0x16]	236321	1			T3	84		T8	12		T12	26
valid_sources[0x17]	237896	1			T2	22		T3	66		T8	15
valid_sources[0x18]	247141	1			T3	32		T8	10		T12	4
valid_sources[0x19]	237053	1			T3	67		T8	9		T12	11
valid_sources[0x1a]	242883	1			T3	40		T8	17		T12	3
valid_sources[0x1b]	238929	1			T3	88		T8	5		T12	12
valid_sources[0x1c]	665652	1			T2	4		T3	73		T8	18
valid_sources[0x1d]	235629	1			T3	59		T8	4		T12	27
valid_sources[0x1e]	689420	1			T3	53		T8	7		T12	18
valid_sources[0x1f]	235820	1			T2	11		T3	16		T8	6
valid_sources[0x20]	252034	1			T2	15		T3	12		T8	11
valid_sources[0x21]	234943	1			T3	87		T8	11		T12	3
valid_sources[0x22]	274290	1			T3	76		T8	12		T12	14
valid_sources[0x23]	265477	1			T3	10		T8	6		T12	15
valid_sources[0x24]	237630	1			T3	40		T8	13		T12	5
valid_sources[0x25]	236065	1			T3	38		T8	15		T12	26
valid_sources[0x26]	237985	1			T3	96		T8	6		T12	3
valid_sources[0x27]	235691	1			T2	1		T3	60		T8	6
valid_sources[0x28]	232834	1			T3	27		T8	9		T12	12
valid_sources[0x29]	236409	1			T3	50		T8	9		T12	21
valid_sources[0x2a]	235844	1			T3	78		T8	8		T12	11
valid_sources[0x2b]	241372	1			T3	97		T8	9		T12	26
valid_sources[0x2c]	872843	1			T3	14		T8	11		T12	7
valid_sources[0x2d]	239031	1			T2	14		T3	58		T8	10
valid_sources[0x2e]	235215	1			T3	30		T8	16		T12	12
valid_sources[0x2f]	237903	1			T3	90		T8	11		T12	24
valid_sources[0x30]	236875	1			T3	6		T8	7		T12	15
valid_sources[0x31]	239637	1			T3	61		T8	8		T12	24
valid_sources[0x32]	236673	1			T3	135		T8	17		T12	7
valid_sources[0x33]	281212	1			T3	69		T8	10		T12	9
valid_sources[0x34]	236184	1			T3	213		T8	12		T12	19
valid_sources[0x35]	237770	1			T3	56		T8	16		T12	6
valid_sources[0x36]	235081	1			T3	35		T8	12		T12	5
valid_sources[0x37]	235792	1			T3	26		T8	14		T12	8
valid_sources[0x38]	234808	1			T3	90		T8	9		T12	23
valid_sources[0x39]	241511	1			T3	37		T8	9		T12	4
valid_sources[0x3a]	267999	1			T3	18		T8	10		T4	569
valid_sources[0x3b]	235527	1			T3	51		T8	11		T12	30
valid_sources[0x3c]	235974	1			T3	29		T8	17		T12	9
valid_sources[0x3d]	235695	1			T3	117		T8	21		T12	14
valid_sources[0x3e]	235807	1			T3	28		T8	10		T12	2
valid_sources[0x3f]	236181	1			T3	11		T8	6		T12	24
valid_sources[0x40]	233106	1			T3	52		T8	11		T4	501
valid_sources[0x41]	239782	1			T2	1		T3	21		T8	18
valid_sources[0x42]	251050	1			T3	158		T8	15		T12	14
valid_sources[0x43]	236190	1			T2	9		T3	48		T8	9
valid_sources[0x44]	238815	1			T3	53		T8	17		T12	20
valid_sources[0x45]	671302	1			T2	1		T3	38		T8	15
valid_sources[0x46]	238289	1			T3	88		T8	12		T12	5
valid_sources[0x47]	235050	1			T3	29		T8	16		T12	38
valid_sources[0x48]	237698	1			T3	73		T8	8		T12	10
valid_sources[0x49]	236631	1			T3	21		T8	8		T12	48
valid_sources[0x4a]	246709	1			T3	44		T8	15		T12	32
valid_sources[0x4b]	540015	1			T3	90		T8	10		T12	1
valid_sources[0x4c]	237088	1			T3	97		T8	13		T12	5
valid_sources[0x4d]	247743	1			T3	70		T8	16		T12	19
valid_sources[0x4e]	238326	1			T3	95		T8	9		T12	6
valid_sources[0x4f]	238489	1			T3	41		T8	7		T12	3
valid_sources[0x50]	721280	1			T2	1		T3	42		T8	8
valid_sources[0x51]	238316	1			T3	44		T8	9		T12	41
valid_sources[0x52]	237491	1			T3	56		T8	8		T12	14
valid_sources[0x53]	481127	1			T3	39		T8	13		T12	7
valid_sources[0x54]	239426	1			T2	4		T3	48		T8	8
valid_sources[0x55]	235333	1			T3	66		T8	12		T12	20
valid_sources[0x56]	239091	1			T3	162		T8	11		T12	26
valid_sources[0x57]	234648	1			T2	7		T3	79		T8	11
valid_sources[0x58]	237554	1			T3	75		T8	13		T12	25
valid_sources[0x59]	234099	1			T3	31		T8	10		T12	33
valid_sources[0x5a]	572755	1			T2	5		T3	47		T8	7
valid_sources[0x5b]	233111	1			T2	8		T3	51		T8	11
valid_sources[0x5c]	237068	1			T2	5		T3	70		T8	10
valid_sources[0x5d]	239554	1			T3	79		T8	12		T12	3
valid_sources[0x5e]	659902	1			T3	45		T8	13		T12	2
valid_sources[0x5f]	235075	1			T3	109		T8	16		T12	41
valid_sources[0x60]	272862	1			T3	50		T8	8		T12	36
valid_sources[0x61]	239080	1			T2	13		T3	62		T8	16
valid_sources[0x62]	244692	1			T2	3		T3	92		T8	4
valid_sources[0x63]	241534	1			T3	45		T8	9		T12	1
valid_sources[0x64]	239264	1			T3	52		T8	17		T12	28
valid_sources[0x65]	234292	1			T3	29		T8	14		T4	566
valid_sources[0x66]	245217	1			T2	7		T3	67		T8	16
valid_sources[0x67]	239901	1			T3	26		T8	11		T12	6
valid_sources[0x68]	653620	1			T3	21		T8	8		T12	22
valid_sources[0x69]	234203	1			T3	33		T8	9		T12	18
valid_sources[0x6a]	452861	1			T3	78		T8	6		T12	16
valid_sources[0x6b]	236485	1			T3	90		T8	10		T12	7
valid_sources[0x6c]	241803	1			T3	50		T8	15		T12	18
valid_sources[0x6d]	233974	1			T2	2		T3	92		T8	15
valid_sources[0x6e]	237849	1			T3	54		T8	19		T12	17
valid_sources[0x6f]	241198	1			T3	45		T8	16		T12	15
valid_sources[0x70]	239996	1			T2	7		T3	59		T8	9
valid_sources[0x71]	237900	1			T3	77		T8	12		T12	5
valid_sources[0x72]	237108	1			T3	15		T8	8		T12	10
valid_sources[0x73]	239132	1			T3	30		T8	17		T12	1
valid_sources[0x74]	237725	1			T3	124		T8	13		T12	6
valid_sources[0x75]	243015	1			T3	55		T8	17		T12	8
valid_sources[0x76]	815332	1			T3	48		T8	13		T12	16
valid_sources[0x77]	240261	1			T3	47		T8	21		T12	20
valid_sources[0x78]	233762	1			T3	33		T8	8		T12	28
valid_sources[0x79]	235141	1			T3	67		T8	4		T12	48
valid_sources[0x7a]	244322	1			T3	7		T8	12		T12	21
valid_sources[0x7b]	236433	1			T3	78		T8	6		T4	474
valid_sources[0x7c]	236317	1			T3	47		T8	9		T12	4
valid_sources[0x7d]	267268	1			T3	65		T8	6		T12	4
valid_sources[0x7e]	234315	1			T3	21		T8	10		T12	23
valid_sources[0x7f]	234431	1			T2	6		T3	47		T8	13
valid_sources[0x80]	253465	1			T3	14		T8	10		T12	17

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5593445

1

T1

1374

T2

11

T3

942

values[0x0]

all_enables

biggest_size

11527301

1

T1

2868

T2

46

T3

2399

values[0x1]

all_enables

biggest_size

6518082

1

T1

1555

T2

33

T3

1364