Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
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Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

218 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_13.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_14.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_15.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_16.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_17.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_18.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_19.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_2.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_20.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_21.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_22.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_23.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_24.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_25.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_26.en_a 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_3.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_30.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_31.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_32.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_33.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_34.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_35.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_36.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_37.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_38.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_39.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_4.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_40.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_41.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_42.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_43.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_44.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_45.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_46.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_47.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_48.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_accum_thresh_shadowed.classb_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
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lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.lock 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e0 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e1 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e2 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.map_e3 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase0_cyc_shadowed.classd_phase0_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase1_cyc_shadowed.classd_phase1_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase2_cyc_shadowed.classd_phase2_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_phase3_cyc_shadowed.classd_phase3_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.classd_timeout_cyc_shadowed.classd_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_0.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_1.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_2.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_3.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_4.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_5.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_class_shadowed_6.class_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_0.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_1.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_2.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_3.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_4.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_5.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.loc_alert_en_shadowed_6.en_la 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timeout_cyc_shadowed.ping_timeout_cyc_shadowed 100.00 1 100 1 64 64
lockable_field_cov_of_alert_handler_reg_block.ping_timer_en_shadowed.ping_timer_en_shadowed 100.00 1 100 1 64 64




Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_0.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_1.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_10.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_11.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_12.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_13.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_14.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_15.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_16.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_17.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_18.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_19.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_2.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_20.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_21.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_22.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_23.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_24.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_25.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_26.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_27.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_28.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_29.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_3.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_30.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_31.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_32.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_33.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_34.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_35.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_36.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_37.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_38.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_39.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_4.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_40.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_41.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_42.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_43.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_44.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_45.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_46.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_47.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_48.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_49.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_5.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_50.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_51.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_52.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_53.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_54.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_55.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_56.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_57.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_58.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_59.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_6.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_60.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_61.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_62.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_63.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_64.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_7.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_8.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_class_shadowed_9.class_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_0.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_1.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_10.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_11.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_12.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 981 1 T116 5 T135 1 T123 5
auto[1] 550 1 T116 6 T172 1 T117 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 713 1 T172 1 T127 2 T328 64
auto[1] 256 1 T171 1 T172 1 T118 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 436 1 T171 1 T116 2 T177 1
auto[1] 441 1 T116 2 T172 1 T117 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 651 1 T127 4 T328 64 T329 64
auto[1] 350 1 T171 1 T172 1 T117 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 496 1 T116 2 T135 6 T127 7
auto[1] 516 1 T171 1 T116 6 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 599 1 T135 5 T177 1 T127 3
auto[1] 446 1 T172 1 T135 2 T127 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 373 1 T116 5 T177 1 T180 1
auto[1] 598 1 T171 1 T172 1 T123 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 416 1 T172 1 T120 2 T123 5
auto[1] 398 1 T171 1 T172 1 T117 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 425 1 T328 128 T145 3 T330 1
auto[1] 386 1 T171 1 T172 1 T118 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 429 1 T177 1 T328 128 T330 1
auto[1] 1047 1 T171 1 T172 2 T118 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 659 1 T171 1 T116 3 T172 1
auto[1] 356 1 T172 1 T118 5 T125 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 517 1 T171 1 T116 3 T120 2
auto[1] 549 1 T116 3 T172 2 T118 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 886 1 T116 2 T123 4 T127 2
auto[1] 223 1 T116 1 T172 2 T118 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 437 1 T135 2 T127 3 T328 128
auto[1] 372 1 T171 1 T172 1 T117 9


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 814 1 T172 1 T135 5 T127 5
auto[1] 525 1 T171 1 T172 1 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 791 1 T171 1 T116 3 T120 2
auto[1] 181 1 T172 1 T118 4 T120 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 562 1 T116 2 T177 1 T328 128
auto[1] 417 1 T171 1 T125 10 T180 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 649 1 T177 1 T220 1 T328 64
auto[1] 401 1 T171 1 T116 3 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 493 1 T116 3 T123 5 T180 1
auto[1] 588 1 T171 1 T118 6 T119 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 577 1 T116 4 T121 2 T328 64
auto[1] 662 1 T116 2 T172 2 T119 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 440 1 T116 3 T172 1 T328 128
auto[1] 268 1 T171 1 T116 2 T117 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 797 1 T171 1 T116 5 T123 4
auto[1] 667 1 T172 2 T119 5 T123 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 439 1 T172 1 T120 5 T135 4
auto[1] 664 1 T171 1 T116 7 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 444 1 T116 1 T177 1 T328 128
auto[1] 256 1 T171 1 T116 2 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 888 1 T172 1 T127 1 T121 1
auto[1] 382 1 T171 1 T116 3 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 632 1 T116 2 T172 1 T121 1
auto[1] 203 1 T171 1 T117 6 T119 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 307 1 T116 1 T180 1 T328 64
auto[1] 657 1 T116 1 T172 2 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 433 1 T116 3 T135 2 T127 1
auto[1] 1036 1 T171 1 T116 2 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 440 1 T116 2 T220 1 T328 128
auto[1] 358 1 T171 1 T116 2 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 433 1 T171 1 T116 1 T120 3
auto[1] 812 1 T116 3 T172 1 T118 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 316 1 T120 2 T135 3 T123 4
auto[1] 541 1 T172 2 T120 3 T135 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 635 1 T172 1 T220 1 T328 128
auto[1] 349 1 T117 7 T118 8 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 636 1 T116 4 T135 3 T121 2
auto[1] 505 1 T171 1 T116 1 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 430 1 T116 8 T120 2 T127 3
auto[1] 280 1 T171 1 T116 4 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 475 1 T123 2 T177 1 T121 2
auto[1] 821 1 T171 1 T172 2 T119 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 540 1 T172 2 T120 2 T328 64
auto[1] 943 1 T171 1 T117 4 T120 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 586 1 T177 1 T121 2 T328 64
auto[1] 702 1 T171 1 T121 2 T180 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 618 1 T116 7 T172 1 T120 6
auto[1] 397 1 T171 1 T116 3 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 305 1 T171 1 T120 4 T123 1
auto[1] 689 1 T172 2 T117 5 T119 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 488 1 T120 1 T328 64 T145 4
auto[1] 1214 1 T171 1 T116 1 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 443 1 T172 1 T135 3 T328 64
auto[1] 527 1 T171 1 T172 1 T125 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 367 1 T135 3 T177 1 T127 1
auto[1] 390 1 T172 1 T117 10 T120 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 388 1 T172 1 T177 1 T328 64
auto[1] 306 1 T171 1 T172 1 T127 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 710 1 T135 2 T121 6 T328 128
auto[1] 484 1 T171 1 T180 1 T220 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 380 1 T116 1 T177 1 T127 7
auto[1] 324 1 T171 1 T172 1 T117 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 917 1 T172 1 T328 64 T331 1
auto[1] 469 1 T172 1 T117 6 T125 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 625 1 T127 3 T121 1 T328 64
auto[1] 414 1 T171 1 T172 2 T117 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 507 1 T116 2 T123 3 T177 1
auto[1] 513 1 T116 3 T172 2 T125 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 662 1 T116 3 T177 1 T121 3
auto[1] 323 1 T171 1 T116 1 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 550 1 T116 4 T121 3 T328 128
auto[1] 953 1 T171 1 T116 1 T172 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 429 1 T172 2 T127 3 T328 128
auto[1] 696 1 T171 1 T118 5 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 500 1 T120 4 T328 128 T332 64
auto[1] 333 1 T171 1 T172 1 T117 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 385 1 T120 1 T121 1 T328 64
auto[1] 358 1 T171 1 T117 5 T120 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 312 1 T172 1 T328 128 T331 1
auto[1] 677 1 T171 1 T172 1 T117 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 447 1 T121 5 T220 1 T328 128
auto[1] 255 1 T171 1 T172 1 T119 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 430 1 T123 4 T328 128 T145 6
auto[1] 559 1 T172 1 T117 7 T118 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 592 1 T172 1 T177 1 T127 3
auto[1] 530 1 T171 1 T172 1 T118 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 493 1 T135 4 T328 128 T145 2
auto[1] 491 1 T171 1 T172 1 T117 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 376 1 T123 1 T121 3 T328 128
auto[1] 329 1 T171 1 T172 2 T118 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 616 1 T116 5 T172 1 T121 5
auto[1] 669 1 T116 1 T117 3 T118 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 453 1 T116 2 T328 64 T329 64
auto[1] 272 1 T171 1 T116 4 T172 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 580 1 T171 1 T177 1 T180 1
auto[1] 239 1 T172 1 T220 1 T329 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 370 1 T120 2 T123 1 T127 3
auto[1] 323 1 T116 6 T172 2 T118 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 763 1 T116 4 T172 1 T120 1
auto[1] 542 1 T116 5 T172 1 T119 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 667 1 T116 7 T120 1 T127 5
auto[1] 522 1 T171 1 T172 1 T117 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 28 1 T120 4 T127 2 T121 2
auto[1] 42 1 T125 5 T123 5 T127 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 26 1 T116 7 T127 2 T121 2
auto[1] 25 1 T116 1 T127 2 T121 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 17 1 T116 4 T152 5 T141 6
auto[1] 46 1 T116 2 T117 5 T121 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6 1 T151 4 T129 2 - -
auto[1] 32 1 T118 3 T125 6 T136 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 14 1 T123 5 T143 2 T134 3
auto[1] 33 1 T118 4 T127 4 T131 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%