Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_alert_handler_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52371291	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

24802161

1

T1

120683

T2

4209

T3

948

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	12104488	1			T1	47327		T2	1642		T3	963
values[0x0]	32453721	1			T1	166247		T2	6055		T3	827
values[0x1]	32615243	1			T1	166796		T2	6127		T3	863

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45580942	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

31592510

1

T1

152558

T2

5381

T3

1208

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	216892	1			T1	1501		T2	51		T3	11
valid_sources[0x01]	212391	1			T1	1464		T2	50		T3	10
valid_sources[0x02]	227577	1			T1	1456		T2	66		T3	8
valid_sources[0x03]	217896	1			T1	1431		T2	42		T3	8
valid_sources[0x04]	439088	1			T1	1409		T2	58		T3	14
valid_sources[0x05]	215444	1			T1	1544		T2	66		T3	9
valid_sources[0x06]	212747	1			T1	1484		T2	49		T3	9
valid_sources[0x07]	213902	1			T1	1521		T2	70		T3	9
valid_sources[0x08]	216519	1			T1	1587		T2	58		T3	7
valid_sources[0x09]	553647	1			T1	1619		T2	47		T3	11
valid_sources[0x0a]	215987	1			T1	1519		T2	96		T3	8
valid_sources[0x0b]	216946	1			T1	1480		T2	94		T3	16
valid_sources[0x0c]	523298	1			T1	1433		T2	68		T3	12
valid_sources[0x0d]	220859	1			T1	1481		T2	71		T3	11
valid_sources[0x0e]	214407	1			T1	1534		T2	50		T3	7
valid_sources[0x0f]	215049	1			T1	1620		T2	34		T3	6
valid_sources[0x10]	225126	1			T1	1474		T2	51		T3	12
valid_sources[0x11]	227298	1			T1	1634		T2	53		T3	13
valid_sources[0x12]	220469	1			T1	1523		T2	71		T3	7
valid_sources[0x13]	216516	1			T1	1446		T2	67		T3	12
valid_sources[0x14]	219886	1			T1	1595		T2	68		T3	7
valid_sources[0x15]	217401	1			T1	1536		T2	58		T3	10
valid_sources[0x16]	216247	1			T1	1457		T2	49		T3	11
valid_sources[0x17]	215532	1			T1	1524		T2	45		T3	8
valid_sources[0x18]	214483	1			T1	1477		T2	41		T3	11
valid_sources[0x19]	215499	1			T1	1483		T2	93		T3	10
valid_sources[0x1a]	214064	1			T1	1474		T2	51		T3	8
valid_sources[0x1b]	213756	1			T1	1583		T2	38		T3	11
valid_sources[0x1c]	778182	1			T1	1564		T2	44		T3	6
valid_sources[0x1d]	239100	1			T1	1475		T2	44		T3	9
valid_sources[0x1e]	213363	1			T1	1467		T2	68		T3	6
valid_sources[0x1f]	214945	1			T1	1559		T2	36		T3	14
valid_sources[0x20]	454062	1			T1	1390		T2	38		T3	12
valid_sources[0x21]	215845	1			T1	1605		T2	68		T3	17
valid_sources[0x22]	215658	1			T1	1507		T2	76		T3	9
valid_sources[0x23]	233936	1			T1	1484		T2	34		T3	11
valid_sources[0x24]	658003	1			T1	1607		T2	69		T3	9
valid_sources[0x25]	218239	1			T1	1417		T2	60		T3	10
valid_sources[0x26]	218408	1			T1	1475		T2	45		T3	15
valid_sources[0x27]	219109	1			T1	1405		T2	72		T3	9
valid_sources[0x28]	215907	1			T1	1487		T2	45		T3	14
valid_sources[0x29]	475177	1			T1	1497		T2	34		T3	13
valid_sources[0x2a]	218472	1			T1	1455		T2	74		T3	7
valid_sources[0x2b]	213549	1			T1	1493		T2	37		T3	7
valid_sources[0x2c]	211974	1			T1	1407		T2	29		T3	9
valid_sources[0x2d]	583250	1			T1	1507		T2	87		T3	6
valid_sources[0x2e]	245256	1			T1	1466		T2	59		T3	8
valid_sources[0x2f]	225105	1			T1	1474		T2	58		T3	6
valid_sources[0x30]	218210	1			T1	1431		T2	65		T3	6
valid_sources[0x31]	216617	1			T1	1549		T2	39		T3	14
valid_sources[0x32]	223236	1			T1	1516		T2	61		T3	12
valid_sources[0x33]	694147	1			T1	1511		T2	55		T3	9
valid_sources[0x34]	214495	1			T1	1447		T2	56		T3	8
valid_sources[0x35]	211448	1			T1	1475		T2	62		T3	12
valid_sources[0x36]	215502	1			T1	1505		T2	36		T3	12
valid_sources[0x37]	214167	1			T1	1373		T2	19		T3	3
valid_sources[0x38]	217251	1			T1	1617		T2	47		T3	8
valid_sources[0x39]	214441	1			T1	1469		T2	44		T3	6
valid_sources[0x3a]	214162	1			T1	1411		T2	89		T3	8
valid_sources[0x3b]	860991	1			T1	1545		T2	53		T3	14
valid_sources[0x3c]	220905	1			T1	1444		T2	57		T3	10
valid_sources[0x3d]	217198	1			T1	1506		T2	60		T3	15
valid_sources[0x3e]	660155	1			T1	1380		T2	40		T3	10
valid_sources[0x3f]	215873	1			T1	1643		T2	66		T3	11
valid_sources[0x40]	212972	1			T1	1504		T2	49		T3	5
valid_sources[0x41]	220785	1			T1	1419		T2	61		T3	14
valid_sources[0x42]	218518	1			T1	1395		T2	39		T3	12
valid_sources[0x43]	963254	1			T1	1445		T2	41		T3	10
valid_sources[0x44]	215984	1			T1	1442		T2	79		T3	10
valid_sources[0x45]	215009	1			T1	1537		T2	66		T3	10
valid_sources[0x46]	215317	1			T1	1448		T2	36		T3	7
valid_sources[0x47]	217482	1			T1	1565		T2	57		T3	8
valid_sources[0x48]	219779	1			T1	1322		T2	55		T3	14
valid_sources[0x49]	1042412	1			T1	1402		T2	41		T3	9
valid_sources[0x4a]	225971	1			T1	1414		T2	59		T3	19
valid_sources[0x4b]	215304	1			T1	1485		T2	38		T3	15
valid_sources[0x4c]	215635	1			T1	1625		T2	30		T3	7
valid_sources[0x4d]	214989	1			T1	1489		T2	59		T3	18
valid_sources[0x4e]	536188	1			T1	1460		T2	29		T3	7
valid_sources[0x4f]	211629	1			T1	1505		T2	36		T3	11
valid_sources[0x50]	215794	1			T1	1477		T2	48		T3	13
valid_sources[0x51]	217657	1			T1	1466		T2	41		T3	10
valid_sources[0x52]	220555	1			T1	1485		T2	71		T3	10
valid_sources[0x53]	218522	1			T1	1453		T2	49		T3	11
valid_sources[0x54]	503321	1			T1	1545		T2	36		T3	13
valid_sources[0x55]	216152	1			T1	1413		T2	52		T3	9
valid_sources[0x56]	214079	1			T1	1514		T2	44		T3	6
valid_sources[0x57]	214493	1			T1	1433		T2	58		T3	11
valid_sources[0x58]	213939	1			T1	1572		T2	80		T3	10
valid_sources[0x59]	217275	1			T1	1462		T2	57		T3	12
valid_sources[0x5a]	216349	1			T1	1412		T2	64		T3	7
valid_sources[0x5b]	256276	1			T1	1399		T2	49		T3	9
valid_sources[0x5c]	212878	1			T1	1519		T2	42		T3	14
valid_sources[0x5d]	240040	1			T1	1500		T2	42		T3	12
valid_sources[0x5e]	701898	1			T1	1421		T2	41		T3	11
valid_sources[0x5f]	219130	1			T1	1531		T2	77		T3	14
valid_sources[0x60]	219195	1			T1	1429		T2	50		T3	7
valid_sources[0x61]	639205	1			T1	1425		T2	52		T3	13
valid_sources[0x62]	693748	1			T1	1391		T2	46		T3	3
valid_sources[0x63]	223934	1			T1	1634		T2	51		T3	10
valid_sources[0x64]	596490	1			T1	1481		T2	63		T3	9
valid_sources[0x65]	211910	1			T1	1557		T2	47		T3	8
valid_sources[0x66]	215899	1			T1	1612		T2	46		T3	10
valid_sources[0x67]	212575	1			T1	1410		T2	32		T3	12
valid_sources[0x68]	875860	1			T1	1459		T2	49		T3	8
valid_sources[0x69]	214737	1			T1	1587		T2	66		T3	9
valid_sources[0x6a]	216053	1			T1	1489		T2	54		T3	13
valid_sources[0x6b]	653634	1			T1	1527		T2	74		T3	7
valid_sources[0x6c]	218908	1			T1	1507		T2	86		T3	14
valid_sources[0x6d]	218166	1			T1	1460		T2	54		T3	13
valid_sources[0x6e]	653142	1			T1	1444		T2	31		T3	12
valid_sources[0x6f]	685042	1			T1	1513		T2	52		T3	8
valid_sources[0x70]	214067	1			T1	1476		T2	46		T3	9
valid_sources[0x71]	214484	1			T1	1319		T2	40		T3	14
valid_sources[0x72]	213531	1			T1	1541		T2	49		T3	9
valid_sources[0x73]	215334	1			T1	1471		T2	58		T3	14
valid_sources[0x74]	214106	1			T1	1423		T2	59		T3	14
valid_sources[0x75]	563623	1			T1	1457		T2	57		T3	5
valid_sources[0x76]	212377	1			T1	1597		T2	34		T3	13
valid_sources[0x77]	219041	1			T1	1470		T2	35		T3	8
valid_sources[0x78]	213250	1			T1	1530		T2	28		T3	16
valid_sources[0x79]	220020	1			T1	1487		T2	62		T3	10
valid_sources[0x7a]	667932	1			T1	1526		T2	66		T3	8
valid_sources[0x7b]	217096	1			T1	1465		T2	44		T3	13
valid_sources[0x7c]	861322	1			T1	1412		T2	45		T3	10
valid_sources[0x7d]	214940	1			T1	1472		T2	45		T3	10
valid_sources[0x7e]	217564	1			T1	1588		T2	48		T3	14
valid_sources[0x7f]	217578	1			T1	1540		T2	47		T3	11
valid_sources[0x80]	213996	1			T1	1420		T2	55		T3	10

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5831601

1

T1

23552

T2

796

T3

455

values[0x0]

all_enables

biggest_size

12109671

1

T1

62031

T2

2170

T3

295

values[0x1]

all_enables

biggest_size

6860889

1

T1

35100

T2

1243

T3

198