| T617 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/40.alert_handler_ping_timeout.1649336049 |
|
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Oct 03 05:48:59 AM UTC 24 |
Oct 03 05:58:33 AM UTC 24 |
55684890898 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_smoke.967481373 |
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Oct 03 05:58:04 AM UTC 24 |
Oct 03 05:58:33 AM UTC 24 |
2690633157 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_classes.771222108 |
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Oct 03 05:58:34 AM UTC 24 |
Oct 03 05:58:47 AM UTC 24 |
125428893 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_intr_timeout.386233471 |
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Oct 03 05:58:48 AM UTC 24 |
Oct 03 05:59:03 AM UTC 24 |
317278206 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/33.alert_handler_lpg.357213947 |
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Oct 03 05:34:51 AM UTC 24 |
Oct 03 05:59:39 AM UTC 24 |
22159008525 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg.645676428 |
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Oct 03 05:49:34 AM UTC 24 |
Oct 03 05:59:44 AM UTC 24 |
6098681242 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_alerts.590426270 |
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Oct 03 05:58:34 AM UTC 24 |
Oct 03 05:59:56 AM UTC 24 |
4332578006 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_sig_int_fail.1130312515 |
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Oct 03 05:59:40 AM UTC 24 |
Oct 03 06:00:15 AM UTC 24 |
674603701 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/32.alert_handler_lpg_stub_clk.4138238714 |
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Oct 03 05:32:28 AM UTC 24 |
Oct 03 06:00:27 AM UTC 24 |
243534498008 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/25.alert_handler_entropy.3363281049 |
|
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Oct 03 05:17:58 AM UTC 24 |
Oct 03 06:00:50 AM UTC 24 |
108863753732 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_alerts.1091087258 |
|
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Oct 03 06:00:56 AM UTC 24 |
Oct 03 06:01:01 AM UTC 24 |
18801660 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/36.alert_handler_entropy.2292121828 |
|
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Oct 03 05:41:06 AM UTC 24 |
Oct 03 06:01:15 AM UTC 24 |
62824743675 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_esc_alert_accum.4053520910 |
|
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Oct 03 05:56:30 AM UTC 24 |
Oct 03 06:01:24 AM UTC 24 |
5209902520 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_classes.2646485930 |
|
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Oct 03 06:01:02 AM UTC 24 |
Oct 03 06:01:36 AM UTC 24 |
997440075 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_smoke.3170332152 |
|
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Oct 03 06:00:52 AM UTC 24 |
Oct 03 06:01:39 AM UTC 24 |
361730325 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_intr_timeout.3758521141 |
|
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Oct 03 06:01:18 AM UTC 24 |
Oct 03 06:01:43 AM UTC 24 |
254301178 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/26.alert_handler_lpg.4083868650 |
|
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Oct 03 05:20:45 AM UTC 24 |
Oct 03 06:02:24 AM UTC 24 |
35053562421 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/43.alert_handler_stress_all_with_rand_reset.1508557741 |
|
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Oct 03 05:55:40 AM UTC 24 |
Oct 03 06:02:31 AM UTC 24 |
10034034970 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/37.alert_handler_lpg_stub_clk.3210008939 |
|
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Oct 03 05:43:06 AM UTC 24 |
Oct 03 06:02:33 AM UTC 24 |
266793186181 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/41.alert_handler_stress_all_with_rand_reset.1895460009 |
|
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Oct 03 05:51:37 AM UTC 24 |
Oct 03 06:02:37 AM UTC 24 |
9968847793 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_sig_int_fail.2131726108 |
|
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Oct 03 06:01:37 AM UTC 24 |
Oct 03 06:02:43 AM UTC 24 |
694213592 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_smoke.190608428 |
|
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Oct 03 06:02:43 AM UTC 24 |
Oct 03 06:03:09 AM UTC 24 |
379090399 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/40.alert_handler_entropy.1038443807 |
|
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Oct 03 05:48:57 AM UTC 24 |
Oct 03 06:03:14 AM UTC 24 |
34086093274 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_alerts.2253112443 |
|
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Oct 03 06:02:55 AM UTC 24 |
Oct 03 06:03:27 AM UTC 24 |
204798958 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_intr_timeout.3874111236 |
|
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Oct 03 06:03:16 AM UTC 24 |
Oct 03 06:03:32 AM UTC 24 |
270459778 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_classes.635470200 |
|
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Oct 03 06:03:10 AM UTC 24 |
Oct 03 06:03:38 AM UTC 24 |
257348041 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_sig_int_fail.3129111825 |
|
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Oct 03 06:03:32 AM UTC 24 |
Oct 03 06:03:50 AM UTC 24 |
755771224 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_alert_accum.1005042664 |
|
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Oct 03 05:59:04 AM UTC 24 |
Oct 03 06:04:01 AM UTC 24 |
5454310626 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_alert_accum.217447302 |
|
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Oct 03 06:01:25 AM UTC 24 |
Oct 03 06:04:21 AM UTC 24 |
18841316267 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/41.alert_handler_stress_all.2711826475 |
|
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Oct 03 05:51:37 AM UTC 24 |
Oct 03 06:05:26 AM UTC 24 |
8861665022 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/28.alert_handler_stress_all.458274466 |
|
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Oct 03 05:24:34 AM UTC 24 |
Oct 03 06:05:55 AM UTC 24 |
38548239061 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_alert_accum.1132022972 |
|
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Oct 03 06:03:27 AM UTC 24 |
Oct 03 06:05:57 AM UTC 24 |
5770859999 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/28.alert_handler_lpg.2615129547 |
|
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Oct 03 05:24:03 AM UTC 24 |
Oct 03 06:06:09 AM UTC 24 |
43913693145 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_smoke.3642630672 |
|
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Oct 03 06:05:59 AM UTC 24 |
Oct 03 06:06:29 AM UTC 24 |
4624112126 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_ping_timeout.3865117711 |
|
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Oct 03 06:01:44 AM UTC 24 |
Oct 03 06:06:44 AM UTC 24 |
18194448491 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_classes.1217763341 |
|
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Oct 03 06:06:31 AM UTC 24 |
Oct 03 06:07:00 AM UTC 24 |
601458445 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_intr_timeout.4102379993 |
|
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Oct 03 06:06:45 AM UTC 24 |
Oct 03 06:07:12 AM UTC 24 |
183601687 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_alerts.339306417 |
|
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Oct 03 06:06:11 AM UTC 24 |
Oct 03 06:07:13 AM UTC 24 |
1711004938 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all.3045583908 |
|
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Oct 03 06:05:28 AM UTC 24 |
Oct 03 06:07:29 AM UTC 24 |
1272249777 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_ping_timeout.3010285741 |
|
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Oct 03 05:56:44 AM UTC 24 |
Oct 03 06:07:44 AM UTC 24 |
18662317498 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/37.alert_handler_stress_all.3143271810 |
|
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Oct 03 05:43:11 AM UTC 24 |
Oct 03 06:07:44 AM UTC 24 |
45748521956 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/23.alert_handler_entropy.905297660 |
|
|
Oct 03 05:12:37 AM UTC 24 |
Oct 03 06:07:53 AM UTC 24 |
110376276294 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_alert_accum.809099928 |
|
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Oct 03 06:07:01 AM UTC 24 |
Oct 03 06:07:59 AM UTC 24 |
1556327266 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_sig_int_fail.1538169391 |
|
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Oct 03 06:07:13 AM UTC 24 |
Oct 03 06:08:09 AM UTC 24 |
615013853 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_smoke.1284017646 |
|
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Oct 03 06:08:10 AM UTC 24 |
Oct 03 06:08:40 AM UTC 24 |
586673104 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_ping_timeout.3691328860 |
|
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Oct 03 06:03:51 AM UTC 24 |
Oct 03 06:08:45 AM UTC 24 |
5469961323 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/24.alert_handler_lpg_stub_clk.154995629 |
|
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Oct 03 05:16:03 AM UTC 24 |
Oct 03 06:08:49 AM UTC 24 |
81284059268 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg.313957477 |
|
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Oct 03 05:39:23 AM UTC 24 |
Oct 03 06:08:52 AM UTC 24 |
70153271535 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/24.alert_handler_lpg.432597585 |
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Oct 03 05:15:46 AM UTC 24 |
Oct 03 06:08:52 AM UTC 24 |
204474908771 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/22.alert_handler_lpg_stub_clk.1690376520 |
|
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Oct 03 05:11:38 AM UTC 24 |
Oct 03 06:09:10 AM UTC 24 |
238075212150 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_intr_timeout.1257188642 |
|
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Oct 03 06:08:51 AM UTC 24 |
Oct 03 06:09:25 AM UTC 24 |
692290134 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_classes.2803284121 |
|
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Oct 03 06:08:46 AM UTC 24 |
Oct 03 06:09:31 AM UTC 24 |
326332118 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/30.alert_handler_entropy.337708127 |
|
|
Oct 03 05:28:20 AM UTC 24 |
Oct 03 06:09:38 AM UTC 24 |
67775274910 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_alerts.18576694 |
|
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Oct 03 06:08:41 AM UTC 24 |
Oct 03 06:09:41 AM UTC 24 |
659502768 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_alert_accum.3799342513 |
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Oct 03 06:08:56 AM UTC 24 |
Oct 03 06:10:16 AM UTC 24 |
592872210 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_sig_int_fail.2345840329 |
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Oct 03 06:08:56 AM UTC 24 |
Oct 03 06:10:17 AM UTC 24 |
3113370081 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_ping_timeout.3923674357 |
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Oct 03 05:59:58 AM UTC 24 |
Oct 03 06:10:36 AM UTC 24 |
77109446964 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all_with_rand_reset.2485985695 |
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Oct 03 06:05:57 AM UTC 24 |
Oct 03 06:11:06 AM UTC 24 |
10701328835 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/36.alert_handler_stress_all.4155666084 |
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Oct 03 05:41:48 AM UTC 24 |
Oct 03 06:11:09 AM UTC 24 |
51723468171 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/33.alert_handler_entropy.1831684900 |
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Oct 03 05:34:27 AM UTC 24 |
Oct 03 06:11:17 AM UTC 24 |
26631214079 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/30.alert_handler_lpg_stub_clk.2509759962 |
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Oct 03 05:28:52 AM UTC 24 |
Oct 03 06:12:10 AM UTC 24 |
792347968919 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_stress_all_with_rand_reset.657610834 |
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Oct 03 06:08:00 AM UTC 24 |
Oct 03 06:12:24 AM UTC 24 |
2524672225 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_ping_timeout.1337155724 |
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Oct 03 06:07:30 AM UTC 24 |
Oct 03 06:13:46 AM UTC 24 |
11439645422 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/26.alert_handler_entropy.1477658018 |
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Oct 03 05:20:21 AM UTC 24 |
Oct 03 06:14:12 AM UTC 24 |
80129793332 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_entropy.3306684756 |
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Oct 03 05:59:45 AM UTC 24 |
Oct 03 06:14:22 AM UTC 24 |
36452439782 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/36.alert_handler_lpg_stub_clk.3881014147 |
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Oct 03 05:41:33 AM UTC 24 |
Oct 03 06:14:35 AM UTC 24 |
43204745007 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/35.alert_handler_entropy.629692532 |
|
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Oct 03 05:39:14 AM UTC 24 |
Oct 03 06:14:40 AM UTC 24 |
102376724566 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/41.alert_handler_lpg.1907986862 |
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Oct 03 05:51:08 AM UTC 24 |
Oct 03 06:16:24 AM UTC 24 |
23499695841 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg.2891310959 |
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Oct 03 05:45:01 AM UTC 24 |
Oct 03 06:16:30 AM UTC 24 |
33215030897 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_ping_timeout.3723246856 |
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Oct 03 06:09:25 AM UTC 24 |
Oct 03 06:16:52 AM UTC 24 |
24821411310 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/37.alert_handler_entropy.2914886511 |
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Oct 03 05:42:55 AM UTC 24 |
Oct 03 06:16:57 AM UTC 24 |
133050678097 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/27.alert_handler_entropy.2776619272 |
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Oct 03 05:22:11 AM UTC 24 |
Oct 03 06:17:18 AM UTC 24 |
232201859809 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all_with_rand_reset.2699787714 |
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Oct 03 06:10:17 AM UTC 24 |
Oct 03 06:17:21 AM UTC 24 |
3436408704 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_entropy.3275698194 |
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Oct 03 06:07:13 AM UTC 24 |
Oct 03 06:18:30 AM UTC 24 |
11007379815 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/28.alert_handler_lpg_stub_clk.1810543246 |
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Oct 03 05:24:18 AM UTC 24 |
Oct 03 06:19:03 AM UTC 24 |
44508330330 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg_stub_clk.1544656787 |
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Oct 03 05:55:14 AM UTC 24 |
Oct 03 06:19:04 AM UTC 24 |
23655977877 ps |
| T283 |
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Oct 03 06:07:56 AM UTC 24 |
Oct 03 06:19:36 AM UTC 24 |
41105071336 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/35.alert_handler_stress_all.4062480249 |
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Oct 03 05:39:38 AM UTC 24 |
Oct 03 06:20:08 AM UTC 24 |
74414204228 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_entropy.2196585675 |
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Oct 03 06:01:40 AM UTC 24 |
Oct 03 06:20:29 AM UTC 24 |
33047879572 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg.2710925923 |
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Oct 03 05:55:12 AM UTC 24 |
Oct 03 06:21:15 AM UTC 24 |
20818918745 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/41.alert_handler_entropy.2816008473 |
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Oct 03 05:51:03 AM UTC 24 |
Oct 03 06:22:05 AM UTC 24 |
15212276065 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg_stub_clk.2114355494 |
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Oct 03 05:57:38 AM UTC 24 |
Oct 03 06:23:37 AM UTC 24 |
22122717883 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/42.alert_handler_stress_all.312899466 |
|
|
Oct 03 05:53:49 AM UTC 24 |
Oct 03 06:24:43 AM UTC 24 |
16501068103 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_entropy.2784937394 |
|
|
Oct 03 05:56:35 AM UTC 24 |
Oct 03 06:25:26 AM UTC 24 |
15439937767 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/34.alert_handler_stress_all.1643659667 |
|
|
Oct 03 05:37:59 AM UTC 24 |
Oct 03 06:26:19 AM UTC 24 |
45087766287 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/40.alert_handler_stress_all.2581094216 |
|
|
Oct 03 05:49:53 AM UTC 24 |
Oct 03 06:27:45 AM UTC 24 |
137250140584 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/31.alert_handler_lpg_stub_clk.1719612832 |
|
|
Oct 03 05:29:53 AM UTC 24 |
Oct 03 06:28:25 AM UTC 24 |
227166340635 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/38.alert_handler_entropy.3002571398 |
|
|
Oct 03 05:44:51 AM UTC 24 |
Oct 03 06:28:27 AM UTC 24 |
181769511525 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_entropy.1830744569 |
|
|
Oct 03 06:09:13 AM UTC 24 |
Oct 03 06:29:24 AM UTC 24 |
13781990940 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/43.alert_handler_entropy.1299696968 |
|
|
Oct 03 05:54:53 AM UTC 24 |
Oct 03 06:29:40 AM UTC 24 |
23597186789 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg.1599335635 |
|
|
Oct 03 05:47:24 AM UTC 24 |
Oct 03 06:29:44 AM UTC 24 |
37628906668 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/33.alert_handler_stress_all.3488984757 |
|
|
Oct 03 05:34:57 AM UTC 24 |
Oct 03 06:29:45 AM UTC 24 |
216808805151 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_stress_all.3300992340 |
|
|
Oct 03 06:00:29 AM UTC 24 |
Oct 03 06:31:31 AM UTC 24 |
64868256621 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/42.alert_handler_lpg_stub_clk.1095648428 |
|
|
Oct 03 05:53:22 AM UTC 24 |
Oct 03 06:31:54 AM UTC 24 |
29265848876 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg_stub_clk.1875395094 |
|
|
Oct 03 06:00:16 AM UTC 24 |
Oct 03 06:31:56 AM UTC 24 |
26592931612 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/41.alert_handler_lpg_stub_clk.530911516 |
|
|
Oct 03 05:51:32 AM UTC 24 |
Oct 03 06:32:02 AM UTC 24 |
37486106581 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg_stub_clk.3653356702 |
|
|
Oct 03 05:45:10 AM UTC 24 |
Oct 03 06:32:06 AM UTC 24 |
37602737716 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/43.alert_handler_stress_all.1912226670 |
|
|
Oct 03 05:55:23 AM UTC 24 |
Oct 03 06:33:42 AM UTC 24 |
117051530674 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg.3020082412 |
|
|
Oct 03 06:07:46 AM UTC 24 |
Oct 03 06:33:54 AM UTC 24 |
14723866426 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg_stub_clk.3771304532 |
|
|
Oct 03 06:07:46 AM UTC 24 |
Oct 03 06:34:04 AM UTC 24 |
43852908478 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg_stub_clk.4065407867 |
|
|
Oct 03 05:39:33 AM UTC 24 |
Oct 03 06:34:07 AM UTC 24 |
47751274417 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg.1243995818 |
|
|
Oct 03 06:09:32 AM UTC 24 |
Oct 03 06:34:34 AM UTC 24 |
89182049002 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_stress_all.1242968017 |
|
|
Oct 03 06:02:36 AM UTC 24 |
Oct 03 06:38:42 AM UTC 24 |
232616849444 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg.1448275638 |
|
|
Oct 03 05:56:44 AM UTC 24 |
Oct 03 06:40:29 AM UTC 24 |
43959822753 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_lpg.1872554551 |
|
|
Oct 03 06:04:02 AM UTC 24 |
Oct 03 06:41:02 AM UTC 24 |
32147140512 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg_stub_clk.107451579 |
|
|
Oct 03 05:47:37 AM UTC 24 |
Oct 03 06:41:35 AM UTC 24 |
58914964554 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/42.alert_handler_entropy.3192532320 |
|
|
Oct 03 05:53:17 AM UTC 24 |
Oct 03 06:41:39 AM UTC 24 |
83118968031 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg_stub_clk.1040292008 |
|
|
Oct 03 05:49:42 AM UTC 24 |
Oct 03 06:43:36 AM UTC 24 |
87912603531 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_lpg_stub_clk.1776546644 |
|
|
Oct 03 06:04:22 AM UTC 24 |
Oct 03 06:43:37 AM UTC 24 |
196053336349 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/42.alert_handler_lpg.923343402 |
|
|
Oct 03 05:53:21 AM UTC 24 |
Oct 03 06:43:40 AM UTC 24 |
180033285488 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/47.alert_handler_entropy.634264581 |
|
|
Oct 03 06:03:40 AM UTC 24 |
Oct 03 06:46:11 AM UTC 24 |
427485900040 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/44.alert_handler_stress_all.2507705767 |
|
|
Oct 03 05:57:38 AM UTC 24 |
Oct 03 06:50:20 AM UTC 24 |
194021248187 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg_stub_clk.3279489827 |
|
|
Oct 03 06:02:32 AM UTC 24 |
Oct 03 06:50:22 AM UTC 24 |
98223760178 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg.3101790085 |
|
|
Oct 03 06:02:27 AM UTC 24 |
Oct 03 06:53:40 AM UTC 24 |
176824549763 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg_stub_clk.1024183761 |
|
|
Oct 03 06:09:41 AM UTC 24 |
Oct 03 06:58:19 AM UTC 24 |
49903084000 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg.2087982986 |
|
|
Oct 03 06:00:12 AM UTC 24 |
Oct 03 07:00:06 AM UTC 24 |
118157865112 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all.2604033789 |
|
|
Oct 03 06:09:42 AM UTC 24 |
Oct 03 07:03:20 AM UTC 24 |
54848276174 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_errors.2000943643 |
|
|
Oct 03 06:11:07 AM UTC 24 |
Oct 03 06:11:22 AM UTC 24 |
749853232 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_intr_test.2695613537 |
|
|
Oct 03 06:11:19 AM UTC 24 |
Oct 03 06:11:23 AM UTC 24 |
12328559 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_hw_reset.1128807514 |
|
|
Oct 03 06:11:23 AM UTC 24 |
Oct 03 06:11:33 AM UTC 24 |
320435083 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_rw.186163476 |
|
|
Oct 03 06:11:23 AM UTC 24 |
Oct 03 06:11:33 AM UTC 24 |
125465497 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_intg_err.1681900993 |
|
|
Oct 03 06:11:11 AM UTC 24 |
Oct 03 06:11:50 AM UTC 24 |
309258753 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_same_csr_outstanding.1597886873 |
|
|
Oct 03 06:11:51 AM UTC 24 |
Oct 03 06:12:23 AM UTC 24 |
684609402 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_mem_rw_with_rand_reset.2890777907 |
|
|
Oct 03 06:12:13 AM UTC 24 |
Oct 03 06:12:23 AM UTC 24 |
223126209 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_errors.204543419 |
|
|
Oct 03 06:12:25 AM UTC 24 |
Oct 03 06:12:55 AM UTC 24 |
1176608606 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_intg_err.2384706864 |
|
|
Oct 03 06:12:55 AM UTC 24 |
Oct 03 06:13:03 AM UTC 24 |
97739390 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_intr_test.4115686958 |
|
|
Oct 03 06:13:03 AM UTC 24 |
Oct 03 06:13:07 AM UTC 24 |
22011713 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_hw_reset.3456601755 |
|
|
Oct 03 06:13:08 AM UTC 24 |
Oct 03 06:13:19 AM UTC 24 |
109752936 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_rw.3056494750 |
|
|
Oct 03 06:13:21 AM UTC 24 |
Oct 03 06:13:28 AM UTC 24 |
22575957 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_aliasing.3312281413 |
|
|
Oct 03 06:11:34 AM UTC 24 |
Oct 03 06:13:50 AM UTC 24 |
1758673912 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_same_csr_outstanding.1391100172 |
|
|
Oct 03 06:13:50 AM UTC 24 |
Oct 03 06:14:14 AM UTC 24 |
555083224 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_bit_bash.4268575313 |
|
|
Oct 03 06:11:34 AM UTC 24 |
Oct 03 06:14:22 AM UTC 24 |
821434702 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_mem_rw_with_rand_reset.3135506357 |
|
|
Oct 03 06:14:15 AM UTC 24 |
Oct 03 06:14:41 AM UTC 24 |
309111839 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_intr_test.267431635 |
|
|
Oct 03 06:14:42 AM UTC 24 |
Oct 03 06:14:46 AM UTC 24 |
20300531 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_hw_reset.144410939 |
|
|
Oct 03 06:14:43 AM UTC 24 |
Oct 03 06:14:49 AM UTC 24 |
73988914 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_rw.2531057577 |
|
|
Oct 03 06:14:47 AM UTC 24 |
Oct 03 06:14:55 AM UTC 24 |
54742149 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_errors.2928200493 |
|
|
Oct 03 06:14:24 AM UTC 24 |
Oct 03 06:14:56 AM UTC 24 |
287233509 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_intg_err.3944660443 |
|
|
Oct 03 06:14:37 AM UTC 24 |
Oct 03 06:15:20 AM UTC 24 |
1841974360 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_mem_rw_with_rand_reset.2299782788 |
|
|
Oct 03 06:15:20 AM UTC 24 |
Oct 03 06:15:37 AM UTC 24 |
70812455 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_same_csr_outstanding.3587550374 |
|
|
Oct 03 06:14:57 AM UTC 24 |
Oct 03 06:15:40 AM UTC 24 |
384774388 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_shadow_reg_errors.3524743849 |
|
|
Oct 03 06:14:24 AM UTC 24 |
Oct 03 06:16:20 AM UTC 24 |
4075892921 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_intr_test.723759849 |
|
|
Oct 03 06:16:32 AM UTC 24 |
Oct 03 06:16:36 AM UTC 24 |
12935692 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_hw_reset.2180759726 |
|
|
Oct 03 06:16:37 AM UTC 24 |
Oct 03 06:16:52 AM UTC 24 |
101656468 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_errors.2704424573 |
|
|
Oct 03 06:16:21 AM UTC 24 |
Oct 03 06:16:54 AM UTC 24 |
446669642 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_rw.3973752659 |
|
|
Oct 03 06:16:53 AM UTC 24 |
Oct 03 06:17:03 AM UTC 24 |
125190564 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_mem_rw_with_rand_reset.413062159 |
|
|
Oct 03 06:17:04 AM UTC 24 |
Oct 03 06:17:26 AM UTC 24 |
155099086 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_intg_err.3743892920 |
|
|
Oct 03 06:16:26 AM UTC 24 |
Oct 03 06:17:28 AM UTC 24 |
446552531 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_errors.4258703041 |
|
|
Oct 03 06:17:27 AM UTC 24 |
Oct 03 06:17:34 AM UTC 24 |
37346625 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_intg_err.2681021465 |
|
|
Oct 03 06:17:28 AM UTC 24 |
Oct 03 06:17:36 AM UTC 24 |
211330673 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_intr_test.948578567 |
|
|
Oct 03 06:17:34 AM UTC 24 |
Oct 03 06:17:38 AM UTC 24 |
12320776 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_same_csr_outstanding.2508758327 |
|
|
Oct 03 06:16:58 AM UTC 24 |
Oct 03 06:17:40 AM UTC 24 |
533475170 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_aliasing.1174995546 |
|
|
Oct 03 06:14:56 AM UTC 24 |
Oct 03 06:17:43 AM UTC 24 |
1676244607 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_rw.2884458999 |
|
|
Oct 03 06:17:39 AM UTC 24 |
Oct 03 06:17:45 AM UTC 24 |
66457390 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_hw_reset.1016092732 |
|
|
Oct 03 06:17:37 AM UTC 24 |
Oct 03 06:17:55 AM UTC 24 |
754487326 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_shadow_reg_errors.1622648835 |
|
|
Oct 03 06:10:37 AM UTC 24 |
Oct 03 06:18:00 AM UTC 24 |
5082800785 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_aliasing.4037481020 |
|
|
Oct 03 06:16:54 AM UTC 24 |
Oct 03 06:18:09 AM UTC 24 |
550220388 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_mem_rw_with_rand_reset.3487603089 |
|
|
Oct 03 06:17:56 AM UTC 24 |
Oct 03 06:18:11 AM UTC 24 |
128425278 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_shadow_reg_errors.3700185192 |
|
|
Oct 03 06:15:41 AM UTC 24 |
Oct 03 06:18:19 AM UTC 24 |
1888032851 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_same_csr_outstanding.492182834 |
|
|
Oct 03 06:17:46 AM UTC 24 |
Oct 03 06:18:21 AM UTC 24 |
1234781597 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_errors.2954376043 |
|
|
Oct 03 06:18:12 AM UTC 24 |
Oct 03 06:18:23 AM UTC 24 |
182613080 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_intr_test.1922585448 |
|
|
Oct 03 06:18:22 AM UTC 24 |
Oct 03 06:18:25 AM UTC 24 |
10098031 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_intg_err.3466481574 |
|
|
Oct 03 06:18:20 AM UTC 24 |
Oct 03 06:18:26 AM UTC 24 |
43855145 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_rw.99155323 |
|
|
Oct 03 06:18:24 AM UTC 24 |
Oct 03 06:18:34 AM UTC 24 |
66866057 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_mem_rw_with_rand_reset.3866925369 |
|
|
Oct 03 06:18:26 AM UTC 24 |
Oct 03 06:18:40 AM UTC 24 |
382195996 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_same_csr_outstanding.1425588361 |
|
|
Oct 03 06:18:26 AM UTC 24 |
Oct 03 06:18:48 AM UTC 24 |
275628043 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_errors.713778542 |
|
|
Oct 03 06:18:41 AM UTC 24 |
Oct 03 06:18:50 AM UTC 24 |
66744710 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_intr_test.3468295776 |
|
|
Oct 03 06:18:51 AM UTC 24 |
Oct 03 06:18:54 AM UTC 24 |
99683387 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_intg_err.1550734680 |
|
|
Oct 03 06:18:49 AM UTC 24 |
Oct 03 06:18:58 AM UTC 24 |
86334683 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_rw.2377022988 |
|
|
Oct 03 06:18:55 AM UTC 24 |
Oct 03 06:19:03 AM UTC 24 |
121791168 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_bit_bash.139222061 |
|
|
Oct 03 06:13:29 AM UTC 24 |
Oct 03 06:19:16 AM UTC 24 |
11932190174 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_bit_bash.4192077176 |
|
|
Oct 03 06:14:50 AM UTC 24 |
Oct 03 06:19:26 AM UTC 24 |
4538666224 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_mem_rw_with_rand_reset.3544999655 |
|
|
Oct 03 06:19:07 AM UTC 24 |
Oct 03 06:19:27 AM UTC 24 |
602276718 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_intr_test.3819984188 |
|
|
Oct 03 06:19:29 AM UTC 24 |
Oct 03 06:19:32 AM UTC 24 |
10595398 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_same_csr_outstanding.1946503064 |
|
|
Oct 03 06:18:59 AM UTC 24 |
Oct 03 06:19:42 AM UTC 24 |
332286552 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_aliasing.4294187915 |
|
|
Oct 03 06:13:47 AM UTC 24 |
Oct 03 06:19:47 AM UTC 24 |
17580016288 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_rw.905918966 |
|
|
Oct 03 06:19:33 AM UTC 24 |
Oct 03 06:19:49 AM UTC 24 |
492854203 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_errors.2505196260 |
|
|
Oct 03 06:19:17 AM UTC 24 |
Oct 03 06:19:53 AM UTC 24 |
1149027919 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_mem_rw_with_rand_reset.4145143662 |
|
|
Oct 03 06:19:43 AM UTC 24 |
Oct 03 06:19:53 AM UTC 24 |
60224787 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_intg_err.818140587 |
|
|
Oct 03 06:19:27 AM UTC 24 |
Oct 03 06:20:07 AM UTC 24 |
459809577 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_intr_test.542501384 |
|
|
Oct 03 06:20:08 AM UTC 24 |
Oct 03 06:20:12 AM UTC 24 |
16014199 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_errors.2467455485 |
|
|
Oct 03 06:19:54 AM UTC 24 |
Oct 03 06:20:14 AM UTC 24 |
1325479032 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_rw.3479624197 |
|
|
Oct 03 06:20:11 AM UTC 24 |
Oct 03 06:20:17 AM UTC 24 |
34639938 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_rw.311183954 |
|
|
Oct 03 06:20:36 AM UTC 24 |
Oct 03 06:20:46 AM UTC 24 |
34109095 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_same_csr_outstanding.933885637 |
|
|
Oct 03 06:19:37 AM UTC 24 |
Oct 03 06:20:19 AM UTC 24 |
341967546 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_mem_rw_with_rand_reset.962337700 |
|
|
Oct 03 06:20:15 AM UTC 24 |
Oct 03 06:20:27 AM UTC 24 |
377805981 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_shadow_reg_errors_with_csr_rw.751230437 |
|
|
Oct 03 06:10:18 AM UTC 24 |
Oct 03 06:20:29 AM UTC 24 |
6061577908 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_intr_test.489297879 |
|
|
Oct 03 06:20:31 AM UTC 24 |
Oct 03 06:20:35 AM UTC 24 |
9577140 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_intg_err.1773490349 |
|
|
Oct 03 06:20:31 AM UTC 24 |
Oct 03 06:20:37 AM UTC 24 |
114795622 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_same_csr_outstanding.50062671 |
|
|
Oct 03 06:20:13 AM UTC 24 |
Oct 03 06:20:49 AM UTC 24 |
2261195254 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_errors.2207254206 |
|
|
Oct 03 06:20:28 AM UTC 24 |
Oct 03 06:20:56 AM UTC 24 |
245920403 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_mem_rw_with_rand_reset.2952498301 |
|
|
Oct 03 06:20:47 AM UTC 24 |
Oct 03 06:20:59 AM UTC 24 |
180133383 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_errors.3760573769 |
|
|
Oct 03 06:21:00 AM UTC 24 |
Oct 03 06:21:12 AM UTC 24 |
142880879 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_same_csr_outstanding.3145228322 |
|
|
Oct 03 06:20:38 AM UTC 24 |
Oct 03 06:21:12 AM UTC 24 |
258803337 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_intr_test.2809205595 |
|
|
Oct 03 06:21:13 AM UTC 24 |
Oct 03 06:21:16 AM UTC 24 |
33439690 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_rw.3280067013 |
|
|
Oct 03 06:21:18 AM UTC 24 |
Oct 03 06:21:26 AM UTC 24 |
355210442 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_intg_err.456681818 |
|
|
Oct 03 06:19:54 AM UTC 24 |
Oct 03 06:21:27 AM UTC 24 |
1048991687 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_shadow_reg_errors.3889778619 |
|
|
Oct 03 06:12:24 AM UTC 24 |
Oct 03 06:21:40 AM UTC 24 |
8534904894 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_mem_rw_with_rand_reset.2873594139 |
|
|
Oct 03 06:21:28 AM UTC 24 |
Oct 03 06:21:49 AM UTC 24 |
590530131 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_same_csr_outstanding.3793499218 |
|
|
Oct 03 06:21:18 AM UTC 24 |
Oct 03 06:22:02 AM UTC 24 |
4539766982 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_intg_err.967207679 |
|
|
Oct 03 06:22:03 AM UTC 24 |
Oct 03 06:22:09 AM UTC 24 |
379328228 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_intg_err.4071373778 |
|
|
Oct 03 06:21:13 AM UTC 24 |
Oct 03 06:22:10 AM UTC 24 |
1254074065 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_intr_test.2126976976 |
|
|
Oct 03 06:22:08 AM UTC 24 |
Oct 03 06:22:11 AM UTC 24 |
14672686 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_errors.4238323782 |
|
|
Oct 03 06:21:50 AM UTC 24 |
Oct 03 06:22:12 AM UTC 24 |
950287408 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_rw.1538174824 |
|
|
Oct 03 06:22:09 AM UTC 24 |
Oct 03 06:22:24 AM UTC 24 |
285573847 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_mem_rw_with_rand_reset.1732709819 |
|
|
Oct 03 06:22:13 AM UTC 24 |
Oct 03 06:22:28 AM UTC 24 |
650856110 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_shadow_reg_errors.770606247 |
|
|
Oct 03 06:20:56 AM UTC 24 |
Oct 03 06:22:38 AM UTC 24 |
1798738622 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_same_csr_outstanding.3937827104 |
|
|
Oct 03 06:22:11 AM UTC 24 |
Oct 03 06:22:49 AM UTC 24 |
654118319 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_errors.1918586471 |
|
|
Oct 03 06:22:29 AM UTC 24 |
Oct 03 06:22:49 AM UTC 24 |
154297358 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_bit_bash.3665857249 |
|
|
Oct 03 06:16:53 AM UTC 24 |
Oct 03 06:22:51 AM UTC 24 |
4469162069 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_intr_test.2750585984 |
|
|
Oct 03 06:22:50 AM UTC 24 |
Oct 03 06:22:52 AM UTC 24 |
10838741 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_rw.1332657567 |
|
|
Oct 03 06:22:50 AM UTC 24 |
Oct 03 06:22:59 AM UTC 24 |
118906268 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_mem_rw_with_rand_reset.1813068724 |
|
|
Oct 03 06:22:54 AM UTC 24 |
Oct 03 06:23:11 AM UTC 24 |
549076716 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_shadow_reg_errors.3914401104 |
|
|
Oct 03 06:18:35 AM UTC 24 |
Oct 03 06:23:12 AM UTC 24 |
2550833680 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_intg_err.434217361 |
|
|
Oct 03 06:22:39 AM UTC 24 |
Oct 03 06:23:23 AM UTC 24 |
862071872 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_errors.2419171635 |
|
|
Oct 03 06:23:13 AM UTC 24 |
Oct 03 06:23:25 AM UTC 24 |
64622756 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_intr_test.3021828646 |
|
|
Oct 03 06:23:26 AM UTC 24 |
Oct 03 06:23:29 AM UTC 24 |
11471695 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_same_csr_outstanding.2566352837 |
|
|
Oct 03 06:22:52 AM UTC 24 |
Oct 03 06:23:30 AM UTC 24 |
220567838 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_shadow_reg_errors.2389845821 |
|
|
Oct 03 06:21:41 AM UTC 24 |
Oct 03 06:23:37 AM UTC 24 |
3500898110 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_rw.3689314162 |
|
|
Oct 03 06:23:30 AM UTC 24 |
Oct 03 06:23:39 AM UTC 24 |
105352019 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_shadow_reg_errors.1638328406 |
|
|
Oct 03 06:18:11 AM UTC 24 |
Oct 03 06:23:40 AM UTC 24 |
7381895220 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_shadow_reg_errors.2499224560 |
|
|
Oct 03 06:19:50 AM UTC 24 |
Oct 03 06:23:40 AM UTC 24 |
6445321404 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_mem_rw_with_rand_reset.4235704783 |
|
|
Oct 03 06:23:37 AM UTC 24 |
Oct 03 06:23:45 AM UTC 24 |
57712551 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_intg_err.1171890032 |
|
|
Oct 03 06:23:41 AM UTC 24 |
Oct 03 06:23:47 AM UTC 24 |
34604751 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_intr_test.4098173501 |
|
|
Oct 03 06:23:45 AM UTC 24 |
Oct 03 06:23:48 AM UTC 24 |
14172603 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_errors.1944506909 |
|
|
Oct 03 06:23:41 AM UTC 24 |
Oct 03 06:23:53 AM UTC 24 |
563182263 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_rw.158258287 |
|
|
Oct 03 06:23:48 AM UTC 24 |
Oct 03 06:23:57 AM UTC 24 |
188698287 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_shadow_reg_errors_with_csr_rw.3517552396 |
|
|
Oct 03 06:12:24 AM UTC 24 |
Oct 03 06:24:07 AM UTC 24 |
8431023584 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_same_csr_outstanding.3501640025 |
|
|
Oct 03 06:23:31 AM UTC 24 |
Oct 03 06:24:08 AM UTC 24 |
526958527 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_mem_rw_with_rand_reset.3162416698 |
|
|
Oct 03 06:23:54 AM UTC 24 |
Oct 03 06:24:12 AM UTC 24 |
890927740 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_shadow_reg_errors.1410182996 |
|
|
Oct 03 06:19:07 AM UTC 24 |
Oct 03 06:24:17 AM UTC 24 |
2756069423 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_aliasing.997161058 |
|
|
Oct 03 06:17:44 AM UTC 24 |
Oct 03 06:24:20 AM UTC 24 |
9573656262 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_intg_err.864802089 |
|
|
Oct 03 06:24:13 AM UTC 24 |
Oct 03 06:24:21 AM UTC 24 |
107369298 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_intr_test.2256097043 |
|
|
Oct 03 06:24:18 AM UTC 24 |
Oct 03 06:24:21 AM UTC 24 |
8248828 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_errors.3597183258 |
|
|
Oct 03 06:24:09 AM UTC 24 |
Oct 03 06:24:25 AM UTC 24 |
385730668 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_same_csr_outstanding.196862414 |
|
|
Oct 03 06:23:50 AM UTC 24 |
Oct 03 06:24:26 AM UTC 24 |
257341656 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_rw.1177404075 |
|
|
Oct 03 06:24:22 AM UTC 24 |
Oct 03 06:24:31 AM UTC 24 |
59216389 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_mem_rw_with_rand_reset.737568748 |
|
|
Oct 03 06:24:22 AM UTC 24 |
Oct 03 06:24:46 AM UTC 24 |
201097283 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_errors.121165077 |
|
|
Oct 03 06:24:32 AM UTC 24 |
Oct 03 06:24:51 AM UTC 24 |
671545505 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_intr_test.1648184048 |
|
|
Oct 03 06:24:48 AM UTC 24 |
Oct 03 06:24:52 AM UTC 24 |
6785210 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_shadow_reg_errors.4229103866 |
|
|
Oct 03 06:22:25 AM UTC 24 |
Oct 03 06:24:52 AM UTC 24 |
902632466 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_shadow_reg_errors.2790366478 |
|
|
Oct 03 06:23:12 AM UTC 24 |
Oct 03 06:24:59 AM UTC 24 |
3324564029 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_bit_bash.2468875888 |
|
|
Oct 03 06:17:41 AM UTC 24 |
Oct 03 06:25:00 AM UTC 24 |
30827232297 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_rw.2915874621 |
|
|
Oct 03 06:24:52 AM UTC 24 |
Oct 03 06:25:01 AM UTC 24 |
34985453 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_mem_rw_with_rand_reset.1256126576 |
|
|
Oct 03 06:24:53 AM UTC 24 |
Oct 03 06:25:03 AM UTC 24 |
83640280 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_tl_intg_err.1701971243 |
|
|
Oct 03 06:25:03 AM UTC 24 |
Oct 03 06:25:09 AM UTC 24 |
44732042 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_intr_test.825217184 |
|
|
Oct 03 06:25:10 AM UTC 24 |
Oct 03 06:25:13 AM UTC 24 |
9647413 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_tl_errors.548924031 |
|
|
Oct 03 06:25:02 AM UTC 24 |
Oct 03 06:25:17 AM UTC 24 |
242714604 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_intg_err.295055648 |
|
|
Oct 03 06:24:47 AM UTC 24 |
Oct 03 06:25:17 AM UTC 24 |
1144187258 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_csr_rw.766676280 |
|
|
Oct 03 06:25:15 AM UTC 24 |
Oct 03 06:25:24 AM UTC 24 |
238117007 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_10_02/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_intg_err.2354387104 |
|
|
Oct 03 06:23:23 AM UTC 24 |
Oct 03 06:25:27 AM UTC 24 |
13211533499 ps |