T608 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_sig_int_fail.2794860877 |
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Oct 12 10:21:21 AM UTC 24 |
Oct 12 10:21:30 AM UTC 24 |
72897091 ps |
T252 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/41.alert_handler_stress_all_with_rand_reset.3558677288 |
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Oct 12 10:17:39 AM UTC 24 |
Oct 12 10:21:49 AM UTC 24 |
4085782191 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_random_classes.4245984443 |
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Oct 12 10:21:16 AM UTC 24 |
Oct 12 10:21:53 AM UTC 24 |
1416737866 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/36.alert_handler_lpg_stub_clk.3008072749 |
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Oct 12 10:06:10 AM UTC 24 |
Oct 12 10:22:29 AM UTC 24 |
19725544665 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/23.alert_handler_stress_all.2562961757 |
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Oct 12 09:41:19 AM UTC 24 |
Oct 12 10:22:34 AM UTC 24 |
170503243341 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg_stub_clk.800839093 |
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Oct 12 10:04:26 AM UTC 24 |
Oct 12 10:22:38 AM UTC 24 |
52119433251 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_esc_intr_timeout.586258782 |
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Oct 12 10:21:17 AM UTC 24 |
Oct 12 10:22:44 AM UTC 24 |
5371697239 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_stress_all.630929555 |
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Oct 12 10:21:54 AM UTC 24 |
Oct 12 10:22:47 AM UTC 24 |
444520354 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/41.alert_handler_ping_timeout.3102632955 |
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Oct 12 10:17:07 AM UTC 24 |
Oct 12 10:22:48 AM UTC 24 |
31171429127 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_classes.667752508 |
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Oct 12 10:22:45 AM UTC 24 |
Oct 12 10:22:55 AM UTC 24 |
125070282 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_esc_alert_accum.2615157459 |
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Oct 12 10:21:17 AM UTC 24 |
Oct 12 10:22:56 AM UTC 24 |
4354024570 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_random_alerts.3749764658 |
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Oct 12 10:22:40 AM UTC 24 |
Oct 12 10:22:56 AM UTC 24 |
124049991 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/34.alert_handler_lpg_stub_clk.3492618690 |
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Oct 12 10:03:42 AM UTC 24 |
Oct 12 10:23:02 AM UTC 24 |
45543982701 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_ping_timeout.240473463 |
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Oct 12 10:21:31 AM UTC 24 |
Oct 12 10:23:06 AM UTC 24 |
9752748558 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_intr_timeout.2360564887 |
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Oct 12 10:22:48 AM UTC 24 |
Oct 12 10:23:08 AM UTC 24 |
291983791 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_smoke.1243147314 |
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Oct 12 10:22:37 AM UTC 24 |
Oct 12 10:23:09 AM UTC 24 |
311801065 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/32.alert_handler_entropy.1538693585 |
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Oct 12 10:00:35 AM UTC 24 |
Oct 12 10:23:35 AM UTC 24 |
49591671682 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_smoke.1678594954 |
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Oct 12 10:23:16 AM UTC 24 |
Oct 12 10:23:44 AM UTC 24 |
932966552 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_alerts.3386005024 |
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Oct 12 10:23:37 AM UTC 24 |
Oct 12 10:24:13 AM UTC 24 |
2039797579 ps |
T248 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_sig_int_fail.1547704223 |
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Oct 12 10:22:57 AM UTC 24 |
Oct 12 10:24:18 AM UTC 24 |
848987717 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/39.alert_handler_entropy.423632790 |
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Oct 12 10:12:03 AM UTC 24 |
Oct 12 10:24:33 AM UTC 24 |
31781723710 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_random_classes.4268285583 |
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Oct 12 10:23:45 AM UTC 24 |
Oct 12 10:24:49 AM UTC 24 |
1399830227 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_esc_alert_accum.756710283 |
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Oct 12 10:22:49 AM UTC 24 |
Oct 12 10:24:52 AM UTC 24 |
1492179864 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_sig_int_fail.1608137168 |
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Oct 12 10:24:19 AM UTC 24 |
Oct 12 10:24:59 AM UTC 24 |
958273476 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_intr_timeout.1802338987 |
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Oct 12 10:24:04 AM UTC 24 |
Oct 12 10:25:07 AM UTC 24 |
3143911781 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/42.alert_handler_ping_timeout.1831467354 |
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Oct 12 10:18:16 AM UTC 24 |
Oct 12 10:25:13 AM UTC 24 |
10525696786 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_smoke.3706156408 |
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Oct 12 10:25:14 AM UTC 24 |
Oct 12 10:25:32 AM UTC 24 |
120309171 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_ping_timeout.842311060 |
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Oct 12 10:22:57 AM UTC 24 |
Oct 12 10:25:36 AM UTC 24 |
13980185311 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_alerts.4003628056 |
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Oct 12 10:25:32 AM UTC 24 |
Oct 12 10:25:41 AM UTC 24 |
63837167 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_esc_alert_accum.535253202 |
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Oct 12 10:24:14 AM UTC 24 |
Oct 12 10:25:42 AM UTC 24 |
1022621483 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_random_classes.3753922308 |
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Oct 12 10:25:37 AM UTC 24 |
Oct 12 10:25:59 AM UTC 24 |
401091448 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_intr_timeout.4163839387 |
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Oct 12 10:25:41 AM UTC 24 |
Oct 12 10:26:10 AM UTC 24 |
331792739 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/28.alert_handler_entropy.1736170237 |
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Oct 12 09:52:01 AM UTC 24 |
Oct 12 10:26:20 AM UTC 24 |
28520246796 ps |
T246 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_sig_int_fail.2547810165 |
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Oct 12 10:26:00 AM UTC 24 |
Oct 12 10:27:06 AM UTC 24 |
2149698539 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_esc_alert_accum.2859472127 |
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Oct 12 10:25:44 AM UTC 24 |
Oct 12 10:27:36 AM UTC 24 |
2746995014 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/41.alert_handler_lpg_stub_clk.1336741546 |
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Oct 12 10:17:25 AM UTC 24 |
Oct 12 10:27:47 AM UTC 24 |
12761101332 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/38.alert_handler_stress_all.1282698817 |
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Oct 12 10:10:43 AM UTC 24 |
Oct 12 10:28:20 AM UTC 24 |
11248165521 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/26.alert_handler_lpg_stub_clk.476884079 |
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Oct 12 09:46:43 AM UTC 24 |
Oct 12 10:29:08 AM UTC 24 |
171629451832 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/43.alert_handler_ping_timeout.636344512 |
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Oct 12 10:20:09 AM UTC 24 |
Oct 12 10:29:17 AM UTC 24 |
50428959127 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_smoke.4024694433 |
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Oct 12 10:28:58 AM UTC 24 |
Oct 12 10:29:25 AM UTC 24 |
250735093 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_classes.4042139760 |
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Oct 12 10:29:18 AM UTC 24 |
Oct 12 10:29:30 AM UTC 24 |
238436639 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_random_alerts.3631250982 |
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Oct 12 10:29:10 AM UTC 24 |
Oct 12 10:29:40 AM UTC 24 |
1054835062 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/36.alert_handler_lpg.687813868 |
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Oct 12 10:05:48 AM UTC 24 |
Oct 12 10:29:48 AM UTC 24 |
49697021512 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_intr_timeout.1903555509 |
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Oct 12 10:29:26 AM UTC 24 |
Oct 12 10:29:51 AM UTC 24 |
465284876 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_esc_alert_accum.395708118 |
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Oct 12 10:29:31 AM UTC 24 |
Oct 12 10:30:13 AM UTC 24 |
1367068751 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_sig_int_fail.3828032208 |
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Oct 12 10:29:41 AM UTC 24 |
Oct 12 10:30:17 AM UTC 24 |
1700483565 ps |
T361 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/34.alert_handler_lpg.890425966 |
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Oct 12 10:03:36 AM UTC 24 |
Oct 12 10:30:24 AM UTC 24 |
22353526470 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_ping_timeout.4147467350 |
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Oct 12 10:24:50 AM UTC 24 |
Oct 12 10:30:56 AM UTC 24 |
195211765608 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg_stub_clk.3171020810 |
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Oct 12 10:12:38 AM UTC 24 |
Oct 12 10:31:02 AM UTC 24 |
19871980957 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/35.alert_handler_entropy.3610463934 |
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Oct 12 10:04:20 AM UTC 24 |
Oct 12 10:31:14 AM UTC 24 |
52038248285 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all.1295458175 |
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Oct 12 10:27:49 AM UTC 24 |
Oct 12 10:31:15 AM UTC 24 |
7976703213 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_alerts.2055730709 |
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Oct 12 10:31:16 AM UTC 24 |
Oct 12 10:31:27 AM UTC 24 |
445830045 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_smoke.124250160 |
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Oct 12 10:31:05 AM UTC 24 |
Oct 12 10:31:36 AM UTC 24 |
2047045349 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/28.alert_handler_stress_all.2265558804 |
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Oct 12 09:52:37 AM UTC 24 |
Oct 12 10:31:46 AM UTC 24 |
37901777947 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_intr_timeout.464974229 |
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Oct 12 10:31:28 AM UTC 24 |
Oct 12 10:31:49 AM UTC 24 |
495243066 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_random_classes.2803786482 |
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Oct 12 10:31:16 AM UTC 24 |
Oct 12 10:31:59 AM UTC 24 |
1557368608 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg.1054823267 |
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Oct 12 10:10:26 AM UTC 24 |
Oct 12 10:32:01 AM UTC 24 |
62580789599 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_sig_int_fail.3135486879 |
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Oct 12 10:31:49 AM UTC 24 |
Oct 12 10:32:16 AM UTC 24 |
461767173 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_stress_all_with_rand_reset.2897414580 |
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Oct 12 10:28:23 AM UTC 24 |
Oct 12 10:32:21 AM UTC 24 |
5199758413 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/24.alert_handler_stress_all.1798083708 |
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Oct 12 09:43:42 AM UTC 24 |
Oct 12 10:32:26 AM UTC 24 |
181617853471 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_esc_alert_accum.86021687 |
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Oct 12 10:31:37 AM UTC 24 |
Oct 12 10:32:41 AM UTC 24 |
661381359 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all.3281344633 |
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Oct 12 10:32:22 AM UTC 24 |
Oct 12 10:32:56 AM UTC 24 |
433182724 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/30.alert_handler_lpg_stub_clk.3113503292 |
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Oct 12 09:56:12 AM UTC 24 |
Oct 12 10:33:18 AM UTC 24 |
36597107085 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/32.alert_handler_lpg_stub_clk.3314004550 |
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Oct 12 10:00:51 AM UTC 24 |
Oct 12 10:33:33 AM UTC 24 |
34337274465 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/42.alert_handler_entropy.1725615787 |
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Oct 12 10:18:11 AM UTC 24 |
Oct 12 10:34:41 AM UTC 24 |
79550379753 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/26.alert_handler_lpg.1833601409 |
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Oct 12 09:46:38 AM UTC 24 |
Oct 12 10:34:44 AM UTC 24 |
53414733284 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/38.alert_handler_lpg_stub_clk.2121928509 |
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Oct 12 10:10:36 AM UTC 24 |
Oct 12 10:34:49 AM UTC 24 |
10679460118 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_stress_all_with_rand_reset.3306242528 |
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Oct 12 10:32:29 AM UTC 24 |
Oct 12 10:35:10 AM UTC 24 |
1746843053 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_stress_all_with_rand_reset.3909955766 |
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Oct 12 10:30:57 AM UTC 24 |
Oct 12 10:35:40 AM UTC 24 |
7675945895 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/36.alert_handler_entropy.1035774524 |
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Oct 12 10:05:26 AM UTC 24 |
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103488745311 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_stress_all.3565911361 |
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Oct 12 10:23:08 AM UTC 24 |
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35598585327 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg_stub_clk.2620933423 |
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Oct 12 10:21:50 AM UTC 24 |
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13660445666 ps |
T672 |
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Oct 12 10:26:22 AM UTC 24 |
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222235494122 ps |
T673 |
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Oct 12 10:31:59 AM UTC 24 |
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21044890626 ps |
T674 |
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Oct 12 10:17:24 AM UTC 24 |
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81734284785 ps |
T366 |
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Oct 12 09:54:28 AM UTC 24 |
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46146166765 ps |
T675 |
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Oct 12 10:22:57 AM UTC 24 |
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7954248024 ps |
T283 |
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Oct 12 10:20:16 AM UTC 24 |
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10747835307 ps |
T676 |
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Oct 12 10:24:35 AM UTC 24 |
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13719655547 ps |
T677 |
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Oct 12 10:29:51 AM UTC 24 |
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92497220343 ps |
T678 |
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Oct 12 10:27:37 AM UTC 24 |
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9342793983 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg_stub_clk.664263287 |
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Oct 12 10:14:55 AM UTC 24 |
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18395219861 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/37.alert_handler_lpg.1578187556 |
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Oct 12 10:07:31 AM UTC 24 |
Oct 12 10:43:00 AM UTC 24 |
133935077583 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_lpg.2882807692 |
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Oct 12 10:27:07 AM UTC 24 |
Oct 12 10:43:34 AM UTC 24 |
11601970942 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/37.alert_handler_lpg_stub_clk.1179244823 |
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Oct 12 10:07:31 AM UTC 24 |
Oct 12 10:44:46 AM UTC 24 |
440986236583 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg_stub_clk.1789446466 |
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Oct 12 10:24:53 AM UTC 24 |
Oct 12 10:45:00 AM UTC 24 |
13360676275 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/34.alert_handler_entropy.1081878340 |
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Oct 12 10:03:23 AM UTC 24 |
Oct 12 10:46:03 AM UTC 24 |
37719364947 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/30.alert_handler_entropy.2424581104 |
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Oct 12 09:55:46 AM UTC 24 |
Oct 12 10:46:19 AM UTC 24 |
92090216259 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/42.alert_handler_lpg_stub_clk.3506589758 |
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Oct 12 10:18:28 AM UTC 24 |
Oct 12 10:46:20 AM UTC 24 |
30730393835 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/33.alert_handler_lpg_stub_clk.3664591200 |
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Oct 12 10:02:07 AM UTC 24 |
Oct 12 10:47:17 AM UTC 24 |
79268975783 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg_stub_clk.1273171618 |
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Oct 12 10:30:18 AM UTC 24 |
Oct 12 10:48:49 AM UTC 24 |
16106049901 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_lpg.2485183164 |
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Oct 12 10:21:32 AM UTC 24 |
Oct 12 10:49:03 AM UTC 24 |
52616728645 ps |
T245 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/29.alert_handler_stress_all.1035314767 |
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Oct 12 09:54:43 AM UTC 24 |
Oct 12 10:50:47 AM UTC 24 |
210696058645 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/37.alert_handler_entropy.1398300822 |
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Oct 12 10:07:21 AM UTC 24 |
Oct 12 10:50:54 AM UTC 24 |
227170149031 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/41.alert_handler_entropy.3673563568 |
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Oct 12 10:17:03 AM UTC 24 |
Oct 12 10:50:56 AM UTC 24 |
26109578520 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg.1430596231 |
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Oct 12 10:32:03 AM UTC 24 |
Oct 12 10:51:47 AM UTC 24 |
20079893839 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/22.alert_handler_stress_all.2440494609 |
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Oct 12 09:39:45 AM UTC 24 |
Oct 12 10:54:26 AM UTC 24 |
82320145287 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/33.alert_handler_lpg.3828096727 |
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Oct 12 10:01:51 AM UTC 24 |
Oct 12 10:55:22 AM UTC 24 |
900481538366 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/38.alert_handler_entropy.537521590 |
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Oct 12 10:10:14 AM UTC 24 |
Oct 12 10:55:38 AM UTC 24 |
197235791182 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_lpg.2954765157 |
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Oct 12 10:30:14 AM UTC 24 |
Oct 12 10:55:50 AM UTC 24 |
16284648456 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/40.alert_handler_entropy.3603847789 |
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Oct 12 10:14:35 AM UTC 24 |
Oct 12 10:57:24 AM UTC 24 |
147554855380 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_stress_all.2311917740 |
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Oct 12 10:30:26 AM UTC 24 |
Oct 12 10:58:11 AM UTC 24 |
33174775816 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_entropy.4151200189 |
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Oct 12 10:31:49 AM UTC 24 |
Oct 12 10:58:40 AM UTC 24 |
94262807123 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg_stub_clk.2527111964 |
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Oct 12 10:20:16 AM UTC 24 |
Oct 12 10:59:08 AM UTC 24 |
563502721944 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/43.alert_handler_entropy.2549036631 |
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Oct 12 10:20:02 AM UTC 24 |
Oct 12 11:00:13 AM UTC 24 |
172433683958 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/35.alert_handler_stress_all.2076581545 |
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Oct 12 10:04:30 AM UTC 24 |
Oct 12 11:00:33 AM UTC 24 |
181655224144 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/43.alert_handler_lpg.461424666 |
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Oct 12 10:20:15 AM UTC 24 |
Oct 12 11:01:24 AM UTC 24 |
33975025338 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/39.alert_handler_lpg.2489558264 |
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Oct 12 10:12:35 AM UTC 24 |
Oct 12 11:03:12 AM UTC 24 |
55571989750 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/35.alert_handler_lpg.3624550876 |
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Oct 12 10:04:25 AM UTC 24 |
Oct 12 11:03:14 AM UTC 24 |
68529996623 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/40.alert_handler_lpg.373431179 |
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|
Oct 12 10:14:49 AM UTC 24 |
Oct 12 11:03:25 AM UTC 24 |
162814981824 ps |
T243 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/40.alert_handler_stress_all.724191632 |
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Oct 12 10:15:29 AM UTC 24 |
Oct 12 11:03:35 AM UTC 24 |
97129202344 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_stress_all.3742671035 |
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Oct 12 10:25:01 AM UTC 24 |
Oct 12 11:03:45 AM UTC 24 |
43698913282 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/44.alert_handler_entropy.1279727478 |
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|
Oct 12 10:21:24 AM UTC 24 |
Oct 12 11:04:10 AM UTC 24 |
38957024529 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/31.alert_handler_stress_all.125146496 |
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|
Oct 12 09:58:41 AM UTC 24 |
Oct 12 11:08:04 AM UTC 24 |
126185243840 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/39.alert_handler_stress_all.1876660470 |
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Oct 12 10:12:58 AM UTC 24 |
Oct 12 11:08:11 AM UTC 24 |
274889777416 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/47.alert_handler_entropy.1043999964 |
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|
Oct 12 10:26:11 AM UTC 24 |
Oct 12 11:10:35 AM UTC 24 |
83000036013 ps |
T249 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/42.alert_handler_stress_all.2954517359 |
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|
Oct 12 10:18:52 AM UTC 24 |
Oct 12 11:10:51 AM UTC 24 |
102426253144 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg_stub_clk.2280622447 |
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|
Oct 12 10:23:06 AM UTC 24 |
Oct 12 11:14:15 AM UTC 24 |
273531973527 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/48.alert_handler_entropy.564745481 |
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|
Oct 12 10:29:50 AM UTC 24 |
Oct 12 11:16:08 AM UTC 24 |
38882866183 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/49.alert_handler_lpg_stub_clk.1657383009 |
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|
Oct 12 10:32:17 AM UTC 24 |
Oct 12 11:16:24 AM UTC 24 |
159644428826 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/45.alert_handler_lpg.3070802600 |
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|
Oct 12 10:23:04 AM UTC 24 |
Oct 12 11:17:29 AM UTC 24 |
51833553111 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/46.alert_handler_lpg.3619529756 |
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|
Oct 12 10:24:52 AM UTC 24 |
Oct 12 11:20:09 AM UTC 24 |
102427769350 ps |
T247 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/default/41.alert_handler_stress_all.409475941 |
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|
Oct 12 10:17:32 AM UTC 24 |
Oct 12 11:26:11 AM UTC 24 |
253429148772 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_errors.2312399252 |
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|
Oct 12 11:04:12 AM UTC 24 |
Oct 12 11:04:26 AM UTC 24 |
84168754 ps |
T194 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_tl_intg_err.4041274834 |
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|
Oct 12 11:04:26 AM UTC 24 |
Oct 12 11:04:54 AM UTC 24 |
256586058 ps |
T197 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_intr_test.2594832596 |
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|
Oct 12 11:04:55 AM UTC 24 |
Oct 12 11:04:58 AM UTC 24 |
8244041 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_hw_reset.3324369982 |
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|
Oct 12 11:04:59 AM UTC 24 |
Oct 12 11:05:07 AM UTC 24 |
353927642 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_rw.2016806054 |
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|
Oct 12 11:05:08 AM UTC 24 |
Oct 12 11:05:15 AM UTC 24 |
126209274 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_shadow_reg_errors.1568832643 |
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|
Oct 12 11:03:48 AM UTC 24 |
Oct 12 11:07:35 AM UTC 24 |
6646544719 ps |
T211 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_mem_rw_with_rand_reset.3854477510 |
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|
Oct 12 11:08:13 AM UTC 24 |
Oct 12 11:08:22 AM UTC 24 |
76283425 ps |
T158 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_same_csr_outstanding.2986603281 |
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|
Oct 12 11:08:07 AM UTC 24 |
Oct 12 11:08:28 AM UTC 24 |
269194432 ps |
T151 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_aliasing.3291373964 |
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|
Oct 12 11:07:36 AM UTC 24 |
Oct 12 11:10:12 AM UTC 24 |
2156407104 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_errors.2664308793 |
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|
Oct 12 11:10:13 AM UTC 24 |
Oct 12 11:10:41 AM UTC 24 |
311425622 ps |
T195 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_tl_intg_err.1439311835 |
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|
Oct 12 11:10:38 AM UTC 24 |
Oct 12 11:10:42 AM UTC 24 |
23868299 ps |
T198 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_intr_test.555831045 |
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|
Oct 12 11:10:42 AM UTC 24 |
Oct 12 11:10:45 AM UTC 24 |
8518010 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_hw_reset.683629291 |
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|
Oct 12 11:10:43 AM UTC 24 |
Oct 12 11:10:54 AM UTC 24 |
397776726 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_rw.425839323 |
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|
Oct 12 11:10:45 AM UTC 24 |
Oct 12 11:10:57 AM UTC 24 |
253920643 ps |
T159 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_same_csr_outstanding.2402602977 |
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|
Oct 12 11:10:58 AM UTC 24 |
Oct 12 11:11:13 AM UTC 24 |
328640928 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_mem_rw_with_rand_reset.260244297 |
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|
Oct 12 11:11:13 AM UTC 24 |
Oct 12 11:11:25 AM UTC 24 |
72043687 ps |
T154 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_shadow_reg_errors.1191576625 |
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|
Oct 12 11:08:29 AM UTC 24 |
Oct 12 11:12:24 AM UTC 24 |
11347372633 ps |
T163 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_bit_bash.728827521 |
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|
Oct 12 11:10:53 AM UTC 24 |
Oct 12 11:12:36 AM UTC 24 |
1574402595 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_errors.3213546708 |
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|
Oct 12 11:12:36 AM UTC 24 |
Oct 12 11:12:43 AM UTC 24 |
70837905 ps |
T196 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_tl_intg_err.3880281273 |
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|
Oct 12 11:12:44 AM UTC 24 |
Oct 12 11:13:28 AM UTC 24 |
1175031014 ps |
T229 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_intr_test.4227376413 |
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|
Oct 12 11:13:29 AM UTC 24 |
Oct 12 11:13:32 AM UTC 24 |
10238812 ps |
T230 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_hw_reset.2286917360 |
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|
Oct 12 11:13:33 AM UTC 24 |
Oct 12 11:13:40 AM UTC 24 |
72090103 ps |
T155 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_rw.2165280850 |
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|
Oct 12 11:13:41 AM UTC 24 |
Oct 12 11:13:48 AM UTC 24 |
36038797 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_mem_rw_with_rand_reset.1828727429 |
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|
Oct 12 11:15:24 AM UTC 24 |
Oct 12 11:15:31 AM UTC 24 |
61311412 ps |
T237 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_csr_bit_bash.3880302716 |
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|
Oct 12 11:05:16 AM UTC 24 |
Oct 12 11:15:40 AM UTC 24 |
57085950655 ps |
T202 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_intg_err.452998240 |
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|
Oct 12 11:15:41 AM UTC 24 |
Oct 12 11:15:46 AM UTC 24 |
58730679 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_intr_test.3477645405 |
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|
Oct 12 11:15:47 AM UTC 24 |
Oct 12 11:15:50 AM UTC 24 |
18111391 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_tl_errors.2909031847 |
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|
Oct 12 11:15:41 AM UTC 24 |
Oct 12 11:15:50 AM UTC 24 |
95587203 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_same_csr_outstanding.825786383 |
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|
Oct 12 11:15:16 AM UTC 24 |
Oct 12 11:15:58 AM UTC 24 |
504818177 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/0.alert_handler_shadow_reg_errors_with_csr_rw.1492865049 |
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|
Oct 12 11:03:37 AM UTC 24 |
Oct 12 11:16:00 AM UTC 24 |
4844700407 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_rw.3594845581 |
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|
Oct 12 11:15:51 AM UTC 24 |
Oct 12 11:16:02 AM UTC 24 |
95017277 ps |
T238 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_hw_reset.1837505681 |
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|
Oct 12 11:15:51 AM UTC 24 |
Oct 12 11:16:04 AM UTC 24 |
503651720 ps |
T160 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/1.alert_handler_csr_aliasing.89273991 |
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|
Oct 12 11:10:55 AM UTC 24 |
Oct 12 11:16:11 AM UTC 24 |
9010823038 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_mem_rw_with_rand_reset.1024073781 |
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|
Oct 12 11:16:04 AM UTC 24 |
Oct 12 11:16:12 AM UTC 24 |
31780686 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_same_csr_outstanding.3478162535 |
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|
Oct 12 11:16:02 AM UTC 24 |
Oct 12 11:16:19 AM UTC 24 |
136841222 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_intg_err.1378894344 |
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|
Oct 12 11:16:20 AM UTC 24 |
Oct 12 11:16:24 AM UTC 24 |
56865036 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_tl_errors.576832212 |
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|
Oct 12 11:16:13 AM UTC 24 |
Oct 12 11:16:25 AM UTC 24 |
700942807 ps |
T373 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_intr_test.1529157726 |
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|
Oct 12 11:16:27 AM UTC 24 |
Oct 12 11:16:30 AM UTC 24 |
9026116 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_hw_reset.4245488468 |
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|
Oct 12 11:16:27 AM UTC 24 |
Oct 12 11:16:34 AM UTC 24 |
242815586 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_rw.4092001148 |
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|
Oct 12 11:16:28 AM UTC 24 |
Oct 12 11:16:35 AM UTC 24 |
59643954 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_aliasing.836238455 |
|
|
Oct 12 11:14:17 AM UTC 24 |
Oct 12 11:16:41 AM UTC 24 |
7313073382 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_mem_rw_with_rand_reset.1614821880 |
|
|
Oct 12 11:16:35 AM UTC 24 |
Oct 12 11:16:45 AM UTC 24 |
93338142 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_same_csr_outstanding.2998563177 |
|
|
Oct 12 11:16:35 AM UTC 24 |
Oct 12 11:16:59 AM UTC 24 |
1047338026 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_intr_test.4094056581 |
|
|
Oct 12 11:17:00 AM UTC 24 |
Oct 12 11:17:02 AM UTC 24 |
14636547 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_errors.3375956118 |
|
|
Oct 12 11:16:45 AM UTC 24 |
Oct 12 11:17:07 AM UTC 24 |
268534089 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_rw.538283897 |
|
|
Oct 12 11:17:03 AM UTC 24 |
Oct 12 11:17:11 AM UTC 24 |
34018568 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_csr_mem_rw_with_rand_reset.3038028869 |
|
|
Oct 12 11:17:08 AM UTC 24 |
Oct 12 11:17:15 AM UTC 24 |
27779027 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_intr_test.2821263528 |
|
|
Oct 12 11:17:34 AM UTC 24 |
Oct 12 11:17:37 AM UTC 24 |
11037537 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_errors.3012204524 |
|
|
Oct 12 11:17:31 AM UTC 24 |
Oct 12 11:17:42 AM UTC 24 |
220489092 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_rw.1888489134 |
|
|
Oct 12 11:17:38 AM UTC 24 |
Oct 12 11:17:44 AM UTC 24 |
55792468 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_same_csr_outstanding.1288758204 |
|
|
Oct 12 11:17:07 AM UTC 24 |
Oct 12 11:17:47 AM UTC 24 |
3254213580 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_csr_mem_rw_with_rand_reset.3201784773 |
|
|
Oct 12 11:17:43 AM UTC 24 |
Oct 12 11:18:01 AM UTC 24 |
213999476 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_aliasing.4215356628 |
|
|
Oct 12 11:16:02 AM UTC 24 |
Oct 12 11:18:06 AM UTC 24 |
1699691988 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_tl_intg_err.352085803 |
|
|
Oct 12 11:16:47 AM UTC 24 |
Oct 12 11:18:06 AM UTC 24 |
893563448 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_intg_err.666844104 |
|
|
Oct 12 11:18:02 AM UTC 24 |
Oct 12 11:18:07 AM UTC 24 |
112891387 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_intr_test.4064485345 |
|
|
Oct 12 11:18:05 AM UTC 24 |
Oct 12 11:18:08 AM UTC 24 |
7427265 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_tl_errors.2236728831 |
|
|
Oct 12 11:17:47 AM UTC 24 |
Oct 12 11:18:10 AM UTC 24 |
279832256 ps |
T164 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_shadow_reg_errors.2535090017 |
|
|
Oct 12 11:15:33 AM UTC 24 |
Oct 12 11:18:11 AM UTC 24 |
4547497875 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_rw.4282737135 |
|
|
Oct 12 11:18:07 AM UTC 24 |
Oct 12 11:18:12 AM UTC 24 |
19873146 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_csr_mem_rw_with_rand_reset.3501426088 |
|
|
Oct 12 11:18:08 AM UTC 24 |
Oct 12 11:18:16 AM UTC 24 |
38413615 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_shadow_reg_errors.4074533382 |
|
|
Oct 12 11:12:25 AM UTC 24 |
Oct 12 11:18:16 AM UTC 24 |
4303658106 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_intg_err.56676406 |
|
|
Oct 12 11:18:13 AM UTC 24 |
Oct 12 11:18:18 AM UTC 24 |
159648780 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_intr_test.987101222 |
|
|
Oct 12 11:18:16 AM UTC 24 |
Oct 12 11:18:19 AM UTC 24 |
8349265 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_tl_errors.2291627129 |
|
|
Oct 12 11:18:12 AM UTC 24 |
Oct 12 11:18:23 AM UTC 24 |
424537377 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_rw.2795390881 |
|
|
Oct 12 11:18:17 AM UTC 24 |
Oct 12 11:18:25 AM UTC 24 |
68010699 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_csr_mem_rw_with_rand_reset.1192831586 |
|
|
Oct 12 11:18:20 AM UTC 24 |
Oct 12 11:18:30 AM UTC 24 |
77819245 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_same_csr_outstanding.823448767 |
|
|
Oct 12 11:18:08 AM UTC 24 |
Oct 12 11:18:31 AM UTC 24 |
1547372095 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_errors.2302546991 |
|
|
Oct 12 11:18:26 AM UTC 24 |
Oct 12 11:18:35 AM UTC 24 |
46911114 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_intr_test.4081778985 |
|
|
Oct 12 11:18:32 AM UTC 24 |
Oct 12 11:18:36 AM UTC 24 |
9257881 ps |
T200 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_tl_intg_err.606702903 |
|
|
Oct 12 11:18:31 AM UTC 24 |
Oct 12 11:18:37 AM UTC 24 |
181141534 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_same_csr_outstanding.807671666 |
|
|
Oct 12 11:17:41 AM UTC 24 |
Oct 12 11:18:38 AM UTC 24 |
2534266652 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_rw.1101028888 |
|
|
Oct 12 11:18:33 AM UTC 24 |
Oct 12 11:18:41 AM UTC 24 |
299735175 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_csr_mem_rw_with_rand_reset.762117873 |
|
|
Oct 12 11:18:37 AM UTC 24 |
Oct 12 11:18:43 AM UTC 24 |
110543499 ps |
T208 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_intg_err.3418301426 |
|
|
Oct 12 11:18:44 AM UTC 24 |
Oct 12 11:18:50 AM UTC 24 |
101649014 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_tl_errors.2713392147 |
|
|
Oct 12 11:18:42 AM UTC 24 |
Oct 12 11:18:51 AM UTC 24 |
49843178 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_intr_test.1272434432 |
|
|
Oct 12 11:18:50 AM UTC 24 |
Oct 12 11:18:53 AM UTC 24 |
12155802 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/6.alert_handler_tl_intg_err.1920163098 |
|
|
Oct 12 11:17:31 AM UTC 24 |
Oct 12 11:19:00 AM UTC 24 |
4376923174 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/9.alert_handler_same_csr_outstanding.2630921749 |
|
|
Oct 12 11:18:35 AM UTC 24 |
Oct 12 11:19:01 AM UTC 24 |
318736780 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_mem_rw_with_rand_reset.4198926940 |
|
|
Oct 12 11:18:54 AM UTC 24 |
Oct 12 11:19:03 AM UTC 24 |
75733541 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_csr_rw.3103456590 |
|
|
Oct 12 11:18:52 AM UTC 24 |
Oct 12 11:19:04 AM UTC 24 |
127776852 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/8.alert_handler_same_csr_outstanding.1549004181 |
|
|
Oct 12 11:18:18 AM UTC 24 |
Oct 12 11:19:04 AM UTC 24 |
511852484 ps |
T371 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_intr_test.3389009741 |
|
|
Oct 12 11:19:05 AM UTC 24 |
Oct 12 11:19:09 AM UTC 24 |
10675720 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_rw.2918112334 |
|
|
Oct 12 11:19:09 AM UTC 24 |
Oct 12 11:19:16 AM UTC 24 |
487204469 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_errors.3457251637 |
|
|
Oct 12 11:19:03 AM UTC 24 |
Oct 12 11:19:27 AM UTC 24 |
283883459 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/7.alert_handler_shadow_reg_errors.757418345 |
|
|
Oct 12 11:17:45 AM UTC 24 |
Oct 12 11:19:33 AM UTC 24 |
1632626225 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/10.alert_handler_same_csr_outstanding.3456940706 |
|
|
Oct 12 11:18:53 AM UTC 24 |
Oct 12 11:19:36 AM UTC 24 |
5375497518 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_csr_mem_rw_with_rand_reset.2723204154 |
|
|
Oct 12 11:19:28 AM UTC 24 |
Oct 12 11:19:38 AM UTC 24 |
95240064 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_aliasing.718586058 |
|
|
Oct 12 11:16:31 AM UTC 24 |
Oct 12 11:19:41 AM UTC 24 |
1192751078 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_same_csr_outstanding.279169881 |
|
|
Oct 12 11:19:16 AM UTC 24 |
Oct 12 11:19:46 AM UTC 24 |
646853010 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_intr_test.3742943068 |
|
|
Oct 12 11:19:42 AM UTC 24 |
Oct 12 11:19:46 AM UTC 24 |
21739739 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/5.alert_handler_shadow_reg_errors.1480649578 |
|
|
Oct 12 11:16:41 AM UTC 24 |
Oct 12 11:19:47 AM UTC 24 |
2401062689 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_rw.875529574 |
|
|
Oct 12 11:19:47 AM UTC 24 |
Oct 12 11:19:56 AM UTC 24 |
185613014 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_shadow_reg_errors.3615103588 |
|
|
Oct 12 11:16:12 AM UTC 24 |
Oct 12 11:20:00 AM UTC 24 |
3335274141 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_csr_mem_rw_with_rand_reset.631664696 |
|
|
Oct 12 11:19:48 AM UTC 24 |
Oct 12 11:20:02 AM UTC 24 |
215836530 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_errors.1029107698 |
|
|
Oct 12 11:19:37 AM UTC 24 |
Oct 12 11:20:03 AM UTC 24 |
1387086145 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/4.alert_handler_csr_bit_bash.906772259 |
|
|
Oct 12 11:16:29 AM UTC 24 |
Oct 12 11:20:05 AM UTC 24 |
11925182516 ps |
T372 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_intr_test.843248101 |
|
|
Oct 12 11:20:05 AM UTC 24 |
Oct 12 11:20:08 AM UTC 24 |
21475322 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_intg_err.742872835 |
|
|
Oct 12 11:20:04 AM UTC 24 |
Oct 12 11:20:08 AM UTC 24 |
156844701 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_csr_bit_bash.2250217039 |
|
|
Oct 12 11:15:59 AM UTC 24 |
Oct 12 11:20:10 AM UTC 24 |
3870679687 ps |
T199 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_tl_intg_err.1431709957 |
|
|
Oct 12 11:19:39 AM UTC 24 |
Oct 12 11:20:11 AM UTC 24 |
155343776 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_rw.2760045550 |
|
|
Oct 12 11:20:06 AM UTC 24 |
Oct 12 11:20:13 AM UTC 24 |
183298813 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_intr_test.3619732699 |
|
|
Oct 12 11:20:13 AM UTC 24 |
Oct 12 11:20:17 AM UTC 24 |
10445563 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_intg_err.1935198814 |
|
|
Oct 12 11:20:13 AM UTC 24 |
Oct 12 11:20:18 AM UTC 24 |
35495053 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_csr_mem_rw_with_rand_reset.3809512272 |
|
|
Oct 12 11:20:08 AM UTC 24 |
Oct 12 11:20:18 AM UTC 24 |
373845135 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_tl_errors.864649352 |
|
|
Oct 12 11:20:03 AM UTC 24 |
Oct 12 11:20:18 AM UTC 24 |
605885070 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/13.alert_handler_same_csr_outstanding.2442964933 |
|
|
Oct 12 11:20:06 AM UTC 24 |
Oct 12 11:20:24 AM UTC 24 |
99761793 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_rw.3925390605 |
|
|
Oct 12 11:20:18 AM UTC 24 |
Oct 12 11:20:25 AM UTC 24 |
103837585 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_csr_mem_rw_with_rand_reset.2545646098 |
|
|
Oct 12 11:20:20 AM UTC 24 |
Oct 12 11:20:31 AM UTC 24 |
100343018 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_intr_test.922812327 |
|
|
Oct 12 11:20:32 AM UTC 24 |
Oct 12 11:20:35 AM UTC 24 |
30731854 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_errors.3946271618 |
|
|
Oct 12 11:20:26 AM UTC 24 |
Oct 12 11:20:40 AM UTC 24 |
567617751 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/12.alert_handler_same_csr_outstanding.2935112952 |
|
|
Oct 12 11:19:47 AM UTC 24 |
Oct 12 11:20:41 AM UTC 24 |
2618149815 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_tl_errors.2502504849 |
|
|
Oct 12 11:20:12 AM UTC 24 |
Oct 12 11:20:43 AM UTC 24 |
4343161798 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_rw.1006422835 |
|
|
Oct 12 11:20:35 AM UTC 24 |
Oct 12 11:20:43 AM UTC 24 |
117932337 ps |
T207 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/11.alert_handler_tl_intg_err.3459589969 |
|
|
Oct 12 11:19:05 AM UTC 24 |
Oct 12 11:20:45 AM UTC 24 |
1835232640 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_csr_mem_rw_with_rand_reset.3437258298 |
|
|
Oct 12 11:20:41 AM UTC 24 |
Oct 12 11:20:48 AM UTC 24 |
64010017 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_intg_err.2685248199 |
|
|
Oct 12 11:20:45 AM UTC 24 |
Oct 12 11:20:50 AM UTC 24 |
125282087 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/2.alert_handler_csr_bit_bash.2033921652 |
|
|
Oct 12 11:13:49 AM UTC 24 |
Oct 12 11:20:50 AM UTC 24 |
22799635816 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_intr_test.2116703842 |
|
|
Oct 12 11:20:48 AM UTC 24 |
Oct 12 11:20:51 AM UTC 24 |
7366593 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/3.alert_handler_shadow_reg_errors_with_csr_rw.855364708 |
|
|
Oct 12 11:15:30 AM UTC 24 |
Oct 12 11:21:00 AM UTC 24 |
8339561670 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_mem_rw_with_rand_reset.1183961654 |
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Oct 12 11:20:52 AM UTC 24 |
Oct 12 11:21:03 AM UTC 24 |
1032820631 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_csr_rw.1192048493 |
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Oct 12 11:20:50 AM UTC 24 |
Oct 12 11:21:03 AM UTC 24 |
128248878 ps |
T205 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_tl_intg_err.531345780 |
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Oct 12 11:20:26 AM UTC 24 |
Oct 12 11:21:06 AM UTC 24 |
3445203698 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/15.alert_handler_same_csr_outstanding.4092143990 |
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Oct 12 11:20:37 AM UTC 24 |
Oct 12 11:21:06 AM UTC 24 |
169280920 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/16.alert_handler_tl_errors.3858513520 |
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Oct 12 11:20:44 AM UTC 24 |
Oct 12 11:21:09 AM UTC 24 |
1154864057 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_intr_test.2616961036 |
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Oct 12 11:21:07 AM UTC 24 |
Oct 12 11:21:10 AM UTC 24 |
15646555 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/14.alert_handler_same_csr_outstanding.1086873770 |
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Oct 12 11:20:19 AM UTC 24 |
Oct 12 11:21:11 AM UTC 24 |
657591915 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_10_11/alert_handler-sim-vcs/coverage/cover_reg_top/17.alert_handler_csr_rw.2553029150 |
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Oct 12 11:21:10 AM UTC 24 |
Oct 12 11:21:16 AM UTC 24 |
181226102 ps |