Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	628219	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

3713974

1

T4

6

T1

99213

T5

24

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1070220	1			T4	5		T1	27354		T5	42
values[0x0]	1503814	1			T4	2		T1	38652		T5	22
values[0x1]	1768159	1			T4	9		T1	45805		T5	17

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	344429	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3997764

1

T4

9

T1

105730

T5

35

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	17408	1			T1	419		T2	424		T26	2
valid_sources[0x01]	17291	1			T1	424		T2	174		T20	4
valid_sources[0x02]	15988	1			T4	1		T1	441		T2	28
valid_sources[0x03]	16887	1			T1	453		T2	218		T20	2
valid_sources[0x04]	16809	1			T1	426		T5	1		T2	87
valid_sources[0x05]	17499	1			T1	405		T2	24		T17	7
valid_sources[0x06]	19617	1			T1	434		T5	1		T2	148
valid_sources[0x07]	16785	1			T1	422		T2	162		T20	2
valid_sources[0x08]	17983	1			T1	479		T5	1		T2	1235
valid_sources[0x09]	16782	1			T1	467		T2	323		T65	1
valid_sources[0x0a]	16736	1			T1	423		T2	248		T20	6
valid_sources[0x0b]	16764	1			T1	444		T5	2		T2	552
valid_sources[0x0c]	16234	1			T1	419		T2	57		T20	3
valid_sources[0x0d]	16365	1			T1	429		T2	110		T21	1
valid_sources[0x0e]	16783	1			T1	468		T2	19		T18	1
valid_sources[0x0f]	16554	1			T1	437		T5	1		T2	163
valid_sources[0x10]	16205	1			T1	450		T2	793		T20	5
valid_sources[0x11]	18101	1			T1	459		T2	457		T21	2
valid_sources[0x12]	18210	1			T1	427		T5	1		T2	315
valid_sources[0x13]	18759	1			T1	436		T2	854		T21	1
valid_sources[0x14]	16564	1			T1	448		T5	1		T2	146
valid_sources[0x15]	16555	1			T1	454		T5	1		T2	494
valid_sources[0x16]	17385	1			T1	419		T5	1		T2	153
valid_sources[0x17]	15621	1			T1	417		T2	376		T21	4
valid_sources[0x18]	18138	1			T1	454		T5	1		T2	189
valid_sources[0x19]	16280	1			T1	480		T2	186		T20	2
valid_sources[0x1a]	17718	1			T1	440		T2	223		T20	1
valid_sources[0x1b]	16892	1			T1	403		T5	1		T2	476
valid_sources[0x1c]	17097	1			T1	430		T2	463		T20	1
valid_sources[0x1d]	16445	1			T1	421		T2	1085		T20	1
valid_sources[0x1e]	17195	1			T1	413		T5	1		T2	165
valid_sources[0x1f]	17462	1			T1	377		T2	19		T20	1
valid_sources[0x20]	17545	1			T1	418		T2	310		T26	5
valid_sources[0x21]	16634	1			T1	461		T2	42		T21	11
valid_sources[0x22]	16435	1			T1	423		T2	453		T21	1
valid_sources[0x23]	15869	1			T1	458		T5	1		T2	274
valid_sources[0x24]	17812	1			T1	457		T2	308		T20	1
valid_sources[0x25]	18175	1			T1	440		T5	1		T2	280
valid_sources[0x26]	15286	1			T1	421		T2	91		T20	1
valid_sources[0x27]	16458	1			T1	452		T2	132		T21	2
valid_sources[0x28]	16485	1			T1	456		T2	23		T21	1
valid_sources[0x29]	17114	1			T1	449		T2	143		T20	2
valid_sources[0x2a]	16176	1			T1	394		T2	782		T21	3
valid_sources[0x2b]	15836	1			T1	388		T2	280		T20	1
valid_sources[0x2c]	16643	1			T1	393		T2	309		T21	1
valid_sources[0x2d]	17309	1			T1	434		T2	411		T21	8
valid_sources[0x2e]	15457	1			T1	415		T20	2		T21	1
valid_sources[0x2f]	16957	1			T1	433		T2	386		T21	5
valid_sources[0x30]	18813	1			T1	447		T2	920		T22	3
valid_sources[0x31]	16910	1			T4	1		T1	455		T2	383
valid_sources[0x32]	18445	1			T1	461		T2	737		T20	1
valid_sources[0x33]	18657	1			T1	427		T2	738		T21	1
valid_sources[0x34]	15058	1			T1	421		T2	101		T21	5
valid_sources[0x35]	16455	1			T1	434		T5	1		T2	532
valid_sources[0x36]	18444	1			T1	400		T2	781		T21	4
valid_sources[0x37]	16283	1			T1	437		T5	2		T2	292
valid_sources[0x38]	18061	1			T1	419		T2	478		T65	1
valid_sources[0x39]	15862	1			T1	433		T5	1		T2	64
valid_sources[0x3a]	16592	1			T1	469		T16	49		T2	439
valid_sources[0x3b]	14685	1			T1	484		T5	1		T2	195
valid_sources[0x3c]	17618	1			T1	419		T2	1146		T20	1
valid_sources[0x3d]	16270	1			T1	448		T2	149		T20	1
valid_sources[0x3e]	17188	1			T1	441		T2	45		T21	3
valid_sources[0x3f]	17387	1			T1	474		T2	318		T21	5
valid_sources[0x40]	16587	1			T1	422		T2	90		T20	1
valid_sources[0x41]	16818	1			T1	503		T5	1		T2	211
valid_sources[0x42]	16697	1			T1	409		T2	388		T21	2
valid_sources[0x43]	15267	1			T1	362		T2	358		T20	1
valid_sources[0x44]	19015	1			T1	432		T2	638		T21	3
valid_sources[0x45]	17069	1			T1	442		T2	463		T21	3
valid_sources[0x46]	16842	1			T1	449		T2	1		T21	4
valid_sources[0x47]	17928	1			T1	486		T2	12		T21	6
valid_sources[0x48]	15260	1			T1	462		T2	657		T21	2
valid_sources[0x49]	17052	1			T1	437		T20	1		T22	1
valid_sources[0x4a]	17288	1			T1	445		T5	1		T2	332
valid_sources[0x4b]	17506	1			T1	464		T5	2		T2	765
valid_sources[0x4c]	16884	1			T1	415		T5	1		T2	4
valid_sources[0x4d]	15868	1			T1	441		T5	1		T2	81
valid_sources[0x4e]	15948	1			T1	435		T5	2		T2	9
valid_sources[0x4f]	15849	1			T1	426		T2	72		T21	3
valid_sources[0x50]	16949	1			T1	458		T2	24		T20	3
valid_sources[0x51]	18545	1			T1	457		T5	1		T2	605
valid_sources[0x52]	18966	1			T1	476		T2	751		T20	1
valid_sources[0x53]	17875	1			T1	437		T5	2		T2	739
valid_sources[0x54]	17706	1			T1	469		T5	1		T2	192
valid_sources[0x55]	18404	1			T1	416		T2	106		T21	4
valid_sources[0x56]	16863	1			T1	382		T5	1		T2	256
valid_sources[0x57]	17723	1			T4	1		T1	393		T2	615
valid_sources[0x58]	16947	1			T4	1		T1	485		T2	278
valid_sources[0x59]	15795	1			T1	427		T5	1		T2	685
valid_sources[0x5a]	18029	1			T1	487		T2	114		T20	1
valid_sources[0x5b]	16267	1			T1	421		T2	799		T21	2
valid_sources[0x5c]	18169	1			T1	416		T2	893		T20	1
valid_sources[0x5d]	18301	1			T1	455		T2	858		T21	2
valid_sources[0x5e]	16801	1			T1	434		T2	50		T20	1
valid_sources[0x5f]	15674	1			T1	433		T2	107		T21	6
valid_sources[0x60]	18873	1			T1	433		T2	357		T20	2
valid_sources[0x61]	17345	1			T1	438		T5	1		T2	404
valid_sources[0x62]	18575	1			T1	464		T2	217		T115	1
valid_sources[0x63]	18951	1			T1	434		T5	1		T2	1003
valid_sources[0x64]	16204	1			T1	417		T2	378		T20	1
valid_sources[0x65]	19348	1			T1	425		T2	970		T21	3
valid_sources[0x66]	16649	1			T1	433		T2	376		T20	4
valid_sources[0x67]	15984	1			T1	454		T2	6		T21	2
valid_sources[0x68]	16570	1			T1	439		T2	48		T20	3
valid_sources[0x69]	17604	1			T1	473		T2	4		T26	5
valid_sources[0x6a]	17032	1			T1	430		T5	1		T2	269
valid_sources[0x6b]	16846	1			T1	467		T5	2		T2	206
valid_sources[0x6c]	17265	1			T1	441		T2	216		T20	2
valid_sources[0x6d]	16616	1			T4	2		T1	454		T5	1
valid_sources[0x6e]	18677	1			T1	480		T2	270		T21	2
valid_sources[0x6f]	19607	1			T1	389		T2	1210		T21	4
valid_sources[0x70]	16041	1			T1	456		T5	1		T2	236
valid_sources[0x71]	17678	1			T1	457		T2	212		T21	1
valid_sources[0x72]	17973	1			T1	456		T2	187		T21	1
valid_sources[0x73]	16020	1			T1	454		T2	226		T65	1
valid_sources[0x74]	16928	1			T4	1		T1	428		T2	582
valid_sources[0x75]	16585	1			T1	526		T2	85		T20	1
valid_sources[0x76]	17809	1			T1	474		T2	394		T20	1
valid_sources[0x77]	18315	1			T1	394		T2	413		T21	2
valid_sources[0x78]	16350	1			T1	429		T5	1		T2	21
valid_sources[0x79]	17858	1			T1	466		T2	837		T20	1
valid_sources[0x7a]	16497	1			T1	448		T2	97		T20	1
valid_sources[0x7b]	18336	1			T1	395		T5	1		T2	571
valid_sources[0x7c]	17020	1			T1	460		T2	265		T21	2
valid_sources[0x7d]	18038	1			T4	1		T1	429		T2	1339
valid_sources[0x7e]	15933	1			T1	411		T2	128		T20	2
valid_sources[0x7f]	16726	1			T1	380		T2	576		T21	4
valid_sources[0x80]	16769	1			T1	464		T2	32		T20	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

939367

1

T4

4

T1

25126

T5

14

values[0x0]

all_enables

biggest_size

1410209

1

T4

1

T1

37287

T5

8

values[0x1]

all_enables

biggest_size

1364398

1

T4

1

T1

36800

T5

2