Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_clkmgr_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	631539	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

3814299

1

T5

18

T6

10

T4

66

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1094658	1			T5	18		T6	16		T4	7
values[0x0]	1538210	1			T5	23		T6	7		T4	56
values[0x1]	1812970	1			T5	14		T6	5		T4	92

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	342472	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

4103366

1

T5

21

T6

12

T4

100

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16537	1			T1	310		T2	214		T8	200
valid_sources[0x01]	17047	1			T1	326		T2	280		T3	1
valid_sources[0x02]	18639	1			T5	1		T4	3		T1	307
valid_sources[0x03]	16043	1			T5	1		T1	305		T2	66
valid_sources[0x04]	16924	1			T4	1		T1	311		T2	285
valid_sources[0x05]	17514	1			T1	291		T15	1		T2	522
valid_sources[0x06]	16078	1			T1	295		T2	259		T3	1
valid_sources[0x07]	17487	1			T1	332		T2	571		T59	1
valid_sources[0x08]	18689	1			T4	2		T1	304		T2	703
valid_sources[0x09]	17480	1			T1	279		T2	602		T59	1
valid_sources[0x0a]	18533	1			T4	1		T1	298		T2	402
valid_sources[0x0b]	16576	1			T4	1		T1	308		T2	118
valid_sources[0x0c]	17431	1			T4	2		T1	335		T15	1
valid_sources[0x0d]	19024	1			T1	334		T2	255		T3	2
valid_sources[0x0e]	21045	1			T1	296		T2	779		T3	2
valid_sources[0x0f]	16221	1			T5	1		T1	315		T2	120
valid_sources[0x10]	16849	1			T1	280		T2	96		T3	1
valid_sources[0x11]	17579	1			T1	297		T2	374		T3	1
valid_sources[0x12]	17815	1			T1	305		T2	443		T3	1
valid_sources[0x13]	17291	1			T4	1		T1	340		T15	1
valid_sources[0x14]	16622	1			T1	313		T2	457		T8	143
valid_sources[0x15]	16193	1			T1	316		T2	532		T3	3
valid_sources[0x16]	18149	1			T5	1		T1	290		T2	612
valid_sources[0x17]	17782	1			T1	301		T2	391		T3	1
valid_sources[0x18]	17024	1			T4	3		T1	328		T2	310
valid_sources[0x19]	22318	1			T1	289		T2	1320		T8	224
valid_sources[0x1a]	16376	1			T5	2		T1	282		T2	18
valid_sources[0x1b]	18754	1			T1	301		T15	1		T2	283
valid_sources[0x1c]	17883	1			T1	299		T2	2		T3	1
valid_sources[0x1d]	16594	1			T5	1		T1	285		T15	2
valid_sources[0x1e]	17880	1			T4	1		T1	283		T3	1
valid_sources[0x1f]	18622	1			T1	287		T2	707		T3	1
valid_sources[0x20]	16343	1			T1	281		T2	119		T3	1
valid_sources[0x21]	18929	1			T1	297		T2	648		T36	2
valid_sources[0x22]	17340	1			T6	28		T1	334		T2	1069
valid_sources[0x23]	19192	1			T1	292		T2	432		T3	2
valid_sources[0x24]	19968	1			T1	358		T2	1		T23	1
valid_sources[0x25]	16686	1			T1	296		T2	344		T3	2
valid_sources[0x26]	17054	1			T1	308		T2	528		T8	206
valid_sources[0x27]	18897	1			T1	300		T2	143		T3	5
valid_sources[0x28]	21107	1			T1	285		T2	698		T3	1
valid_sources[0x29]	18867	1			T5	1		T1	273		T15	1
valid_sources[0x2a]	17054	1			T5	1		T4	3		T1	288
valid_sources[0x2b]	16829	1			T1	305		T2	283		T3	3
valid_sources[0x2c]	17497	1			T4	6		T1	295		T2	363
valid_sources[0x2d]	17539	1			T5	1		T1	281		T8	195
valid_sources[0x2e]	15772	1			T4	2		T1	312		T2	11
valid_sources[0x2f]	18103	1			T4	1		T1	338		T2	400
valid_sources[0x30]	18384	1			T5	1		T1	264		T2	273
valid_sources[0x31]	18151	1			T1	307		T2	285		T3	3
valid_sources[0x32]	16589	1			T1	318		T2	142		T3	1
valid_sources[0x33]	16373	1			T4	3		T1	307		T15	2
valid_sources[0x34]	17729	1			T5	1		T1	306		T15	1
valid_sources[0x35]	17305	1			T5	1		T1	313		T2	661
valid_sources[0x36]	16634	1			T1	277		T2	390		T3	2
valid_sources[0x37]	16950	1			T5	3		T1	304		T15	1
valid_sources[0x38]	18880	1			T1	295		T2	1167		T3	3
valid_sources[0x39]	16859	1			T1	269		T2	397		T8	201
valid_sources[0x3a]	18191	1			T1	295		T2	502		T3	5
valid_sources[0x3b]	15473	1			T4	9		T1	311		T2	504
valid_sources[0x3c]	16319	1			T1	292		T18	7		T2	213
valid_sources[0x3d]	15420	1			T1	316		T2	278		T3	2
valid_sources[0x3e]	17946	1			T5	1		T1	314		T2	352
valid_sources[0x3f]	15848	1			T1	307		T2	249		T3	1
valid_sources[0x40]	16638	1			T1	303		T15	1		T2	2
valid_sources[0x41]	16282	1			T4	1		T1	290		T2	67
valid_sources[0x42]	17134	1			T1	305		T2	743		T3	2
valid_sources[0x43]	16601	1			T5	1		T1	334		T2	300
valid_sources[0x44]	17423	1			T1	333		T2	394		T25	2
valid_sources[0x45]	16790	1			T1	306		T2	134		T3	3
valid_sources[0x46]	17895	1			T1	330		T2	109		T3	1
valid_sources[0x47]	18585	1			T5	1		T4	1		T1	281
valid_sources[0x48]	18145	1			T1	288		T2	584		T3	3
valid_sources[0x49]	18326	1			T1	311		T2	99		T3	3
valid_sources[0x4a]	16962	1			T1	322		T2	8		T3	3
valid_sources[0x4b]	16084	1			T1	281		T15	1		T2	124
valid_sources[0x4c]	18740	1			T1	343		T2	434		T58	81
valid_sources[0x4d]	16982	1			T1	297		T2	385		T3	2
valid_sources[0x4e]	17035	1			T1	282		T2	192		T3	3
valid_sources[0x4f]	16674	1			T4	1		T1	303		T2	357
valid_sources[0x50]	18955	1			T4	2		T1	295		T2	506
valid_sources[0x51]	18412	1			T1	292		T2	365		T3	3
valid_sources[0x52]	18610	1			T1	336		T2	389		T3	2
valid_sources[0x53]	18332	1			T1	318		T2	736		T3	4
valid_sources[0x54]	17916	1			T1	296		T2	380		T23	2
valid_sources[0x55]	18000	1			T4	1		T1	294		T2	135
valid_sources[0x56]	17347	1			T1	325		T2	211		T3	1
valid_sources[0x57]	16651	1			T1	301		T2	518		T8	152
valid_sources[0x58]	16681	1			T5	2		T4	3		T1	283
valid_sources[0x59]	15957	1			T5	1		T1	290		T2	152
valid_sources[0x5a]	16264	1			T5	2		T4	4		T1	315
valid_sources[0x5b]	16738	1			T4	2		T1	294		T15	1
valid_sources[0x5c]	18488	1			T1	291		T2	1104		T3	1
valid_sources[0x5d]	17164	1			T1	288		T2	571		T3	1
valid_sources[0x5e]	18203	1			T5	1		T1	302		T2	257
valid_sources[0x5f]	18596	1			T1	276		T2	17		T19	2
valid_sources[0x60]	16812	1			T1	292		T2	3		T3	4
valid_sources[0x61]	16796	1			T4	3		T1	292		T2	380
valid_sources[0x62]	15529	1			T1	302		T2	161		T3	2
valid_sources[0x63]	18140	1			T1	282		T2	58		T3	2
valid_sources[0x64]	16500	1			T1	318		T2	317		T3	2
valid_sources[0x65]	17828	1			T1	313		T2	627		T3	2
valid_sources[0x66]	16844	1			T4	8		T1	321		T2	213
valid_sources[0x67]	16439	1			T5	2		T4	4		T1	302
valid_sources[0x68]	16573	1			T5	3		T1	305		T2	42
valid_sources[0x69]	16626	1			T1	289		T2	688		T8	166
valid_sources[0x6a]	17280	1			T4	1		T1	295		T2	1017
valid_sources[0x6b]	16830	1			T1	322		T2	2		T8	176
valid_sources[0x6c]	16948	1			T4	3		T1	317		T2	409
valid_sources[0x6d]	17656	1			T4	3		T1	304		T15	1
valid_sources[0x6e]	18729	1			T1	324		T2	531		T3	3
valid_sources[0x6f]	17329	1			T1	301		T2	458		T3	3
valid_sources[0x70]	17691	1			T1	300		T2	127		T3	4
valid_sources[0x71]	14827	1			T4	1		T1	325		T2	346
valid_sources[0x72]	17384	1			T5	1		T1	292		T2	414
valid_sources[0x73]	17599	1			T4	3		T1	291		T2	459
valid_sources[0x74]	16313	1			T1	335		T2	9		T3	2
valid_sources[0x75]	17268	1			T1	292		T15	2		T2	131
valid_sources[0x76]	17837	1			T1	251		T2	2		T3	4
valid_sources[0x77]	16855	1			T1	326		T2	151		T3	2
valid_sources[0x78]	17098	1			T1	288		T15	1		T2	600
valid_sources[0x79]	18905	1			T1	274		T2	667		T3	4
valid_sources[0x7a]	18023	1			T4	1		T1	264		T2	883
valid_sources[0x7b]	19138	1			T1	295		T2	255		T3	4
valid_sources[0x7c]	16619	1			T1	323		T2	352		T3	1
valid_sources[0x7d]	18519	1			T1	289		T2	197		T8	228
valid_sources[0x7e]	16969	1			T1	296		T2	187		T3	3
valid_sources[0x7f]	16614	1			T4	1		T1	301		T2	25
valid_sources[0x80]	17269	1			T1	310		T2	8		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

964157

1

T5

11

T6

6

T4

1

values[0x0]

all_enables

biggest_size

1445724

1

T5

6

T6

4

T4

35

values[0x1]

all_enables

biggest_size

1404418

1

T5

1

T4

30

T1

25269