T50 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_stress_all_with_rand_reset.3003787282 |
|
|
Oct 02 09:02:44 PM UTC 24 |
Oct 02 09:03:31 PM UTC 24 |
7476024468 ps |
T51 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_stress_all_with_rand_reset.3265637724 |
|
|
Oct 02 09:02:59 PM UTC 24 |
Oct 02 09:03:32 PM UTC 24 |
4525705136 ps |
T320 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_trans.3363592153 |
|
|
Oct 02 09:03:30 PM UTC 24 |
Oct 02 09:03:32 PM UTC 24 |
22565182 ps |
T321 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_frequency.4247867967 |
|
|
Oct 02 09:03:22 PM UTC 24 |
Oct 02 09:03:32 PM UTC 24 |
1794783211 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_extclk.2811425686 |
|
|
Oct 02 09:03:30 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
99245808 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_regwen.4225161340 |
|
|
Oct 02 09:03:28 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
308849631 ps |
T324 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_clk_status.3484163244 |
|
|
Oct 02 09:03:31 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
15082745 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_idle_intersig_mubi.4266430655 |
|
|
Oct 02 09:03:31 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
20634428 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_lc_clk_byp_req_intersig_mubi.418906392 |
|
|
Oct 02 09:03:31 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
24260251 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_lc_ctrl_intersig_mubi.2967586919 |
|
|
Oct 02 09:03:31 PM UTC 24 |
Oct 02 09:03:33 PM UTC 24 |
39467023 ps |
T328 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_stress_all.1341677347 |
|
|
Oct 02 09:03:10 PM UTC 24 |
Oct 02 09:03:34 PM UTC 24 |
5534950673 ps |
T329 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_frequency_timeout.3210309198 |
|
|
Oct 02 09:03:19 PM UTC 24 |
Oct 02 09:03:34 PM UTC 24 |
1218738424 ps |
T330 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_regwen.3012154240 |
|
|
Oct 02 09:03:24 PM UTC 24 |
Oct 02 09:03:35 PM UTC 24 |
1279332204 ps |
T331 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_div_intersig_mubi.85431813 |
|
|
Oct 02 09:03:32 PM UTC 24 |
Oct 02 09:03:35 PM UTC 24 |
28284360 ps |
T97 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_clk_handshake_intersig_mubi.1493300110 |
|
|
Oct 02 09:03:32 PM UTC 24 |
Oct 02 09:03:35 PM UTC 24 |
51809587 ps |
T332 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_alert_test.3833147018 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:36 PM UTC 24 |
27823626 ps |
T52 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_stress_all_with_rand_reset.1042296560 |
|
|
Oct 02 09:02:50 PM UTC 24 |
Oct 02 09:03:36 PM UTC 24 |
6210055643 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_smoke.1971975417 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:36 PM UTC 24 |
52402956 ps |
T334 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_extclk.3405569087 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:36 PM UTC 24 |
41778227 ps |
T335 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_frequency_timeout.19377495 |
|
|
Oct 02 09:03:30 PM UTC 24 |
Oct 02 09:03:36 PM UTC 24 |
879323952 ps |
T336 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_regwen.2670529218 |
|
|
Oct 02 09:03:32 PM UTC 24 |
Oct 02 09:03:37 PM UTC 24 |
798605989 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_clk_status.3703201013 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
21581421 ps |
T338 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_peri.3103782768 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
15284355 ps |
T339 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_trans.3958972768 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
20374681 ps |
T340 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_idle_intersig_mubi.1064595714 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
18994539 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_lc_clk_byp_req_intersig_mubi.3991330139 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
20641179 ps |
T342 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_clk_handshake_intersig_mubi.2342593931 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
44783960 ps |
T343 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_lc_ctrl_intersig_mubi.512080485 |
|
|
Oct 02 09:03:36 PM UTC 24 |
Oct 02 09:03:38 PM UTC 24 |
120951186 ps |
T53 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_stress_all_with_rand_reset.4030580934 |
|
|
Oct 02 09:03:10 PM UTC 24 |
Oct 02 09:03:39 PM UTC 24 |
2136371970 ps |
T344 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_frequency.4084362899 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:39 PM UTC 24 |
563047226 ps |
T345 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_alert_test.479313424 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:03:39 PM UTC 24 |
14805505 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_frequency.4155057803 |
|
|
Oct 02 09:03:25 PM UTC 24 |
Oct 02 09:03:39 PM UTC 24 |
1883381131 ps |
T347 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_smoke.3378306582 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:03:40 PM UTC 24 |
41555400 ps |
T348 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_div_intersig_mubi.1580220956 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:03:40 PM UTC 24 |
90901977 ps |
T349 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_stress_all.592299699 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:03:40 PM UTC 24 |
116002310 ps |
T350 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_frequency.2215235000 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
1949294906 ps |
T351 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_stress_all.3641216165 |
|
|
Oct 02 09:03:18 PM UTC 24 |
Oct 02 09:03:40 PM UTC 24 |
4242894985 ps |
T352 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_regwen.4214908799 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
248421830 ps |
T353 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_peri.667097392 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
19473686 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_trans.475133408 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
18871203 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_clk_status.1478922472 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
28964592 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_extclk.2829002517 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
55539575 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_lc_ctrl_intersig_mubi.4240521315 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
22824729 ps |
T358 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_idle_intersig_mubi.1806955977 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:41 PM UTC 24 |
30894298 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_lc_clk_byp_req_intersig_mubi.297903741 |
|
|
Oct 02 09:03:40 PM UTC 24 |
Oct 02 09:03:42 PM UTC 24 |
23496979 ps |
T360 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_clk_handshake_intersig_mubi.482067568 |
|
|
Oct 02 09:03:40 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
56135538 ps |
T361 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_stress_all.736359688 |
|
|
Oct 02 09:02:41 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
12827856344 ps |
T362 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_div_intersig_mubi.2520075771 |
|
|
Oct 02 09:03:40 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
70838808 ps |
T363 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_regwen.830305884 |
|
|
Oct 02 09:03:40 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
116175553 ps |
T364 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_frequency.266817243 |
|
|
Oct 02 09:03:30 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
2170609552 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_frequency_timeout.1148801143 |
|
|
Oct 02 09:03:39 PM UTC 24 |
Oct 02 09:03:43 PM UTC 24 |
675848407 ps |
T54 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_stress_all_with_rand_reset.3552312226 |
|
|
Oct 02 09:03:02 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
2685767495 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_frequency_timeout.2925497084 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
975767305 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_alert_test.1916240667 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
16369859 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_clk_status.3998274229 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
25301647 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_extclk.2089327906 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
24504758 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_smoke.3374884241 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
24628062 ps |
T371 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_peri.3740671371 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
24419359 ps |
T372 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_trans.1613070184 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:44 PM UTC 24 |
89258849 ps |
T373 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_frequency_timeout.392861933 |
|
|
Oct 02 09:03:22 PM UTC 24 |
Oct 02 09:03:45 PM UTC 24 |
2294224476 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_idle_intersig_mubi.1814238453 |
|
|
Oct 02 09:03:43 PM UTC 24 |
Oct 02 09:03:46 PM UTC 24 |
82624176 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_lc_ctrl_intersig_mubi.2686184097 |
|
|
Oct 02 09:03:44 PM UTC 24 |
Oct 02 09:03:47 PM UTC 24 |
18515784 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_lc_clk_byp_req_intersig_mubi.239766019 |
|
|
Oct 02 09:03:45 PM UTC 24 |
Oct 02 09:03:47 PM UTC 24 |
14840707 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_div_intersig_mubi.4048754072 |
|
|
Oct 02 09:03:45 PM UTC 24 |
Oct 02 09:03:47 PM UTC 24 |
27771693 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_clk_handshake_intersig_mubi.2673113676 |
|
|
Oct 02 09:03:45 PM UTC 24 |
Oct 02 09:03:47 PM UTC 24 |
25795020 ps |
T379 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_stress_all.1397659457 |
|
|
Oct 02 09:03:28 PM UTC 24 |
Oct 02 09:03:47 PM UTC 24 |
1957262008 ps |
T380 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_alert_test.3558542420 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:48 PM UTC 24 |
14833340 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_clk_status.3325240653 |
|
|
Oct 02 09:03:47 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
16802863 ps |
T382 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_peri.3144117683 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:48 PM UTC 24 |
35215766 ps |
T383 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_smoke.3926685006 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:48 PM UTC 24 |
22173563 ps |
T55 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_stress_all_with_rand_reset.433356599 |
|
|
Oct 02 09:03:07 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
2966595824 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_extclk.1807282635 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
25341362 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_stress_all.3743289728 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
39088647 ps |
T386 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_idle_intersig_mubi.3777123252 |
|
|
Oct 02 09:03:47 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
122775687 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_lc_ctrl_intersig_mubi.1206714591 |
|
|
Oct 02 09:03:47 PM UTC 24 |
Oct 02 09:03:49 PM UTC 24 |
66440520 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_trans.992617842 |
|
|
Oct 02 09:03:47 PM UTC 24 |
Oct 02 09:03:50 PM UTC 24 |
480039083 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_frequency_timeout.3887958139 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:50 PM UTC 24 |
1974685925 ps |
T390 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_regwen.958499730 |
|
|
Oct 02 09:03:45 PM UTC 24 |
Oct 02 09:03:51 PM UTC 24 |
774727775 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_lc_clk_byp_req_intersig_mubi.797064536 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:03:51 PM UTC 24 |
43135435 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_clk_handshake_intersig_mubi.551982529 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:03:51 PM UTC 24 |
24491566 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_extclk.2506877234 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
31019147 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_peri.552913216 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
19894675 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_div_intersig_mubi.2116416393 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
72842320 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_stress_all.1445105448 |
|
|
Oct 02 09:02:34 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
9452078290 ps |
T397 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_smoke.1044088935 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
27893503 ps |
T398 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_alert_test.1902954188 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
105394001 ps |
T399 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_frequency_timeout.1163378070 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
931354266 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_frequency.243959603 |
|
|
Oct 02 09:03:46 PM UTC 24 |
Oct 02 09:03:52 PM UTC 24 |
443871238 ps |
T56 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_stress_all_with_rand_reset.2219950045 |
|
|
Oct 02 09:02:56 PM UTC 24 |
Oct 02 09:03:53 PM UTC 24 |
3762571014 ps |
T401 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/20.clkmgr_frequency.4050874902 |
|
|
Oct 02 09:03:42 PM UTC 24 |
Oct 02 09:03:53 PM UTC 24 |
2044172903 ps |
T402 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_trans.1647193634 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:54 PM UTC 24 |
28394108 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_clk_status.3627374234 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:54 PM UTC 24 |
12503667 ps |
T404 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_idle_intersig_mubi.3536853472 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:54 PM UTC 24 |
18968397 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_clk_handshake_intersig_mubi.226128334 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:54 PM UTC 24 |
18175245 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_lc_ctrl_intersig_mubi.2167583881 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:54 PM UTC 24 |
21784623 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_lc_clk_byp_req_intersig_mubi.2818053637 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:55 PM UTC 24 |
61638614 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_regwen.2228684349 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:03:55 PM UTC 24 |
770392887 ps |
T57 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_stress_all_with_rand_reset.4009273185 |
|
|
Oct 02 09:02:47 PM UTC 24 |
Oct 02 09:03:55 PM UTC 24 |
12879061204 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_div_intersig_mubi.2006001427 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:03:56 PM UTC 24 |
25398686 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_alert_test.2592710178 |
|
|
Oct 02 09:03:53 PM UTC 24 |
Oct 02 09:03:56 PM UTC 24 |
22121748 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_stress_all.550324259 |
|
|
Oct 02 09:03:34 PM UTC 24 |
Oct 02 09:03:59 PM UTC 24 |
2617228793 ps |
T58 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_stress_all_with_rand_reset.3889932934 |
|
|
Oct 02 09:02:34 PM UTC 24 |
Oct 02 09:04:00 PM UTC 24 |
4717642741 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_smoke.1677197875 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:00 PM UTC 24 |
17379748 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_clk_status.1533575460 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:00 PM UTC 24 |
21582304 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_lc_clk_byp_req_intersig_mubi.133650406 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:00 PM UTC 24 |
15363869 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_clk_handshake_intersig_mubi.850466071 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:00 PM UTC 24 |
46895015 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_lc_ctrl_intersig_mubi.2336405463 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
22437125 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_peri.539515538 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
99424206 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_div_intersig_mubi.2624486433 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
49403976 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_extclk.3521000781 |
|
|
Oct 02 09:03:58 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
38444396 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_smoke.235411662 |
|
|
Oct 02 09:03:58 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
22669749 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_idle_intersig_mubi.3973646179 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
62837473 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_alert_test.4019288926 |
|
|
Oct 02 09:03:58 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
56201777 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_extclk.3439101583 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
111350765 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_trans.2547842545 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:01 PM UTC 24 |
111822543 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_regwen.488095865 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:04:03 PM UTC 24 |
1263952802 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_frequency_timeout.3552001840 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:04:04 PM UTC 24 |
1702466243 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_frequency.4131645471 |
|
|
Oct 02 09:03:50 PM UTC 24 |
Oct 02 09:04:04 PM UTC 24 |
2248469044 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_frequency_timeout.110691064 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:05 PM UTC 24 |
1241449664 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_alert_test.2492298840 |
|
|
Oct 02 09:04:03 PM UTC 24 |
Oct 02 09:04:05 PM UTC 24 |
39717312 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_extclk.3657649069 |
|
|
Oct 02 09:04:03 PM UTC 24 |
Oct 02 09:04:05 PM UTC 24 |
30580642 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_idle_intersig_mubi.3695938862 |
|
|
Oct 02 09:04:02 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
28315445 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_clk_status.480358389 |
|
|
Oct 02 09:04:02 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
43902026 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_lc_ctrl_intersig_mubi.575541514 |
|
|
Oct 02 09:04:03 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
25039673 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_peri.795245939 |
|
|
Oct 02 09:04:02 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
21063756 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_regwen.3696257538 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
1382735008 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_stress_all.2642932319 |
|
|
Oct 02 09:03:21 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
11825134828 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_trans.218698007 |
|
|
Oct 02 09:04:02 PM UTC 24 |
Oct 02 09:04:06 PM UTC 24 |
44056477 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_frequency.2967557756 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:10 PM UTC 24 |
1771251006 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_frequency.986185797 |
|
|
Oct 02 09:04:03 PM UTC 24 |
Oct 02 09:04:10 PM UTC 24 |
804021178 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_frequency.813651855 |
|
|
Oct 02 09:03:58 PM UTC 24 |
Oct 02 09:04:11 PM UTC 24 |
1889662714 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/18.clkmgr_stress_all_with_rand_reset.3840670238 |
|
|
Oct 02 09:03:37 PM UTC 24 |
Oct 02 09:04:11 PM UTC 24 |
5340214124 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_alert_test.1833865500 |
|
|
Oct 02 09:04:09 PM UTC 24 |
Oct 02 09:04:11 PM UTC 24 |
15548371 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_peri.936825449 |
|
|
Oct 02 09:04:06 PM UTC 24 |
Oct 02 09:04:12 PM UTC 24 |
31668703 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_trans.1491163286 |
|
|
Oct 02 09:04:06 PM UTC 24 |
Oct 02 09:04:12 PM UTC 24 |
38505645 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_frequency_timeout.628306214 |
|
|
Oct 02 09:04:05 PM UTC 24 |
Oct 02 09:04:14 PM UTC 24 |
869483837 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_idle_intersig_mubi.1907640641 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
22773002 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_clk_status.4041214932 |
|
|
Oct 02 09:04:06 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
54737181 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_lc_clk_byp_req_intersig_mubi.4195348981 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
29025714 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_lc_ctrl_intersig_mubi.119355324 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
125958445 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_div_intersig_mubi.861239126 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
86510488 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_clk_handshake_intersig_mubi.2107280355 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:15 PM UTC 24 |
237034118 ps |
T164 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_stress_all_with_rand_reset.1004993211 |
|
|
Oct 02 09:03:33 PM UTC 24 |
Oct 02 09:04:17 PM UTC 24 |
2529536455 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_stress_all.470454769 |
|
|
Oct 02 09:03:41 PM UTC 24 |
Oct 02 09:04:18 PM UTC 24 |
4614176042 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_stress_all_with_rand_reset.565578631 |
|
|
Oct 02 09:02:41 PM UTC 24 |
Oct 02 09:04:18 PM UTC 24 |
13180062099 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/24.clkmgr_frequency_timeout.616110796 |
|
|
Oct 02 09:04:00 PM UTC 24 |
Oct 02 09:04:19 PM UTC 24 |
2180285145 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_regwen.3229829508 |
|
|
Oct 02 09:04:07 PM UTC 24 |
Oct 02 09:04:19 PM UTC 24 |
1205290746 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_stress_all_with_rand_reset.576957445 |
|
|
Oct 02 09:03:28 PM UTC 24 |
Oct 02 09:04:19 PM UTC 24 |
7324828535 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_smoke.2675263767 |
|
|
Oct 02 09:04:11 PM UTC 24 |
Oct 02 09:04:20 PM UTC 24 |
42714411 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_extclk.1384205919 |
|
|
Oct 02 09:04:11 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
125808931 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_div_intersig_mubi.26541005 |
|
|
Oct 02 09:04:16 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
24261450 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_clk_handshake_intersig_mubi.85743027 |
|
|
Oct 02 09:04:16 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
16370013 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_lc_clk_byp_req_intersig_mubi.2750058181 |
|
|
Oct 02 09:04:16 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
31605130 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_lc_ctrl_intersig_mubi.3600808176 |
|
|
Oct 02 09:04:16 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
31110943 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_idle_intersig_mubi.2577873699 |
|
|
Oct 02 09:04:16 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
82975313 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_frequency.2082142346 |
|
|
Oct 02 09:04:11 PM UTC 24 |
Oct 02 09:04:21 PM UTC 24 |
204876514 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_frequency_timeout.3738882765 |
|
|
Oct 02 09:04:13 PM UTC 24 |
Oct 02 09:04:22 PM UTC 24 |
979387998 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_stress_all.2072033363 |
|
|
Oct 02 09:03:25 PM UTC 24 |
Oct 02 09:04:22 PM UTC 24 |
10917548724 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/23.clkmgr_stress_all_with_rand_reset.2833955416 |
|
|
Oct 02 09:03:55 PM UTC 24 |
Oct 02 09:04:22 PM UTC 24 |
3030391755 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/22.clkmgr_stress_all.2999626467 |
|
|
Oct 02 09:03:52 PM UTC 24 |
Oct 02 09:04:23 PM UTC 24 |
7478347878 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_stress_all_with_rand_reset.2788554144 |
|
|
Oct 02 09:03:25 PM UTC 24 |
Oct 02 09:04:24 PM UTC 24 |
4787928700 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_stress_all_with_rand_reset.2507030076 |
|
|
Oct 02 09:03:21 PM UTC 24 |
Oct 02 09:04:24 PM UTC 24 |
4063139626 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/19.clkmgr_stress_all_with_rand_reset.3292540764 |
|
|
Oct 02 09:03:40 PM UTC 24 |
Oct 02 09:04:24 PM UTC 24 |
8824127580 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_stress_all_with_rand_reset.1070091023 |
|
|
Oct 02 09:03:18 PM UTC 24 |
Oct 02 09:04:25 PM UTC 24 |
9915107875 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_peri.3802193782 |
|
|
Oct 02 09:04:13 PM UTC 24 |
Oct 02 09:04:25 PM UTC 24 |
19450497 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_trans.4029233222 |
|
|
Oct 02 09:04:13 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
18903001 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_regwen.4113877209 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:37 PM UTC 24 |
488865705 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_clk_status.668727260 |
|
|
Oct 02 09:04:13 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
23515376 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_smoke.4047325366 |
|
|
Oct 02 09:04:20 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
24101122 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_regwen.900873496 |
|
|
Oct 02 09:04:18 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
1322220981 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_alert_test.3689307939 |
|
|
Oct 02 09:04:20 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
22803162 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_clk_status.3936085485 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
16420185 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_idle_intersig_mubi.149791993 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
57258158 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_extclk.4110189869 |
|
|
Oct 02 09:04:20 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
23449981 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_peri.1121901944 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
15520687 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_lc_ctrl_intersig_mubi.4031429217 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
24700295 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_clk_handshake_intersig_mubi.2624050828 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
43415529 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_lc_clk_byp_req_intersig_mubi.820379458 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
21746170 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_trans.686739674 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:26 PM UTC 24 |
83167387 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_div_intersig_mubi.1596834537 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:27 PM UTC 24 |
31650580 ps |
T166 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_stress_all_with_rand_reset.4247413328 |
|
|
Oct 02 09:03:15 PM UTC 24 |
Oct 02 09:04:27 PM UTC 24 |
4960147478 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_stress_all_with_rand_reset.2766768000 |
|
|
Oct 02 09:02:53 PM UTC 24 |
Oct 02 09:04:27 PM UTC 24 |
14324012066 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_regwen.1996998290 |
|
|
Oct 02 09:04:23 PM UTC 24 |
Oct 02 09:04:28 PM UTC 24 |
211657064 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_frequency.3296009961 |
|
|
Oct 02 09:04:20 PM UTC 24 |
Oct 02 09:04:29 PM UTC 24 |
565801641 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_stress_all.3630337152 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:04:29 PM UTC 24 |
7843389834 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_peri.1397500462 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:30 PM UTC 24 |
23240064 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_smoke.889606714 |
|
|
Oct 02 09:04:25 PM UTC 24 |
Oct 02 09:04:30 PM UTC 24 |
29037583 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_trans.3895204448 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:30 PM UTC 24 |
63427193 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_alert_test.3104372895 |
|
|
Oct 02 09:04:25 PM UTC 24 |
Oct 02 09:04:30 PM UTC 24 |
45833383 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_clk_status.266302820 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
104806798 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_clk_handshake_intersig_mubi.26701984 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
19578854 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_trans.2141341429 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
17180058 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_clk_status.4187037219 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
25390213 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_lc_ctrl_intersig_mubi.1012681038 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
16324656 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_lc_clk_byp_req_intersig_mubi.1197464712 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
32981250 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_extclk.1281156289 |
|
|
Oct 02 09:04:25 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
97053689 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_frequency.1145487118 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:39 PM UTC 24 |
558944107 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_peri.38740752 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
105638774 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_idle_intersig_mubi.1947882737 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
27711783 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_div_intersig_mubi.2708246437 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
41876885 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_extclk.2078904295 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
55603307 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_frequency.887000714 |
|
|
Oct 02 09:04:25 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
213300944 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_alert_test.3738782115 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
13990432 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_smoke.4171439934 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
47096399 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/21.clkmgr_stress_all_with_rand_reset.7780990 |
|
|
Oct 02 09:03:49 PM UTC 24 |
Oct 02 09:04:31 PM UTC 24 |
4914930087 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_stress_all.2126980866 |
|
|
Oct 02 09:04:09 PM UTC 24 |
Oct 02 09:04:32 PM UTC 24 |
3369559899 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/26.clkmgr_stress_all.4222460695 |
|
|
Oct 02 09:04:18 PM UTC 24 |
Oct 02 09:04:32 PM UTC 24 |
2632938749 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_idle_intersig_mubi.1455028934 |
|
|
Oct 02 09:04:30 PM UTC 24 |
Oct 02 09:04:32 PM UTC 24 |
17812550 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_lc_ctrl_intersig_mubi.3319846707 |
|
|
Oct 02 09:04:31 PM UTC 24 |
Oct 02 09:04:32 PM UTC 24 |
12625348 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_lc_clk_byp_req_intersig_mubi.734896520 |
|
|
Oct 02 09:04:31 PM UTC 24 |
Oct 02 09:04:33 PM UTC 24 |
15237544 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/27.clkmgr_frequency_timeout.758125475 |
|
|
Oct 02 09:04:20 PM UTC 24 |
Oct 02 09:04:33 PM UTC 24 |
1713199481 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_frequency_timeout.2565222666 |
|
|
Oct 02 09:04:25 PM UTC 24 |
Oct 02 09:04:33 PM UTC 24 |
622829372 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/28.clkmgr_regwen.1545162906 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:34 PM UTC 24 |
643719664 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_frequency_timeout.3140452458 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:34 PM UTC 24 |
864944048 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_regwen.3512273166 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:38 PM UTC 24 |
465062068 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_clk_handshake_intersig_mubi.2602623440 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
35866043 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_extclk.1542239736 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
49759225 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_smoke.1436572260 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
22636613 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_peri.3434255180 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
31620571 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_alert_test.1177356403 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
23730524 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_alert_test.3687121394 |
|
|
Oct 02 09:04:34 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
39075149 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_peri.3057102696 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
17209568 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_div_intersig_mubi.1548725450 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
130429525 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_clk_status.538050150 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
39011565 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_trans.1665982905 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
33842896 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_div_intersig_mubi.626196460 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
28584380 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_idle_intersig_mubi.249173769 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
31980300 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_extclk.1671687743 |
|
|
Oct 02 09:04:34 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
17708109 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_lc_clk_byp_req_intersig_mubi.1883128184 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
28855176 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_lc_ctrl_intersig_mubi.2220984373 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:35 PM UTC 24 |
34460833 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_smoke.1553913561 |
|
|
Oct 02 09:04:34 PM UTC 24 |
Oct 02 09:04:36 PM UTC 24 |
100450670 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_trans.3579366206 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
20544159 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_clk_handshake_intersig_mubi.1756627618 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:36 PM UTC 24 |
141488329 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/30.clkmgr_frequency_timeout.863447379 |
|
|
Oct 02 09:04:33 PM UTC 24 |
Oct 02 09:04:36 PM UTC 24 |
398185151 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_frequency_timeout.1864566551 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:39 PM UTC 24 |
263073738 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/32.clkmgr_div_intersig_mubi.3717199807 |
|
|
Oct 02 09:04:38 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
15833446 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/32.clkmgr_lc_clk_byp_req_intersig_mubi.833085021 |
|
|
Oct 02 09:04:38 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
43266024 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/36.clkmgr_lc_ctrl_intersig_mubi.2375249979 |
|
|
Oct 02 09:04:53 PM UTC 24 |
Oct 02 09:04:56 PM UTC 24 |
50362766 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/32.clkmgr_lc_ctrl_intersig_mubi.2790742544 |
|
|
Oct 02 09:04:38 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
41074750 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/25.clkmgr_stress_all_with_rand_reset.2812969322 |
|
|
Oct 02 09:04:09 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
7901358085 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_idle_intersig_mubi.3792634337 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
16689807 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_clk_status.2328006060 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
31124342 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/29.clkmgr_frequency.707692358 |
|
|
Oct 02 09:04:28 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
1399553908 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/32.clkmgr_clk_handshake_intersig_mubi.2813365155 |
|
|
Oct 02 09:04:38 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
125575560 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/36.clkmgr_smoke.3845434952 |
|
|
Oct 02 09:04:51 PM UTC 24 |
Oct 02 09:04:56 PM UTC 24 |
30348284 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_lc_clk_byp_req_intersig_mubi.3185813537 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
28871201 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_lc_ctrl_intersig_mubi.1878959483 |
|
|
Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
82373352 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/32.clkmgr_smoke.703614215 |
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Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
15805133 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_alert_test.1629731385 |
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Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
23282280 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/31.clkmgr_div_intersig_mubi.3076335096 |
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Oct 02 09:04:36 PM UTC 24 |
Oct 02 09:04:41 PM UTC 24 |
21050406 ps |