Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.47 99.10 95.68 100.00 100.00 98.70 97.02 98.80


Total tests in report: 995
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
53.72 53.72 68.90 68.90 46.43 46.43 82.45 82.45 0.00 0.00 74.55 74.55 71.59 71.59 32.14 32.14 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_clk_handshake_intersig_mubi.157778390
84.56 30.84 95.07 26.17 78.08 31.65 84.70 2.25 100.00 100.00 95.17 20.62 84.23 12.64 54.70 22.56 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_frequency.1723104330
88.38 3.81 95.66 0.59 80.30 2.22 90.66 5.96 100.00 0.00 95.90 0.73 84.52 0.28 71.62 16.92 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_regwen.316164878
91.01 2.63 96.77 1.11 84.05 3.75 95.09 4.43 100.00 0.00 97.35 1.45 87.93 3.41 75.90 4.27 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_smoke.371154780
92.78 1.77 97.57 0.80 86.31 2.26 95.73 0.64 100.00 0.00 97.97 0.62 89.49 1.56 82.39 6.50 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_stress_all_with_rand_reset.601522444
94.18 1.40 97.99 0.42 90.71 4.40 95.73 0.00 100.00 0.00 98.08 0.10 92.33 2.84 84.44 2.05 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.613694079
95.16 0.97 98.35 0.35 91.24 0.52 97.83 2.09 100.00 0.00 98.60 0.52 93.61 1.28 86.50 2.05 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_sec_cm.3249164431
95.92 0.76 98.82 0.47 93.10 1.86 98.95 1.13 100.00 0.00 98.60 0.00 93.75 0.14 88.21 1.71 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_frequency_timeout.3924895015
96.52 0.60 98.94 0.12 93.58 0.48 99.44 0.48 100.00 0.00 98.60 0.00 96.88 3.12 88.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_clk_status.2809686812
97.10 0.58 98.94 0.00 93.74 0.16 99.44 0.00 100.00 0.00 98.60 0.00 96.88 0.00 92.14 3.93 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_idle_intersig_mubi.774985556
97.41 0.30 98.99 0.05 94.19 0.44 99.44 0.00 100.00 0.00 98.70 0.10 96.88 0.00 93.68 1.54 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1639851131
97.65 0.24 98.99 0.00 94.19 0.00 99.44 0.00 100.00 0.00 98.70 0.00 96.88 0.00 95.38 1.71 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_clk_handshake_intersig_mubi.2324566819
97.81 0.16 98.99 0.00 94.35 0.16 99.52 0.08 100.00 0.00 98.70 0.00 96.88 0.00 96.24 0.85 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_peri.3531236510
97.93 0.12 98.99 0.00 94.35 0.00 99.52 0.00 100.00 0.00 98.70 0.00 96.88 0.00 97.09 0.85 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_stress_all.1388113864
98.03 0.10 98.99 0.00 94.35 0.00 99.52 0.00 100.00 0.00 98.70 0.00 96.88 0.00 97.78 0.68 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_stress_all_with_rand_reset.1004993211
98.12 0.09 99.10 0.12 94.55 0.20 99.84 0.32 100.00 0.00 98.70 0.00 96.88 0.00 97.78 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_alert_test.1949184559
98.18 0.05 99.10 0.00 94.79 0.24 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.14 97.78 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.2025614254
98.22 0.05 99.10 0.00 94.79 0.00 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.12 0.34 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_extclk.3561943197
98.27 0.05 99.10 0.00 94.79 0.00 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.46 0.34 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_frequency_timeout.677086706
98.31 0.03 99.10 0.00 95.03 0.24 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.46 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.2020172649
98.34 0.03 99.10 0.00 95.07 0.04 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.63 0.17 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_stress_all.2846361931
98.36 0.02 99.10 0.00 95.07 0.00 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.80 0.17 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_idle_intersig_mubi.2568916318
98.39 0.02 99.10 0.00 95.24 0.16 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.80 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.256721007
98.41 0.02 99.10 0.00 95.40 0.16 99.84 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.80 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.4018152675
98.43 0.02 99.10 0.00 95.40 0.00 100.00 0.16 100.00 0.00 98.70 0.00 97.02 0.00 98.80 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_sec_cm.3059729881
98.44 0.01 99.10 0.00 95.48 0.08 100.00 0.00 100.00 0.00 98.70 0.00 97.02 0.00 98.80 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.3981297054

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.391552426
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.1111841891
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3585926072
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2458145686
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.1862996520
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.3889170370
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.1135513152
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1674431793
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3035611356
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.1860170588
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.122537175
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.4272996989
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3222591584
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.252112020
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.103558916
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3786218425
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.3629979121
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.3729458033
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1730244001
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2289214813
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.4177345076
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.2097795542
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2543858814
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.484389098
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2023837629
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.767412363
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.1885646681
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.307158165
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.1511536883
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.4087597828
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.869682106
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.736521690
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.242886900
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3888233806
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.4124887966
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.156193715
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.1513019382
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2833212636
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.231583537
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2891007782
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.339049040
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.598556542
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.3030278551
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.1029239206
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.709182934
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.940819713
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.3276998404
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.768887923
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.1017748306
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.696421641
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3264559466
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.1349796731
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2452339883
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.2500097537
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.573437445
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.1610677690
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.400494672
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.1299981027
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.956764074
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.771897621
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3164357110
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.2444068634
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.343059156
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3262982805
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.4017194819
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.1575201390
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.914222582
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.4064731485
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.4141709880
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.4131251230
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1947092467
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.2442651512
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.1999924501
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.1868795288
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.3595729979
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1602279845
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.718607452
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.2695374128
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1207017745
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2701760318
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.1408225753
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.3496215192
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.671023990
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1977698571
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.3280695922
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.1901885526
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.397687483
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.2587894930
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.3219517823
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_frequency.1800949926
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_lc_clk_byp_req_intersig_mubi.299512654
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_lc_ctrl_intersig_mubi.1375292656
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_clk_status.2082287694
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_frequency.480227517
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_idle_intersig_mubi.2172638319
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_lc_clk_byp_req_intersig_mubi.3317569630
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_lc_ctrl_intersig_mubi.2687299921
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_peri.1335134287
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_regwen.1537285114
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_smoke.2619801284
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_stress_all.1266826372
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_stress_all_with_rand_reset.2219950045
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_trans.37645649
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_alert_test.2523049608
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_clk_handshake_intersig_mubi.3307660403
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_clk_status.3417012742
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_div_intersig_mubi.2120182955
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_extclk.2405337591
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_frequency.3338722428
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_frequency_timeout.2111038482
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_idle_intersig_mubi.1699136970
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_lc_clk_byp_req_intersig_mubi.355510933
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_lc_ctrl_intersig_mubi.571321450
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_clk_handshake_intersig_mubi.3869468068
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_div_intersig_mubi.2561997801
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_extclk.2799975029
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_frequency.2837263411
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_idle_intersig_mubi.303018561
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_lc_clk_byp_req_intersig_mubi.3086544167
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_lc_ctrl_intersig_mubi.2792756697
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_peri.563998823
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_regwen.3546816650
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/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_stress_all.3475507158
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_stress_all_with_rand_reset.3552312226
/workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_trans.2570524439



Total test records in report: 995
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_extclk.529937670 Oct 02 09:02:31 PM UTC 24 Oct 02 09:02:33 PM UTC 24 80496316 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_smoke.3379337101 Oct 02 09:02:31 PM UTC 24 Oct 02 09:02:34 PM UTC 24 64201743 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_clk_status.2809686812 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:35 PM UTC 24 16256923 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_peri.3531236510 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:35 PM UTC 24 28030862 ps
T28 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_lc_clk_byp_req_intersig_mubi.563855568 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:35 PM UTC 24 48671082 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_trans.2422695773 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:35 PM UTC 24 34860436 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_clk_handshake_intersig_mubi.157778390 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:36 PM UTC 24 49377630 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_idle_intersig_mubi.2568916318 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:36 PM UTC 24 199256002 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_lc_ctrl_intersig_mubi.2625617980 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:36 PM UTC 24 130238388 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_div_intersig_mubi.4160315711 Oct 02 09:02:34 PM UTC 24 Oct 02 09:02:37 PM UTC 24 43276321 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_alert_test.1949184559 Oct 02 09:02:35 PM UTC 24 Oct 02 09:02:37 PM UTC 24 14968206 ps
T1 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_frequency.404171648 Oct 02 09:02:49 PM UTC 24 Oct 02 09:02:52 PM UTC 24 359179150 ps
T37 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_sec_cm.3249164431 Oct 02 09:02:34 PM UTC 24 Oct 02 09:02:38 PM UTC 24 153829393 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_clk_status.2105719071 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:38 PM UTC 24 17272646 ps
T39 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_peri.2988208960 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:38 PM UTC 24 13525420 ps
T40 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_smoke.371154780 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:38 PM UTC 24 22594375 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_extclk.3561943197 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:38 PM UTC 24 28129471 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_trans.2048129934 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:38 PM UTC 24 20837352 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_frequency_timeout.2596505510 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:39 PM UTC 24 179881304 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_div_intersig_mubi.46446648 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:40 PM UTC 24 19842294 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_clk_status.2321550802 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 21736133 ps
T68 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_lc_ctrl_intersig_mubi.3964742952 Oct 02 09:02:37 PM UTC 24 Oct 02 09:02:40 PM UTC 24 23235693 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_lc_clk_byp_req_intersig_mubi.3089433779 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:40 PM UTC 24 54036167 ps
T70 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_clk_handshake_intersig_mubi.3721468351 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:40 PM UTC 24 32668870 ps
T71 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_idle_intersig_mubi.2594877637 Oct 02 09:02:37 PM UTC 24 Oct 02 09:02:40 PM UTC 24 91975538 ps
T72 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_alert_test.2251210590 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:40 PM UTC 24 42187957 ps
T73 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_stress_all.1388113864 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:41 PM UTC 24 108216345 ps
T74 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_div_intersig_mubi.193300306 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 13539349 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_frequency_timeout.3924895015 Oct 02 09:02:33 PM UTC 24 Oct 02 09:02:41 PM UTC 24 1473196702 ps
T177 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_peri.3669057537 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 16432971 ps
T98 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_clk_status.4080079817 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:41 PM UTC 24 16818670 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_peri.1256924416 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:41 PM UTC 24 30751940 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_extclk.3985076848 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:42 PM UTC 24 45739216 ps
T182 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_lc_ctrl_intersig_mubi.2216136327 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:42 PM UTC 24 26138382 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_lc_clk_byp_req_intersig_mubi.1652426364 Oct 02 09:02:40 PM UTC 24 Oct 02 09:02:42 PM UTC 24 23671687 ps
T100 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_smoke.1652245583 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:42 PM UTC 24 82104058 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_clk_handshake_intersig_mubi.70646340 Oct 02 09:02:40 PM UTC 24 Oct 02 09:02:42 PM UTC 24 18573589 ps
T128 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_idle_intersig_mubi.556077435 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:42 PM UTC 24 36932172 ps
T129 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_trans.2804830110 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:42 PM UTC 24 31294208 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_frequency.1654927401 Oct 02 09:02:31 PM UTC 24 Oct 02 09:02:42 PM UTC 24 1989849337 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_sec_cm.3059729881 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:42 PM UTC 24 502498994 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/0.clkmgr_regwen.316164878 Oct 02 09:02:34 PM UTC 24 Oct 02 09:02:42 PM UTC 24 1274688574 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_div_intersig_mubi.3378757444 Oct 02 09:02:41 PM UTC 24 Oct 02 09:02:44 PM UTC 24 37709053 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_smoke.3667046135 Oct 02 09:02:41 PM UTC 24 Oct 02 09:02:44 PM UTC 24 16289205 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_alert_test.2813343438 Oct 02 09:02:41 PM UTC 24 Oct 02 09:02:44 PM UTC 24 126795782 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_frequency_timeout.2461788527 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:44 PM UTC 24 885183350 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_extclk.1494044129 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:45 PM UTC 24 26788368 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_peri.2068162407 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:45 PM UTC 24 47142125 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_lc_ctrl_intersig_mubi.497284221 Oct 02 09:02:43 PM UTC 24 Oct 02 09:02:45 PM UTC 24 66135886 ps
T130 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_trans.3008848150 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:45 PM UTC 24 124524605 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_lc_clk_byp_req_intersig_mubi.3115652756 Oct 02 09:02:43 PM UTC 24 Oct 02 09:02:45 PM UTC 24 21457981 ps
T99 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_sec_cm.398184245 Oct 02 09:02:41 PM UTC 24 Oct 02 09:02:45 PM UTC 24 306923547 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_clk_status.2016892132 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:45 PM UTC 24 116266316 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_idle_intersig_mubi.774985556 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:45 PM UTC 24 59402507 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_clk_handshake_intersig_mubi.2324566819 Oct 02 09:02:43 PM UTC 24 Oct 02 09:02:45 PM UTC 24 77669487 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_regwen.3117649005 Oct 02 09:02:38 PM UTC 24 Oct 02 09:02:46 PM UTC 24 1203929097 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_alert_test.1613039914 Oct 02 09:02:44 PM UTC 24 Oct 02 09:02:46 PM UTC 24 18638609 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_div_intersig_mubi.3205863964 Oct 02 09:02:44 PM UTC 24 Oct 02 09:02:46 PM UTC 24 19748417 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_frequency.1723104330 Oct 02 09:02:36 PM UTC 24 Oct 02 09:02:47 PM UTC 24 1979732368 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_extclk.384966829 Oct 02 09:02:45 PM UTC 24 Oct 02 09:02:47 PM UTC 24 36977640 ps
T190 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_smoke.3780517507 Oct 02 09:02:45 PM UTC 24 Oct 02 09:02:48 PM UTC 24 60733820 ps
T45 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_regwen.2725327576 Oct 02 09:02:44 PM UTC 24 Oct 02 09:02:48 PM UTC 24 458797431 ps
T191 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_trans.3665304457 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 45981386 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_clk_status.3104982920 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 19312494 ps
T46 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_frequency_timeout.3855088907 Oct 02 09:02:42 PM UTC 24 Oct 02 09:02:49 PM UTC 24 891449109 ps
T192 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_lc_ctrl_intersig_mubi.3040194570 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 33046994 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_peri.2698844098 Oct 02 09:02:46 PM UTC 24 Oct 02 09:02:49 PM UTC 24 65344980 ps
T75 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_regwen.1003917119 Oct 02 09:02:41 PM UTC 24 Oct 02 09:02:49 PM UTC 24 1271370693 ps
T194 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_idle_intersig_mubi.3285194782 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 44827005 ps
T195 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_lc_clk_byp_req_intersig_mubi.3796283441 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 17944560 ps
T89 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_clk_handshake_intersig_mubi.3603594182 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 42190513 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_div_intersig_mubi.48501932 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:49 PM UTC 24 111483268 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_sec_cm.1894037198 Oct 02 09:02:44 PM UTC 24 Oct 02 09:02:50 PM UTC 24 719171021 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/2.clkmgr_frequency.3839317666 Oct 02 09:02:39 PM UTC 24 Oct 02 09:02:50 PM UTC 24 2122841711 ps
T76 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_frequency_timeout.677086706 Oct 02 09:02:45 PM UTC 24 Oct 02 09:02:50 PM UTC 24 495600261 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_peri.4075598870 Oct 02 09:02:49 PM UTC 24 Oct 02 09:02:51 PM UTC 24 13206390 ps
T77 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_stress_all.765595565 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:51 PM UTC 24 176650748 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_extclk.2237789819 Oct 02 09:02:48 PM UTC 24 Oct 02 09:02:51 PM UTC 24 13624630 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_sec_cm.3977711611 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:51 PM UTC 24 348122569 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_smoke.2217417269 Oct 02 09:02:48 PM UTC 24 Oct 02 09:02:51 PM UTC 24 71706109 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_alert_test.669472045 Oct 02 09:02:48 PM UTC 24 Oct 02 09:02:51 PM UTC 24 123309288 ps
T200 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_trans.2370997675 Oct 02 09:02:49 PM UTC 24 Oct 02 09:02:51 PM UTC 24 127672027 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_smoke.1190401103 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 14423255 ps
T202 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_clk_handshake_intersig_mubi.4279814880 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 44688207 ps
T203 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_idle_intersig_mubi.3070560255 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 53435172 ps
T204 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_lc_clk_byp_req_intersig_mubi.676208012 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 41378647 ps
T205 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_lc_ctrl_intersig_mubi.2752893365 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:52 PM UTC 24 41017420 ps
T206 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_alert_test.547764251 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:53 PM UTC 24 37360166 ps
T207 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_extclk.410050338 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 69308357 ps
T171 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_clk_status.2978670789 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 46858021 ps
T208 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_trans.1263922869 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 41892002 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_lc_clk_byp_req_intersig_mubi.299512654 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:54 PM UTC 24 66386768 ps
T78 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_regwen.1039545206 Oct 02 09:02:50 PM UTC 24 Oct 02 09:02:55 PM UTC 24 795684393 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_lc_ctrl_intersig_mubi.1375292656 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:55 PM UTC 24 71772077 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_frequency.4250322923 Oct 02 09:02:45 PM UTC 24 Oct 02 09:02:55 PM UTC 24 1287715873 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_idle_intersig_mubi.2534509665 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:55 PM UTC 24 80225909 ps
T212 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_alert_test.1117779016 Oct 02 09:02:54 PM UTC 24 Oct 02 09:02:56 PM UTC 24 16336545 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_div_intersig_mubi.3271589574 Oct 02 09:02:53 PM UTC 24 Oct 02 09:02:56 PM UTC 24 75421951 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_smoke.2619801284 Oct 02 09:02:54 PM UTC 24 Oct 02 09:02:56 PM UTC 24 36116802 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/4.clkmgr_regwen.527349716 Oct 02 09:02:47 PM UTC 24 Oct 02 09:02:56 PM UTC 24 1278703508 ps
T215 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_extclk.935875391 Oct 02 09:02:54 PM UTC 24 Oct 02 09:02:56 PM UTC 24 20281225 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_regwen.2504035098 Oct 02 09:02:53 PM UTC 24 Oct 02 09:02:56 PM UTC 24 159277656 ps
T216 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_clk_handshake_intersig_mubi.1941929569 Oct 02 09:02:53 PM UTC 24 Oct 02 09:02:56 PM UTC 24 238789119 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_stress_all.3550795324 Oct 02 09:02:53 PM UTC 24 Oct 02 09:02:56 PM UTC 24 55256222 ps
T217 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_peri.1335134287 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:57 PM UTC 24 13578442 ps
T172 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_clk_status.2082287694 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:57 PM UTC 24 42670480 ps
T173 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_clk_status.3623064110 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:10 PM UTC 24 24357093 ps
T218 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_trans.37645649 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:57 PM UTC 24 42250733 ps
T219 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_idle_intersig_mubi.2172638319 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 28694793 ps
T220 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_frequency_timeout.2509000044 Oct 02 09:02:54 PM UTC 24 Oct 02 09:02:58 PM UTC 24 257020215 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_lc_ctrl_intersig_mubi.2687299921 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 28565160 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_lc_clk_byp_req_intersig_mubi.3317569630 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 74820754 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_clk_handshake_intersig_mubi.1824349119 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 30234469 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_regwen.1537285114 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 233739297 ps
T223 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_div_intersig_mubi.507817866 Oct 02 09:02:55 PM UTC 24 Oct 02 09:02:58 PM UTC 24 278647791 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_alert_test.3471624228 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 28632849 ps
T225 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_extclk.100265602 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:10 PM UTC 24 23872800 ps
T48 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_frequency_timeout.1787113577 Oct 02 09:02:52 PM UTC 24 Oct 02 09:02:59 PM UTC 24 737496432 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_smoke.1045211070 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:10 PM UTC 24 23507093 ps
T226 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_extclk.2405337591 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 16858728 ps
T227 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_smoke.712129176 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 27589969 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_peri.113856819 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 29348198 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_clk_status.3417012742 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 35443108 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_idle_intersig_mubi.1699136970 Oct 02 09:02:57 PM UTC 24 Oct 02 09:02:59 PM UTC 24 33529448 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_trans.3558101031 Oct 02 09:02:57 PM UTC 24 Oct 02 09:03:00 PM UTC 24 150365822 ps
T231 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_lc_clk_byp_req_intersig_mubi.355510933 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:01 PM UTC 24 18451277 ps
T232 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_lc_ctrl_intersig_mubi.571321450 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:01 PM UTC 24 21392317 ps
T233 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_alert_test.2523049608 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:01 PM UTC 24 32453521 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_clk_handshake_intersig_mubi.3307660403 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:01 PM UTC 24 144400446 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_div_intersig_mubi.2120182955 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:02 PM UTC 24 50270701 ps
T235 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_trans.2570524439 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 38914426 ps
T236 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_peri.563998823 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 48492566 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_frequency.480227517 Oct 02 09:02:54 PM UTC 24 Oct 02 09:03:03 PM UTC 24 677047889 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_smoke.3201824513 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 23137002 ps
T237 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_idle_intersig_mubi.303018561 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 16411138 ps
T238 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_extclk.2799975029 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 44123884 ps
T175 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_clk_status.2647399585 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 46380369 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_frequency.3272590381 Oct 02 09:02:42 PM UTC 24 Oct 02 09:03:03 PM UTC 24 2240795866 ps
T239 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_regwen.882056642 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:03 PM UTC 24 555786882 ps
T183 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_lc_ctrl_intersig_mubi.2792756697 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:03 PM UTC 24 27329063 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_stress_all.4153586685 Oct 02 09:02:50 PM UTC 24 Oct 02 09:03:04 PM UTC 24 2976765285 ps
T240 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_div_intersig_mubi.2561997801 Oct 02 09:03:02 PM UTC 24 Oct 02 09:03:04 PM UTC 24 62025220 ps
T241 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_lc_clk_byp_req_intersig_mubi.3086544167 Oct 02 09:03:02 PM UTC 24 Oct 02 09:03:04 PM UTC 24 57032543 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_clk_handshake_intersig_mubi.3869468068 Oct 02 09:03:02 PM UTC 24 Oct 02 09:03:04 PM UTC 24 96252443 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_frequency.3338722428 Oct 02 09:02:57 PM UTC 24 Oct 02 09:03:05 PM UTC 24 1295384358 ps
T242 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_alert_test.1631871432 Oct 02 09:03:03 PM UTC 24 Oct 02 09:03:05 PM UTC 24 16060298 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_regwen.3546816650 Oct 02 09:03:02 PM UTC 24 Oct 02 09:03:10 PM UTC 24 1620199606 ps
T243 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_smoke.2901897542 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:07 PM UTC 24 23010282 ps
T244 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_stress_all.198560002 Oct 02 09:03:07 PM UTC 24 Oct 02 09:03:10 PM UTC 24 71802768 ps
T245 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_trans.2833166716 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:07 PM UTC 24 36559543 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_extclk.3668643856 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:07 PM UTC 24 20683071 ps
T247 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_peri.2114837175 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:07 PM UTC 24 11531684 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_lc_ctrl_intersig_mubi.3491707385 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:07 PM UTC 24 44653475 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_clk_status.1004957315 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:08 PM UTC 24 107028817 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_lc_clk_byp_req_intersig_mubi.626880698 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:08 PM UTC 24 20773026 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_frequency_timeout.2111038482 Oct 02 09:02:57 PM UTC 24 Oct 02 09:03:08 PM UTC 24 2628670749 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_clk_handshake_intersig_mubi.287863987 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:08 PM UTC 24 42030624 ps
T251 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_idle_intersig_mubi.316598806 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:08 PM UTC 24 61757854 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/7.clkmgr_stress_all.1266826372 Oct 02 09:02:56 PM UTC 24 Oct 02 09:03:08 PM UTC 24 1480968950 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/5.clkmgr_frequency_timeout.680335665 Oct 02 09:02:49 PM UTC 24 Oct 02 09:03:08 PM UTC 24 2296673663 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_regwen.1941459359 Oct 02 09:03:06 PM UTC 24 Oct 02 09:03:08 PM UTC 24 118236808 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_alert_test.1927815062 Oct 02 09:03:07 PM UTC 24 Oct 02 09:03:09 PM UTC 24 28900224 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_div_intersig_mubi.294115402 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:09 PM UTC 24 475345047 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_peri.1905316338 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:11 PM UTC 24 109394701 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_frequency_timeout.3917928450 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:11 PM UTC 24 2078792806 ps
T257 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_trans.1056010391 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:11 PM UTC 24 63061694 ps
T258 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_lc_clk_byp_req_intersig_mubi.685514628 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:12 PM UTC 24 15395574 ps
T259 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_idle_intersig_mubi.851347926 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:12 PM UTC 24 41508315 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_clk_handshake_intersig_mubi.3447034661 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:12 PM UTC 24 37606222 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_lc_ctrl_intersig_mubi.1890255144 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:12 PM UTC 24 82234503 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_div_intersig_mubi.1616369113 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:13 PM UTC 24 98744736 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_regwen.1971064959 Oct 02 09:03:10 PM UTC 24 Oct 02 09:03:14 PM UTC 24 510834019 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_peri.3648265731 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:14 PM UTC 24 27324701 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_clk_status.2221775051 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:14 PM UTC 24 16400228 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_alert_test.444192716 Oct 02 09:03:11 PM UTC 24 Oct 02 09:03:14 PM UTC 24 99296712 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_trans.996396857 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:14 PM UTC 24 43505968 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_extclk.2364320202 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:14 PM UTC 24 288700859 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_lc_ctrl_intersig_mubi.1538880675 Oct 02 09:03:13 PM UTC 24 Oct 02 09:03:15 PM UTC 24 31275547 ps
T163 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_smoke.3382226546 Oct 02 09:03:11 PM UTC 24 Oct 02 09:03:15 PM UTC 24 377704469 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_lc_clk_byp_req_intersig_mubi.1837920035 Oct 02 09:03:13 PM UTC 24 Oct 02 09:03:15 PM UTC 24 44417251 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/3.clkmgr_stress_all.276889851 Oct 02 09:02:44 PM UTC 24 Oct 02 09:03:15 PM UTC 24 5269587041 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_idle_intersig_mubi.1887215867 Oct 02 09:03:13 PM UTC 24 Oct 02 09:03:15 PM UTC 24 57551348 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_clk_handshake_intersig_mubi.3036863639 Oct 02 09:03:13 PM UTC 24 Oct 02 09:03:16 PM UTC 24 31068106 ps
T17 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/6.clkmgr_frequency.1800949926 Oct 02 09:02:52 PM UTC 24 Oct 02 09:03:16 PM UTC 24 2360963870 ps
T18 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_frequency.1634639881 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:17 PM UTC 24 576862841 ps
T47 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_frequency.2860985420 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:17 PM UTC 24 1594778784 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_div_intersig_mubi.989146730 Oct 02 09:03:15 PM UTC 24 Oct 02 09:03:17 PM UTC 24 67558371 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_smoke.3866111020 Oct 02 09:03:15 PM UTC 24 Oct 02 09:03:17 PM UTC 24 38459173 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_alert_test.1332594578 Oct 02 09:03:15 PM UTC 24 Oct 02 09:03:17 PM UTC 24 63401371 ps
T275 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_frequency_timeout.3830729456 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:18 PM UTC 24 1219395820 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_stress_all.2846361931 Oct 02 09:03:15 PM UTC 24 Oct 02 09:03:18 PM UTC 24 98479896 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_peri.238493363 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:18 PM UTC 24 25065763 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_alert_test.862524232 Oct 02 09:03:25 PM UTC 24 Oct 02 09:03:28 PM UTC 24 48145964 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_frequency_timeout.3471107765 Oct 02 09:03:26 PM UTC 24 Oct 02 09:03:29 PM UTC 24 287104445 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_extclk.83736739 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:18 PM UTC 24 27317162 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_clk_status.1325941755 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:18 PM UTC 24 130956367 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/1.clkmgr_stress_all_with_rand_reset.601522444 Oct 02 09:02:38 PM UTC 24 Oct 02 09:03:19 PM UTC 24 5855251201 ps
T59 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_trans.1382307333 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:19 PM UTC 24 130027327 ps
T60 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_idle_intersig_mubi.1398744332 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:19 PM UTC 24 54117464 ps
T61 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_lc_ctrl_intersig_mubi.1087207329 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:19 PM UTC 24 81057217 ps
T62 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_lc_clk_byp_req_intersig_mubi.735135931 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:19 PM UTC 24 26600547 ps
T63 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_frequency_timeout.936819416 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:19 PM UTC 24 169862880 ps
T64 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_div_intersig_mubi.456983054 Oct 02 09:03:17 PM UTC 24 Oct 02 09:03:20 PM UTC 24 81562265 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_clk_handshake_intersig_mubi.2348853316 Oct 02 09:03:17 PM UTC 24 Oct 02 09:03:20 PM UTC 24 42101872 ps
T66 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_regwen.104569059 Oct 02 09:03:18 PM UTC 24 Oct 02 09:03:20 PM UTC 24 107522901 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/8.clkmgr_stress_all.3924938618 Oct 02 09:02:59 PM UTC 24 Oct 02 09:03:20 PM UTC 24 4274300817 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_frequency.2837263411 Oct 02 09:03:00 PM UTC 24 Oct 02 09:03:20 PM UTC 24 1878803442 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_alert_test.580162661 Oct 02 09:03:19 PM UTC 24 Oct 02 09:03:21 PM UTC 24 16225761 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_smoke.3528234820 Oct 02 09:03:19 PM UTC 24 Oct 02 09:03:21 PM UTC 24 37408110 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_peri.2323650903 Oct 02 09:03:19 PM UTC 24 Oct 02 09:03:21 PM UTC 24 14730788 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_extclk.1574688850 Oct 02 09:03:19 PM UTC 24 Oct 02 09:03:21 PM UTC 24 83231465 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/10.clkmgr_frequency.121130299 Oct 02 09:03:05 PM UTC 24 Oct 02 09:03:22 PM UTC 24 2246460628 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_trans.2898705231 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:30 PM UTC 24 215173773 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_frequency_timeout.3213551998 Oct 02 09:03:12 PM UTC 24 Oct 02 09:03:22 PM UTC 24 979314634 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/9.clkmgr_stress_all.3475507158 Oct 02 09:03:03 PM UTC 24 Oct 02 09:03:22 PM UTC 24 2144171081 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_smoke.755428245 Oct 02 09:03:29 PM UTC 24 Oct 02 09:03:31 PM UTC 24 29822276 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_idle_intersig_mubi.1873658822 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 25746395 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_clk_status.2264092329 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 18095976 ps
T292 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_lc_clk_byp_req_intersig_mubi.3229047067 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 31610609 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_lc_ctrl_intersig_mubi.233514154 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 17854962 ps
T95 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_clk_handshake_intersig_mubi.2661112757 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 83127719 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_trans.3165151235 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 82902972 ps
T295 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_div_intersig_mubi.486693922 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:23 PM UTC 24 105489201 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/11.clkmgr_frequency_timeout.2571177984 Oct 02 09:03:08 PM UTC 24 Oct 02 09:03:24 PM UTC 24 2064512077 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/12.clkmgr_regwen.1269224834 Oct 02 09:03:15 PM UTC 24 Oct 02 09:03:24 PM UTC 24 1418884933 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_peri.3296440284 Oct 02 09:03:22 PM UTC 24 Oct 02 09:03:24 PM UTC 24 21322418 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_alert_test.3819646335 Oct 02 09:03:22 PM UTC 24 Oct 02 09:03:25 PM UTC 24 62745319 ps
T299 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_extclk.135210937 Oct 02 09:03:22 PM UTC 24 Oct 02 09:03:25 PM UTC 24 82059763 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_smoke.3535476457 Oct 02 09:03:22 PM UTC 24 Oct 02 09:03:25 PM UTC 24 69111704 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_frequency.1844173193 Oct 02 09:03:19 PM UTC 24 Oct 02 09:03:25 PM UTC 24 441887672 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/14.clkmgr_regwen.1518023540 Oct 02 09:03:21 PM UTC 24 Oct 02 09:03:25 PM UTC 24 393666792 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_clk_status.4067055019 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 41619171 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_trans.2448679642 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 28492282 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_clk_handshake_intersig_mubi.1532968646 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 22622468 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_div_intersig_mubi.2924313402 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 91907232 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_lc_ctrl_intersig_mubi.2428348222 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 100211971 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_lc_clk_byp_req_intersig_mubi.3438000943 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:26 PM UTC 24 65784231 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/15.clkmgr_idle_intersig_mubi.4187702442 Oct 02 09:03:24 PM UTC 24 Oct 02 09:03:27 PM UTC 24 105182288 ps
T309 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_peri.3390238700 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 13323286 ps
T310 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/13.clkmgr_frequency.142383553 Oct 02 09:03:16 PM UTC 24 Oct 02 09:03:27 PM UTC 24 1520770379 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_extclk.2519175178 Oct 02 09:03:25 PM UTC 24 Oct 02 09:03:27 PM UTC 24 50729502 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_smoke.3387247572 Oct 02 09:03:25 PM UTC 24 Oct 02 09:03:28 PM UTC 24 14519792 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_clk_status.1827771387 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 52331965 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/17.clkmgr_peri.1484933603 Oct 02 09:03:30 PM UTC 24 Oct 02 09:03:32 PM UTC 24 35818382 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.2024119277 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 52164421 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_lc_clk_byp_req_intersig_mubi.267927968 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 16229928 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_div_intersig_mubi.3279058046 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 43946730 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_idle_intersig_mubi.2486144032 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:29 PM UTC 24 31550580 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_clk_handshake_intersig_mubi.3210543152 Oct 02 09:03:27 PM UTC 24 Oct 02 09:03:30 PM UTC 24 112821065 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_02/clkmgr-sim-vcs/coverage/default/16.clkmgr_alert_test.833823815 Oct 02 09:03:28 PM UTC 24 Oct 02 09:03:31 PM UTC 24 28712994 ps
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