SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 71 | 1 | T28 | 1 | T182 | 1 | T183 | 1 | |||
others[1] | 94 | 1 | T28 | 2 | T182 | 4 | T183 | 3 | |||
others[2] | 69 | 1 | T28 | 2 | T182 | 2 | T183 | 2 | |||
others[3] | 139 | 1 | T28 | 4 | T182 | 1 | T183 | 1 | |||
false | 27909 | 1 | T1 | 1 | T2 | 2 | T3 | 1 | |||
true | 23055 | 1 | T3 | 1 | T4 | 660 | T5 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 3 | 1 | T89 | 1 | T355 | 1 | T356 | 1 | |||
others[1] | 3 | 1 | T357 | 1 | T358 | 1 | T359 | 1 | |||
others[2] | 2 | 1 | T91 | 1 | T92 | 1 | - | - | |||
others[3] | 5 | 1 | T87 | 1 | T40 | 1 | T90 | 1 | |||
false | 12185 | 1 | T1 | 1 | T2 | 2 | T3 | 1 | |||
true | 3 | 1 | T93 | 1 | T360 | 1 | T361 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2550 | 1 | T4 | 89 | T43 | 80 | T94 | 20 | |||
others[1] | 2448 | 1 | T4 | 87 | T43 | 99 | T94 | 37 | |||
others[2] | 2436 | 1 | T4 | 48 | T43 | 99 | T28 | 2 | |||
others[3] | 3955 | 1 | T4 | 117 | T43 | 104 | T28 | 1 | |||
false | 7088 | 1 | T1 | 1 | T2 | 2 | T3 | 1 | |||
true | 1491 | 1 | T3 | 1 | T5 | 1 | T18 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2426 | 1 | T4 | 87 | T43 | 88 | T28 | 2 | |||
others[1] | 2417 | 1 | T4 | 78 | T43 | 84 | T28 | 2 | |||
others[2] | 2442 | 1 | T4 | 72 | T43 | 97 | T94 | 32 | |||
others[3] | 4065 | 1 | T4 | 119 | T43 | 124 | T28 | 2 | |||
false | 7108 | 1 | T1 | 1 | T2 | 2 | T3 | 1 | |||
true | 1488 | 1 | T3 | 1 | T5 | 1 | T18 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2319 | 1 | T2 | 2 | T4 | 75 | T43 | 83 | |||
others[1] | 2431 | 1 | T17 | 1 | T4 | 89 | T43 | 87 | |||
others[2] | 2421 | 1 | T4 | 73 | T43 | 83 | T94 | 30 | |||
others[3] | 4009 | 1 | T4 | 137 | T43 | 157 | T94 | 49 | |||
false | 7587 | 1 | T1 | 1 | T2 | 1 | T3 | 1 | |||
true | 40 | 1 | T60 | 1 | T61 | 1 | T103 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 79 | 1 | T28 | 2 | T182 | 1 | T183 | 3 | |||
others[1] | 84 | 1 | T28 | 1 | T183 | 1 | T223 | 2 | |||
others[2] | 93 | 1 | T28 | 3 | T182 | 1 | T183 | 3 | |||
others[3] | 134 | 1 | T28 | 1 | T182 | 5 | T183 | 2 | |||
false | 27872 | 1 | T1 | 1 | T2 | 2 | T3 | 1 | |||
true | 22859 | 1 | T3 | 1 | T4 | 676 | T5 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 7952 | 1 | T4 | 224 | T43 | 273 | T94 | 99 | |||
others[1] | 7758 | 1 | T4 | 245 | T43 | 259 | T94 | 87 | |||
others[2] | 7793 | 1 | T4 | 264 | T43 | 259 | T94 | 117 | |||
others[3] | 13319 | 1 | T12 | 3 | T4 | 422 | T43 | 462 | |||
false | 3936 | 1 | T4 | 114 | T43 | 120 | T94 | 54 | |||
true | 19331 | 1 | T1 | 1 | T2 | 2 | T3 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |