Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	398102096	4388	0	0
addr_rd_A	398102096	2955	0	0
bank0_info0_page_cfg_0_rd_A	398102096	4014	0	0
bank0_info0_page_cfg_1_rd_A	398102096	3807	0	0
bank0_info0_page_cfg_2_rd_A	398102096	4089	0	0
bank0_info0_page_cfg_3_rd_A	398102096	3253	0	0
bank0_info0_page_cfg_4_rd_A	398102096	3727	0	0
bank0_info0_page_cfg_5_rd_A	398102096	3573	0	0
bank0_info0_page_cfg_6_rd_A	398102096	3531	0	0
bank0_info0_page_cfg_7_rd_A	398102096	2709	0	0
bank0_info0_page_cfg_8_rd_A	398102096	4307	0	0
bank0_info0_page_cfg_9_rd_A	398102096	3611	0	0
bank0_info0_regwen_0_rd_A	398102096	2339	0	0
bank0_info0_regwen_1_rd_A	398102096	2625	0	0
bank0_info0_regwen_2_rd_A	398102096	2626	0	0
bank0_info0_regwen_3_rd_A	398102096	3241	0	0
bank0_info0_regwen_4_rd_A	398102096	2148	0	0
bank0_info0_regwen_5_rd_A	398102096	3247	0	0
bank0_info0_regwen_6_rd_A	398102096	2068	0	0
bank0_info0_regwen_7_rd_A	398102096	2761	0	0
bank0_info0_regwen_8_rd_A	398102096	2818	0	0
bank0_info0_regwen_9_rd_A	398102096	3034	0	0
bank0_info1_page_cfg_rd_A	398102096	4209	0	0
bank0_info1_regwen_rd_A	398102096	2969	0	0
bank0_info2_page_cfg_0_rd_A	398102096	3854	0	0
bank0_info2_page_cfg_1_rd_A	398102096	2959	0	0
bank0_info2_regwen_0_rd_A	398102096	2462	0	0
bank0_info2_regwen_1_rd_A	398102096	2867	0	0
bank1_info0_page_cfg_0_rd_A	398102096	3530	0	0
bank1_info0_page_cfg_1_rd_A	398102096	2484	0	0
bank1_info0_page_cfg_2_rd_A	398102096	4132	0	0
bank1_info0_page_cfg_3_rd_A	398102096	3626	0	0
bank1_info0_page_cfg_4_rd_A	398102096	3741	0	0
bank1_info0_page_cfg_5_rd_A	398102096	3394	0	0
bank1_info0_page_cfg_6_rd_A	398102096	4349	0	0
bank1_info0_page_cfg_7_rd_A	398102096	3681	0	0
bank1_info0_page_cfg_8_rd_A	398102096	3627	0	0
bank1_info0_page_cfg_9_rd_A	398102096	3236	0	0
bank1_info0_regwen_0_rd_A	398102096	2507	0	0
bank1_info0_regwen_1_rd_A	398102096	2337	0	0
bank1_info0_regwen_2_rd_A	398102096	2822	0	0
bank1_info0_regwen_3_rd_A	398102096	3092	0	0
bank1_info0_regwen_4_rd_A	398102096	3258	0	0
bank1_info0_regwen_5_rd_A	398102096	2803	0	0
bank1_info0_regwen_6_rd_A	398102096	1932	0	0
bank1_info0_regwen_7_rd_A	398102096	2520	0	0
bank1_info0_regwen_8_rd_A	398102096	1936	0	0
bank1_info0_regwen_9_rd_A	398102096	2445	0	0
bank1_info1_page_cfg_rd_A	398102096	4104	0	0
bank1_info1_regwen_rd_A	398102096	3086	0	0
bank1_info2_page_cfg_0_rd_A	398102096	3623	0	0
bank1_info2_page_cfg_1_rd_A	398102096	3891	0	0
bank1_info2_regwen_0_rd_A	398102096	2961	0	0
bank1_info2_regwen_1_rd_A	398102096	3492	0	0
bank_cfg_regwen_rd_A	398102096	3417	0	0
default_region_rd_A	398102096	3589	0	0
exec_rd_A	398102096	3312	0	0
fifo_lvl_rd_A	398102096	3039	0	0
fifo_rst_rd_A	398102096	3201	0	0
hw_info_cfg_override_rd_A	398102096	3147	0	0
intr_enable_rd_A	398102096	2975	0	0
mp_region_0_rd_A	398102096	2595	0	0
mp_region_1_rd_A	398102096	3188	0	0
mp_region_2_rd_A	398102096	3346	0	0
mp_region_3_rd_A	398102096	2915	0	0
mp_region_4_rd_A	398102096	1992	0	0
mp_region_5_rd_A	398102096	2635	0	0
mp_region_6_rd_A	398102096	3589	0	0
mp_region_7_rd_A	398102096	2502	0	0
mp_region_cfg_0_rd_A	398102096	4045	0	0
mp_region_cfg_1_rd_A	398102096	3303	0	0
mp_region_cfg_2_rd_A	398102096	3433	0	0
mp_region_cfg_3_rd_A	398102096	3362	0	0
mp_region_cfg_4_rd_A	398102096	3474	0	0
mp_region_cfg_5_rd_A	398102096	4331	0	0
mp_region_cfg_6_rd_A	398102096	3956	0	0
mp_region_cfg_7_rd_A	398102096	4233	0	0
phy_alert_cfg_rd_A	398102096	1847	0	0
region_cfg_regwen_0_rd_A	398102096	2385	0	0
region_cfg_regwen_1_rd_A	398102096	1926	0	0
region_cfg_regwen_2_rd_A	398102096	3265	0	0
region_cfg_regwen_3_rd_A	398102096	2604	0	0
region_cfg_regwen_4_rd_A	398102096	3222	0	0
region_cfg_regwen_5_rd_A	398102096	2888	0	0
region_cfg_regwen_6_rd_A	398102096	3054	0	0
region_cfg_regwen_7_rd_A	398102096	2021	0	0
scratch_rd_A	398102096	2470	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4388	0	0
T66	5557	4	0	0
T113	5362	3	0	0
T114	16796	3	0	0
T115	5627	165	0	0
T218	5101	423	0	0
T219	3827	154	0	0
T224	3463	6	0	0
T225	39844	1	0	0
T226	5992	193	0	0
T228	66626	3	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2955	0	0
T66	5557	5	0	0
T67	6555	9	0	0
T113	5362	8	0	0
T225	39844	24	0	0
T230	5578	7	0	0
T242	3866	2	0	0
T250	84659	82	0	0
T282	3827	4	0	0
T283	6745	7	0	0
T284	5348	9	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4014	0	0
T66	5557	6	0	0
T67	6555	29	0	0
T113	5362	5	0	0
T225	39844	93	0	0
T230	5578	25	0	0
T250	84659	337	0	0
T282	3827	16	0	0
T283	6745	53	0	0
T284	5348	10	0	0
T285	159117	921	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3807	0	0
T66	5557	5	0	0
T67	6555	34	0	0
T113	5362	11	0	0
T225	39844	28	0	0
T230	5578	7	0	0
T242	3866	16	0	0
T250	84659	321	0	0
T282	3827	4	0	0
T283	6745	37	0	0
T284	5348	2	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4089	0	0
T66	5557	9	0	0
T67	6555	25	0	0
T113	5362	9	0	0
T225	39844	90	0	0
T230	5578	7	0	0
T250	84659	316	0	0
T282	3827	11	0	0
T283	6745	7	0	0
T284	5348	36	0	0
T285	159117	1018	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3253	0	0
T66	5557	7	0	0
T67	6555	52	0	0
T113	5362	10	0	0
T225	39844	57	0	0
T230	5578	11	0	0
T242	3866	5	0	0
T250	84659	234	0	0
T282	3827	19	0	0
T283	6745	7	0	0
T286	2518	2	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3727	0	0
T66	5557	24	0	0
T67	6555	24	0	0
T113	5362	28	0	0
T225	39844	113	0	0
T230	5578	11	0	0
T242	3866	5	0	0
T250	84659	289	0	0
T282	3827	14	0	0
T283	6745	6	0	0
T286	2518	5	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3573	0	0
T66	5557	16	0	0
T67	6555	23	0	0
T113	5362	17	0	0
T225	39844	98	0	0
T230	5578	3	0	0
T242	3866	28	0	0
T250	84659	273	0	0
T283	6745	75	0	0
T284	5348	7	0	0
T285	159117	889	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3531	0	0
T66	5557	32	0	0
T67	6555	41	0	0
T113	5362	29	0	0
T225	39844	34	0	0
T230	5578	14	0	0
T242	3866	2	0	0
T250	84659	400	0	0
T283	6745	12	0	0
T284	5348	5	0	0
T285	159117	941	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2709	0	0
T66	5557	35	0	0
T67	6555	9	0	0
T113	5362	9	0	0
T225	39844	84	0	0
T230	5578	30	0	0
T242	3866	7	0	0
T250	84659	211	0	0
T282	3827	28	0	0
T283	6745	1	0	0
T284	5348	12	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4307	0	0
T66	5557	41	0	0
T67	6555	5	0	0
T113	5362	32	0	0
T225	39844	110	0	0
T230	5578	4	0	0
T242	3866	2	0	0
T250	84659	356	0	0
T282	3827	6	0	0
T283	6745	53	0	0
T286	2518	6	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3611	0	0
T66	5557	30	0	0
T67	6555	27	0	0
T113	5362	29	0	0
T225	39844	67	0	0
T230	5578	30	0	0
T242	3866	16	0	0
T250	84659	248	0	0
T282	3827	5	0	0
T283	6745	34	0	0
T286	2518	3	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2339	0	0
T66	5557	10	0	0
T67	6555	11	0	0
T113	5362	11	0	0
T225	39844	20	0	0
T230	5578	8	0	0
T242	3866	7	0	0
T250	84659	62	0	0
T283	6745	8	0	0
T284	5348	9	0	0
T286	2518	8	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2625	0	0
T66	5557	2	0	0
T67	6555	4	0	0
T113	5362	13	0	0
T225	39844	32	0	0
T230	5578	4	0	0
T250	84659	65	0	0
T282	3827	5	0	0
T283	6745	9	0	0
T284	5348	3	0	0
T286	2518	3	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2626	0	0
T66	5557	15	0	0
T67	6555	2	0	0
T113	5362	10	0	0
T225	39844	24	0	0
T230	5578	2	0	0
T242	3866	2	0	0
T250	84659	91	0	0
T282	3827	4	0	0
T283	6745	8	0	0
T284	5348	4	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3241	0	0
T66	5557	10	0	0
T67	6555	10	0	0
T113	5362	13	0	0
T225	39844	25	0	0
T230	5578	5	0	0
T250	84659	83	0	0
T282	3827	6	0	0
T283	6745	4	0	0
T284	5348	6	0	0
T285	159117	1004	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2148	0	0
T66	5557	6	0	0
T67	6555	8	0	0
T113	5362	8	0	0
T225	39844	25	0	0
T230	5578	7	0	0
T250	84659	52	0	0
T283	6745	10	0	0
T284	5348	11	0	0
T285	159117	495	0	0
T286	2518	1	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3247	0	0
T66	5557	17	0	0
T67	6555	9	0	0
T113	5362	11	0	0
T225	39844	26	0	0
T230	5578	5	0	0
T242	3866	7	0	0
T250	84659	76	0	0
T282	3827	7	0	0
T283	6745	10	0	0
T286	2518	9	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2068	0	0
T66	5557	16	0	0
T67	6555	1	0	0
T113	5362	11	0	0
T225	39844	18	0	0
T230	5578	8	0	0
T242	3866	3	0	0
T250	84659	69	0	0
T282	3827	3	0	0
T283	6745	9	0	0
T284	5348	6	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2761	0	0
T66	5557	13	0	0
T67	6555	13	0	0
T113	5362	13	0	0
T225	39844	17	0	0
T230	5578	8	0	0
T250	84659	68	0	0
T282	3827	6	0	0
T283	6745	5	0	0
T284	5348	9	0	0
T285	159117	987	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2818	0	0
T66	5557	9	0	0
T67	6555	12	0	0
T113	5362	4	0	0
T225	39844	12	0	0
T230	5578	9	0	0
T242	3866	9	0	0
T250	84659	89	0	0
T282	3827	1	0	0
T283	6745	9	0	0
T286	2518	2	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3034	0	0
T66	5557	7	0	0
T67	6555	4	0	0
T113	5362	10	0	0
T225	39844	5	0	0
T230	5578	9	0	0
T250	84659	72	0	0
T283	6745	6	0	0
T284	5348	18	0	0
T285	159117	1075	0	0
T287	18209	21	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4209	0	0
T66	5557	10	0	0
T67	6555	1	0	0
T113	5362	15	0	0
T225	39844	61	0	0
T230	5578	35	0	0
T242	3866	15	0	0
T250	84659	253	0	0
T282	3827	11	0	0
T283	6745	18	0	0
T284	5348	21	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2969	0	0
T66	5557	5	0	0
T67	6555	12	0	0
T113	5362	12	0	0
T225	39844	21	0	0
T230	5578	6	0	0
T250	84659	79	0	0
T282	3827	1	0	0
T283	6745	4	0	0
T284	5348	9	0	0
T285	159117	998	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3854	0	0
T66	5557	3	0	0
T67	6555	33	0	0
T113	5362	18	0	0
T225	39844	121	0	0
T230	5578	34	0	0
T242	3866	9	0	0
T250	84659	333	0	0
T282	3827	17	0	0
T283	6745	60	0	0
T284	5348	1	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2959	0	0
T66	5557	42	0	0
T67	6555	51	0	0
T113	5362	42	0	0
T225	39844	114	0	0
T230	5578	32	0	0
T242	3866	19	0	0
T250	84659	270	0	0
T282	3827	17	0	0
T283	6745	46	0	0
T284	5348	7	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2462	0	0
T66	5557	4	0	0
T67	6555	12	0	0
T113	5362	5	0	0
T225	39844	17	0	0
T230	5578	1	0	0
T250	84659	76	0	0
T282	3827	6	0	0
T283	6745	10	0	0
T284	5348	6	0	0
T286	2518	4	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2867	0	0
T66	5557	8	0	0
T67	6555	14	0	0
T113	5362	9	0	0
T225	39844	33	0	0
T242	3866	3	0	0
T250	84659	85	0	0
T282	3827	4	0	0
T283	6745	8	0	0
T284	5348	8	0	0
T285	159117	509	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3530	0	0
T66	5557	4	0	0
T67	6555	54	0	0
T113	5362	33	0	0
T225	39844	73	0	0
T230	5578	20	0	0
T250	84659	338	0	0
T282	3827	4	0	0
T283	6745	7	0	0
T284	5348	1	0	0
T285	159117	1009	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2484	0	0
T66	5557	6	0	0
T67	6555	39	0	0
T113	5362	36	0	0
T225	39844	85	0	0
T230	5578	29	0	0
T250	84659	311	0	0
T282	3827	5	0	0
T283	6745	46	0	0
T284	5348	28	0	0
T285	159117	495	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4132	0	0
T66	5557	27	0	0
T67	6555	30	0	0
T113	5362	5	0	0
T225	39844	93	0	0
T230	5578	11	0	0
T242	3866	24	0	0
T250	84659	337	0	0
T282	3827	10	0	0
T283	6745	2	0	0
T286	2518	6	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3626	0	0
T66	5557	1	0	0
T67	6555	36	0	0
T113	5362	20	0	0
T225	39844	100	0	0
T230	5578	23	0	0
T242	3866	17	0	0
T250	84659	383	0	0
T283	6745	27	0	0
T284	5348	7	0	0
T285	159117	441	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3741	0	0
T66	5557	37	0	0
T67	6555	4	0	0
T113	5362	10	0	0
T225	39844	96	0	0
T230	5578	9	0	0
T242	3866	4	0	0
T250	84659	271	0	0
T282	3827	6	0	0
T283	6745	9	0	0
T286	2518	3	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3394	0	0
T66	5557	22	0	0
T67	6555	31	0	0
T113	5362	33	0	0
T225	39844	106	0	0
T230	5578	23	0	0
T242	3866	31	0	0
T250	84659	319	0	0
T282	3827	31	0	0
T283	6745	47	0	0
T284	5348	8	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4349	0	0
T66	5557	3	0	0
T67	6555	5	0	0
T113	5362	26	0	0
T225	39844	118	0	0
T230	5578	8	0	0
T250	84659	385	0	0
T282	3827	11	0	0
T283	6745	42	0	0
T284	5348	11	0	0
T285	159117	1068	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3681	0	0
T66	5557	7	0	0
T67	6555	34	0	0
T113	5362	36	0	0
T225	39844	124	0	0
T230	5578	22	0	0
T242	3866	16	0	0
T250	84659	261	0	0
T282	3827	6	0	0
T283	6745	26	0	0
T284	5348	28	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3627	0	0
T66	5557	29	0	0
T67	6555	6	0	0
T113	5362	10	0	0
T225	39844	95	0	0
T230	5578	15	0	0
T242	3866	20	0	0
T250	84659	364	0	0
T282	3827	6	0	0
T283	6745	35	0	0
T286	2518	7	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3236	0	0
T66	5557	10	0	0
T67	6555	10	0	0
T113	5362	11	0	0
T225	39844	120	0	0
T230	5578	45	0	0
T242	3866	7	0	0
T250	84659	350	0	0
T283	6745	50	0	0
T284	5348	27	0	0
T286	2518	1	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2507	0	0
T66	5557	7	0	0
T67	6555	9	0	0
T113	5362	12	0	0
T225	39844	28	0	0
T230	5578	9	0	0
T250	84659	62	0	0
T282	3827	1	0	0
T283	6745	8	0	0
T284	5348	10	0	0
T286	2518	5	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2337	0	0
T66	5557	8	0	0
T67	6555	7	0	0
T113	5362	11	0	0
T225	39844	15	0	0
T230	5578	4	0	0
T250	84659	57	0	0
T283	6745	4	0	0
T284	5348	9	0	0
T285	159117	1039	0	0
T288	6316	15	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2822	0	0
T66	5557	3	0	0
T67	6555	2	0	0
T113	5362	11	0	0
T225	39844	21	0	0
T230	5578	8	0	0
T242	3866	2	0	0
T250	84659	70	0	0
T282	3827	2	0	0
T283	6745	12	0	0
T284	5348	16	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3092	0	0
T66	5557	1	0	0
T67	6555	14	0	0
T113	5362	8	0	0
T225	39844	16	0	0
T230	5578	11	0	0
T250	84659	79	0	0
T283	6745	6	0	0
T284	5348	2	0	0
T285	159117	964	0	0
T288	6316	2	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3258	0	0
T66	5557	8	0	0
T67	6555	6	0	0
T113	5362	6	0	0
T225	39844	27	0	0
T230	5578	3	0	0
T250	84659	86	0	0
T283	6745	18	0	0
T284	5348	11	0	0
T285	159117	1038	0	0
T286	2518	1	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2803	0	0
T66	5557	8	0	0
T67	6555	2	0	0
T113	5362	13	0	0
T225	39844	20	0	0
T230	5578	9	0	0
T242	3866	8	0	0
T250	84659	97	0	0
T282	3827	5	0	0
T283	6745	11	0	0
T284	5348	6	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	1932	0	0
T66	5557	9	0	0
T67	6555	13	0	0
T113	5362	11	0	0
T225	39844	19	0	0
T230	5578	10	0	0
T242	3866	6	0	0
T250	84659	66	0	0
T283	6745	6	0	0
T284	5348	12	0	0
T286	2518	2	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2520	0	0
T66	5557	5	0	0
T67	6555	12	0	0
T113	5362	7	0	0
T225	39844	22	0	0
T230	5578	7	0	0
T250	84659	70	0	0
T282	3827	5	0	0
T283	6745	12	0	0
T284	5348	9	0	0
T287	18209	40	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	1936	0	0
T66	5557	11	0	0
T67	6555	2	0	0
T113	5362	12	0	0
T225	39844	28	0	0
T230	5578	2	0	0
T242	3866	1	0	0
T250	84659	63	0	0
T282	3827	1	0	0
T283	6745	10	0	0
T286	2518	2	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2445	0	0
T66	5557	5	0	0
T67	6555	5	0	0
T113	5362	9	0	0
T225	39844	21	0	0
T230	5578	9	0	0
T242	3866	7	0	0
T250	84659	83	0	0
T283	6745	19	0	0
T284	5348	3	0	0
T285	159117	468	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4104	0	0
T66	5557	40	0	0
T67	6555	5	0	0
T113	5362	1	0	0
T225	39844	89	0	0
T230	5578	9	0	0
T242	3866	3	0	0
T250	84659	292	0	0
T282	3827	11	0	0
T283	6745	19	0	0
T286	2518	5	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3086	0	0
T66	5557	7	0	0
T67	6555	10	0	0
T113	5362	6	0	0
T225	39844	15	0	0
T230	5578	10	0	0
T242	3866	2	0	0
T250	84659	74	0	0
T282	3827	1	0	0
T283	6745	16	0	0
T286	2518	7	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3623	0	0
T66	5557	3	0	0
T67	6555	8	0	0
T113	5362	4	0	0
T225	39844	64	0	0
T230	5578	36	0	0
T242	3866	19	0	0
T250	84659	211	0	0
T282	3827	23	0	0
T283	6745	54	0	0
T286	2518	4	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3891	0	0
T66	5557	40	0	0
T67	6555	30	0	0
T225	39844	72	0	0
T230	5578	24	0	0
T250	84659	287	0	0
T282	3827	4	0	0
T283	6745	29	0	0
T284	5348	54	0	0
T285	159117	997	0	0
T288	6316	22	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2961	0	0
T66	5557	10	0	0
T67	6555	9	0	0
T113	5362	1	0	0
T225	39844	23	0	0
T230	5578	4	0	0
T242	3866	5	0	0
T250	84659	81	0	0
T282	3827	1	0	0
T283	6745	6	0	0
T284	5348	4	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3492	0	0
T66	5557	4	0	0
T67	6555	15	0	0
T113	5362	4	0	0
T225	39844	23	0	0
T230	5578	16	0	0
T242	3866	3	0	0
T250	84659	75	0	0
T283	6745	18	0	0
T284	5348	8	0	0
T286	2518	7	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3417	0	0
T66	5557	3	0	0
T67	6555	9	0	0
T113	5362	10	0	0
T225	39844	39	0	0
T230	5578	12	0	0
T242	3866	3	0	0
T250	84659	87	0	0
T282	3827	6	0	0
T283	6745	10	0	0
T286	2518	8	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3589	0	0
T66	5557	25	0	0
T67	6555	16	0	0
T113	5362	6	0	0
T225	39844	70	0	0
T230	5578	18	0	0
T242	3866	25	0	0
T250	84659	278	0	0
T282	3827	13	0	0
T283	6745	30	0	0
T286	2518	1	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3312	0	0
T66	5557	11	0	0
T67	6555	3	0	0
T225	39844	21	0	0
T230	5578	5	0	0
T250	84659	80	0	0
T283	6745	13	0	0
T284	5348	10	0	0
T285	159117	1081	0	0
T287	18209	3	0	0
T289	6674	14	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3039	0	0
T66	5557	13	0	0
T67	6555	12	0	0
T113	5362	5	0	0
T225	39844	20	0	0
T230	5578	8	0	0
T242	3866	3	0	0
T250	84659	98	0	0
T283	6745	15	0	0
T284	5348	13	0	0
T285	159117	1004	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3201	0	0
T66	5557	4	0	0
T67	6555	11	0	0
T113	5362	16	0	0
T225	39844	21	0	0
T230	5578	12	0	0
T250	84659	94	0	0
T282	3827	3	0	0
T283	6745	8	0	0
T284	5348	8	0	0
T286	2518	6	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3147	0	0
T66	5557	3	0	0
T67	6555	7	0	0
T113	5362	10	0	0
T225	39844	33	0	0
T230	5578	16	0	0
T250	84659	119	0	0
T283	6745	7	0	0
T284	5348	5	0	0
T285	159117	990	0	0
T288	6316	4	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2975	0	0
T66	5557	40	0	0
T67	6555	3	0	0
T113	5362	29	0	0
T225	39844	78	0	0
T230	5578	15	0	0
T250	84659	196	0	0
T282	3827	5	0	0
T283	6745	9	0	0
T284	5348	24	0	0
T286	2518	2	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2595	0	0
T66	5557	11	0	0
T67	6555	15	0	0
T113	5362	4	0	0
T225	39844	50	0	0
T230	5578	10	0	0
T250	84659	117	0	0
T283	6745	9	0	0
T284	5348	3	0	0
T285	159117	516	0	0
T286	2518	6	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3188	0	0
T66	5557	6	0	0
T67	6555	17	0	0
T113	5362	26	0	0
T225	39844	33	0	0
T230	5578	12	0	0
T242	3866	10	0	0
T250	84659	95	0	0
T282	3827	9	0	0
T283	6745	16	0	0
T284	5348	11	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3346	0	0
T66	5557	2	0	0
T67	6555	16	0	0
T113	5362	13	0	0
T225	39844	16	0	0
T230	5578	17	0	0
T242	3866	2	0	0
T250	84659	127	0	0
T283	6745	14	0	0
T284	5348	16	0	0
T285	159117	963	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2915	0	0
T66	5557	13	0	0
T67	6555	5	0	0
T113	5362	9	0	0
T225	39844	46	0	0
T230	5578	13	0	0
T242	3866	3	0	0
T250	84659	128	0	0
T283	6745	21	0	0
T284	5348	3	0	0
T285	159117	456	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	1992	0	0
T66	5557	10	0	0
T67	6555	19	0	0
T113	5362	14	0	0
T225	39844	21	0	0
T230	5578	11	0	0
T250	84659	113	0	0
T283	6745	6	0	0
T284	5348	11	0	0
T286	2518	7	0	0
T290	5077	3	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2635	0	0
T66	5557	12	0	0
T67	6555	6	0	0
T113	5362	10	0	0
T225	39844	39	0	0
T230	5578	15	0	0
T250	84659	134	0	0
T283	6745	14	0	0
T284	5348	23	0	0
T286	2518	1	0	0
T288	6316	11	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3589	0	0
T66	5557	5	0	0
T67	6555	6	0	0
T113	5362	11	0	0
T225	39844	62	0	0
T230	5578	3	0	0
T250	84659	100	0	0
T283	6745	6	0	0
T284	5348	11	0	0
T285	159117	972	0	0
T288	6316	8	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2502	0	0
T66	5557	10	0	0
T67	6555	10	0	0
T113	5362	14	0	0
T225	39844	23	0	0
T230	5578	7	0	0
T242	3866	5	0	0
T250	84659	119	0	0
T283	6745	15	0	0
T284	5348	14	0	0
T286	2518	8	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4045	0	0
T66	5557	11	0	0
T67	6555	34	0	0
T113	5362	7	0	0
T225	39844	119	0	0
T230	5578	35	0	0
T242	3866	1	0	0
T250	84659	337	0	0
T282	3827	16	0	0
T283	6745	12	0	0
T284	5348	5	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3303	0	0
T66	5557	12	0	0
T67	6555	11	0	0
T113	5362	2	0	0
T225	39844	82	0	0
T230	5578	4	0	0
T242	3866	10	0	0
T250	84659	212	0	0
T282	3827	19	0	0
T283	6745	39	0	0
T284	5348	29	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3433	0	0
T66	5557	44	0	0
T67	6555	48	0	0
T113	5362	6	0	0
T225	39844	83	0	0
T230	5578	30	0	0
T242	3866	6	0	0
T250	84659	194	0	0
T283	6745	29	0	0
T284	5348	15	0	0
T286	2518	3	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3362	0	0
T66	5557	9	0	0
T67	6555	66	0	0
T113	5362	4	0	0
T225	39844	63	0	0
T230	5578	7	0	0
T242	3866	2	0	0
T250	84659	424	0	0
T282	3827	11	0	0
T283	6745	25	0	0
T286	2518	5	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3474	0	0
T66	5557	10	0	0
T67	6555	33	0	0
T113	5362	38	0	0
T225	39844	80	0	0
T230	5578	26	0	0
T242	3866	1	0	0
T250	84659	312	0	0
T282	3827	7	0	0
T283	6745	49	0	0
T286	2518	1	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4331	0	0
T66	5557	38	0	0
T67	6555	31	0	0
T113	5362	10	0	0
T225	39844	82	0	0
T230	5578	50	0	0
T242	3866	1	0	0
T250	84659	326	0	0
T282	3827	15	0	0
T283	6745	26	0	0
T286	2518	1	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3956	0	0
T66	5557	27	0	0
T67	6555	35	0	0
T113	5362	35	0	0
T225	39844	102	0	0
T230	5578	7	0	0
T250	84659	395	0	0
T283	6745	74	0	0
T284	5348	13	0	0
T285	159117	1000	0	0
T286	2518	4	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	4233	0	0
T67	6555	28	0	0
T113	5362	16	0	0
T225	39844	81	0	0
T230	5578	8	0	0
T242	3866	14	0	0
T250	84659	397	0	0
T282	3827	8	0	0
T283	6745	26	0	0
T284	5348	41	0	0
T285	159117	989	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	1847	0	0
T113	5362	1	0	0
T230	5578	3	0	0
T284	5348	6	0	0
T285	159117	940	0	0
T286	2518	2	0	0
T287	18209	8	0	0
T290	5077	2	0	0
T291	9564	10	0	0
T292	10040	5	0	0
T293	18916	11	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2385	0	0
T66	5557	3	0	0
T113	5362	13	0	0
T225	39844	19	0	0
T230	5578	10	0	0
T242	3866	7	0	0
T250	84659	53	0	0
T282	3827	2	0	0
T283	6745	7	0	0
T284	5348	13	0	0
T285	159117	460	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	1926	0	0
T66	5557	3	0	0
T67	6555	8	0	0
T113	5362	6	0	0
T225	39844	23	0	0
T230	5578	13	0	0
T242	3866	2	0	0
T250	84659	69	0	0
T282	3827	6	0	0
T283	6745	17	0	0
T284	5348	15	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3265	0	0
T66	5557	5	0	0
T67	6555	10	0	0
T113	5362	7	0	0
T225	39844	18	0	0
T230	5578	14	0	0
T242	3866	1	0	0
T250	84659	69	0	0
T282	3827	3	0	0
T283	6745	13	0	0
T284	5348	2	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2604	0	0
T66	5557	5	0	0
T67	6555	12	0	0
T113	5362	11	0	0
T225	39844	23	0	0
T230	5578	4	0	0
T242	3866	4	0	0
T250	84659	73	0	0
T282	3827	1	0	0
T283	6745	14	0	0
T284	5348	6	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3222	0	0
T66	5557	8	0	0
T67	6555	3	0	0
T113	5362	8	0	0
T225	39844	6	0	0
T230	5578	7	0	0
T242	3866	8	0	0
T250	84659	66	0	0
T282	3827	6	0	0
T283	6745	16	0	0
T286	2518	1	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2888	0	0
T66	5557	7	0	0
T67	6555	16	0	0
T113	5362	9	0	0
T225	39844	26	0	0
T230	5578	6	0	0
T242	3866	1	0	0
T250	84659	86	0	0
T282	3827	1	0	0
T283	6745	5	0	0
T284	5348	13	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	3054	0	0
T66	5557	9	0	0
T67	6555	7	0	0
T113	5362	4	0	0
T225	39844	18	0	0
T230	5578	10	0	0
T242	3866	1	0	0
T250	84659	56	0	0
T282	3827	3	0	0
T283	6745	13	0	0
T286	2518	2	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2021	0	0
T66	5557	15	0	0
T113	5362	8	0	0
T225	39844	12	0	0
T230	5578	11	0	0
T250	84659	68	0	0
T283	6745	14	0	0
T284	5348	5	0	0
T285	159117	507	0	0
T286	2518	2	0	0
T288	6316	11	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	398102096	2470	0	0
T66	5557	7	0	0
T113	5362	4	0	0
T225	39844	23	0	0
T230	5578	2	0	0
T250	84659	97	0	0
T282	3827	1	0	0
T283	6745	5	0	0
T284	5348	7	0	0
T288	6316	3	0	0
T290	5077	9	0	0