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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.87 95.23 93.61 98.31 91.84 97.12 96.89 98.09


Total test records in report: 1241
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html

T657 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.3993382849 Aug 25 02:43:16 PM UTC 24 Aug 25 02:56:38 PM UTC 24 140704900 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.2675777090 Aug 25 02:53:10 PM UTC 24 Aug 25 02:56:40 PM UTC 24 5934616100 ps
T422 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.2983409078 Aug 25 02:37:27 PM UTC 24 Aug 25 02:56:43 PM UTC 24 130165483600 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.4246808918 Aug 25 02:52:40 PM UTC 24 Aug 25 02:56:49 PM UTC 24 18804293500 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.1635639303 Aug 25 02:52:17 PM UTC 24 Aug 25 02:56:56 PM UTC 24 33257600 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.1508082646 Aug 25 02:54:23 PM UTC 24 Aug 25 02:57:00 PM UTC 24 512955100 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.1929936826 Aug 25 02:52:56 PM UTC 24 Aug 25 02:57:04 PM UTC 24 1391658800 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.3672393245 Aug 25 02:56:41 PM UTC 24 Aug 25 02:57:05 PM UTC 24 42000400 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.436546722 Aug 25 02:55:35 PM UTC 24 Aug 25 02:57:16 PM UTC 24 1774990700 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.259271401 Aug 25 02:57:06 PM UTC 24 Aug 25 02:57:31 PM UTC 24 26843000 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.3478974830 Aug 25 03:05:58 PM UTC 24 Aug 25 03:08:07 PM UTC 24 11071910600 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.1066764551 Aug 25 02:57:01 PM UTC 24 Aug 25 02:57:39 PM UTC 24 13255800 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.4230564839 Aug 25 02:57:17 PM UTC 24 Aug 25 02:57:43 PM UTC 24 32606700 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.3339450237 Aug 25 02:54:19 PM UTC 24 Aug 25 02:57:44 PM UTC 24 41362700 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.3088182961 Aug 25 02:50:17 PM UTC 24 Aug 25 02:57:49 PM UTC 24 707761100 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.2606785279 Aug 25 02:56:50 PM UTC 24 Aug 25 02:57:52 PM UTC 24 200771200 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_ctrl_arb.2968973330 Aug 25 02:12:10 PM UTC 24 Aug 25 02:57:54 PM UTC 24 519558603100 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.3835656717 Aug 25 02:56:56 PM UTC 24 Aug 25 02:57:55 PM UTC 24 60139900 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.988548925 Aug 25 02:54:31 PM UTC 24 Aug 25 02:57:57 PM UTC 24 3573363300 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.3444266344 Aug 25 02:57:32 PM UTC 24 Aug 25 02:57:59 PM UTC 24 15203600 ps
T334 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd_slow_flash.682061867 Aug 25 02:46:55 PM UTC 24 Aug 25 02:58:02 PM UTC 24 63840995000 ps
T149 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma.3246495191 Aug 25 02:17:13 PM UTC 24 Aug 25 02:58:05 PM UTC 24 338359588300 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.3681537873 Aug 25 02:57:40 PM UTC 24 Aug 25 02:58:06 PM UTC 24 131987400 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.535002061 Aug 25 02:56:31 PM UTC 24 Aug 25 02:58:30 PM UTC 24 1335238400 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.1293008531 Aug 25 02:54:21 PM UTC 24 Aug 25 02:58:36 PM UTC 24 4458920200 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.3394011281 Aug 25 02:54:58 PM UTC 24 Aug 25 02:58:39 PM UTC 24 5923708300 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.2130334464 Aug 25 02:57:05 PM UTC 24 Aug 25 02:58:43 PM UTC 24 1457015100 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.2227266806 Aug 25 02:56:34 PM UTC 24 Aug 25 02:58:44 PM UTC 24 941306100 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.2728691407 Aug 25 02:40:30 PM UTC 24 Aug 25 02:58:50 PM UTC 24 40126046400 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.500792810 Aug 25 02:48:20 PM UTC 24 Aug 25 02:59:08 PM UTC 24 18325248300 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.3043726566 Aug 25 02:34:17 PM UTC 24 Aug 25 02:59:12 PM UTC 24 588862600 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.3907996133 Aug 25 02:48:40 PM UTC 24 Aug 25 02:59:13 PM UTC 24 13465900400 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.4112244133 Aug 25 02:51:00 PM UTC 24 Aug 25 02:59:16 PM UTC 24 7326675700 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.1366230872 Aug 25 02:57:54 PM UTC 24 Aug 25 02:59:27 PM UTC 24 7191431700 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.2433553392 Aug 25 02:56:18 PM UTC 24 Aug 25 02:59:32 PM UTC 24 40213200 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.2648647312 Aug 25 02:58:45 PM UTC 24 Aug 25 02:59:36 PM UTC 24 33756500 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.768188795 Aug 25 02:58:44 PM UTC 24 Aug 25 02:59:38 PM UTC 24 46805000 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3278272366 Aug 25 02:56:17 PM UTC 24 Aug 25 02:59:38 PM UTC 24 1854136400 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.421268957 Aug 25 02:59:14 PM UTC 24 Aug 25 02:59:41 PM UTC 24 20751700 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_rma.3479343204 Aug 25 02:12:10 PM UTC 24 Aug 25 03:01:50 PM UTC 24 140747581700 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.3786503370 Aug 25 02:59:17 PM UTC 24 Aug 25 02:59:45 PM UTC 24 48636000 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.622761811 Aug 25 02:56:37 PM UTC 24 Aug 25 02:59:45 PM UTC 24 10121311600 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.452762591 Aug 25 02:59:10 PM UTC 24 Aug 25 02:59:46 PM UTC 24 11300800 ps
T435 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.118319788 Aug 25 02:58:00 PM UTC 24 Aug 25 02:59:49 PM UTC 24 8654489600 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.2470066644 Aug 25 02:59:28 PM UTC 24 Aug 25 02:59:52 PM UTC 24 16414200 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.3950997345 Aug 25 02:58:51 PM UTC 24 Aug 25 02:59:54 PM UTC 24 243203800 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.2496727280 Aug 25 02:56:04 PM UTC 24 Aug 25 02:59:54 PM UTC 24 10019323300 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.2995879622 Aug 25 02:58:06 PM UTC 24 Aug 25 03:00:04 PM UTC 24 1081601400 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.853686583 Aug 25 02:48:13 PM UTC 24 Aug 25 03:00:05 PM UTC 24 942634400 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.2612390978 Aug 25 02:59:37 PM UTC 24 Aug 25 03:00:05 PM UTC 24 51205100 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.2946363302 Aug 25 02:56:34 PM UTC 24 Aug 25 03:00:32 PM UTC 24 3842430200 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.3937131049 Aug 25 02:50:18 PM UTC 24 Aug 25 03:00:35 PM UTC 24 11136056700 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.2422639862 Aug 25 02:50:29 PM UTC 24 Aug 25 03:00:41 PM UTC 24 31194157300 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.164769444 Aug 25 02:56:07 PM UTC 24 Aug 25 03:00:45 PM UTC 24 35927000 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.3137423587 Aug 25 02:59:13 PM UTC 24 Aug 25 03:00:56 PM UTC 24 2051083700 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.1809079074 Aug 25 02:54:09 PM UTC 24 Aug 25 03:00:56 PM UTC 24 199031800 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.2282498155 Aug 25 03:00:33 PM UTC 24 Aug 25 03:00:59 PM UTC 24 73006500 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.1573595182 Aug 25 02:57:39 PM UTC 24 Aug 25 03:01:08 PM UTC 24 10012823300 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.1347844867 Aug 25 02:43:21 PM UTC 24 Aug 25 03:01:27 PM UTC 24 80138392900 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.2798552805 Aug 25 03:07:07 PM UTC 24 Aug 25 03:08:05 PM UTC 24 29219700 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.1158356076 Aug 25 02:57:57 PM UTC 24 Aug 25 03:01:28 PM UTC 24 307607200 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.297745798 Aug 25 03:01:00 PM UTC 24 Aug 25 03:01:29 PM UTC 24 122783600 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.2485440162 Aug 25 03:01:09 PM UTC 24 Aug 25 03:01:33 PM UTC 24 24468400 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.1113654605 Aug 25 03:00:43 PM UTC 24 Aug 25 03:01:34 PM UTC 24 130008800 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1791595389 Aug 25 03:00:57 PM UTC 24 Aug 25 03:01:37 PM UTC 24 15534700 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.2163023301 Aug 25 02:59:53 PM UTC 24 Aug 25 03:01:38 PM UTC 24 8340551800 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.2048863148 Aug 25 03:00:46 PM UTC 24 Aug 25 03:01:40 PM UTC 24 127698600 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.2122700221 Aug 25 02:56:18 PM UTC 24 Aug 25 03:01:43 PM UTC 24 13714923000 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.1418480011 Aug 25 03:01:28 PM UTC 24 Aug 25 03:01:52 PM UTC 24 16007600 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.3790218874 Aug 25 02:57:43 PM UTC 24 Aug 25 03:01:53 PM UTC 24 31297800 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.4027873060 Aug 25 03:01:30 PM UTC 24 Aug 25 03:01:58 PM UTC 24 31735800 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.3221389944 Aug 25 02:59:38 PM UTC 24 Aug 25 03:02:00 PM UTC 24 20418000 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.2123205367 Aug 25 02:58:03 PM UTC 24 Aug 25 03:02:07 PM UTC 24 2240488700 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.796448420 Aug 25 02:56:39 PM UTC 24 Aug 25 03:02:18 PM UTC 24 184780495800 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.4225586060 Aug 25 02:59:55 PM UTC 24 Aug 25 03:02:26 PM UTC 24 1188065800 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.3484375160 Aug 25 02:54:19 PM UTC 24 Aug 25 03:02:37 PM UTC 24 11372142000 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.1680173172 Aug 25 02:58:31 PM UTC 24 Aug 25 03:02:38 PM UTC 24 1478987400 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.563970245 Aug 25 02:58:37 PM UTC 24 Aug 25 03:02:41 PM UTC 24 24615031900 ps
T401 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.3428631289 Aug 25 03:00:57 PM UTC 24 Aug 25 03:02:46 PM UTC 24 15907276800 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.1024779579 Aug 25 02:58:40 PM UTC 24 Aug 25 03:02:47 PM UTC 24 2673101800 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.1578772654 Aug 25 02:52:55 PM UTC 24 Aug 25 03:02:53 PM UTC 24 5218136700 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.2235159999 Aug 25 02:59:33 PM UTC 24 Aug 25 03:03:00 PM UTC 24 10011812500 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.432358594 Aug 25 02:59:50 PM UTC 24 Aug 25 03:03:05 PM UTC 24 6589762400 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.2690801679 Aug 25 03:02:47 PM UTC 24 Aug 25 03:03:11 PM UTC 24 49893100 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.2080749486 Aug 25 03:02:48 PM UTC 24 Aug 25 03:03:12 PM UTC 24 16028800 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.1395912747 Aug 25 03:02:27 PM UTC 24 Aug 25 03:03:20 PM UTC 24 27377300 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.1562616747 Aug 25 02:59:55 PM UTC 24 Aug 25 03:03:22 PM UTC 24 4742220400 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.3542529279 Aug 25 03:02:54 PM UTC 24 Aug 25 03:03:23 PM UTC 24 54548100 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.3430298536 Aug 25 03:02:39 PM UTC 24 Aug 25 03:03:24 PM UTC 24 10340500 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.256664986 Aug 25 03:02:28 PM UTC 24 Aug 25 03:03:28 PM UTC 24 35094500 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.3385655027 Aug 25 03:02:39 PM UTC 24 Aug 25 03:03:30 PM UTC 24 117402900 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.368610175 Aug 25 03:01:30 PM UTC 24 Aug 25 03:03:34 PM UTC 24 10019584500 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.1202660706 Aug 25 03:03:07 PM UTC 24 Aug 25 03:03:37 PM UTC 24 33983100 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.2898622831 Aug 25 02:54:30 PM UTC 24 Aug 25 03:03:38 PM UTC 24 3259034200 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.3981971304 Aug 25 03:01:51 PM UTC 24 Aug 25 03:03:40 PM UTC 24 4199546500 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.1551752771 Aug 25 02:40:55 PM UTC 24 Aug 25 03:03:52 PM UTC 24 558849800 ps
T432 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.3348669385 Aug 25 03:01:54 PM UTC 24 Aug 25 03:04:11 PM UTC 24 1557298800 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.2283459980 Aug 25 02:59:47 PM UTC 24 Aug 25 03:04:13 PM UTC 24 41473300 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.906917392 Aug 25 03:02:42 PM UTC 24 Aug 25 03:04:19 PM UTC 24 586619000 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.2133025024 Aug 25 02:52:28 PM UTC 24 Aug 25 03:04:25 PM UTC 24 152885300 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.3584578759 Aug 25 03:00:07 PM UTC 24 Aug 25 03:04:28 PM UTC 24 2887366000 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.2139757122 Aug 25 03:04:12 PM UTC 24 Aug 25 03:04:37 PM UTC 24 21030200 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.137172649 Aug 25 02:56:14 PM UTC 24 Aug 25 03:04:50 PM UTC 24 242082000 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.748884742 Aug 25 03:02:20 PM UTC 24 Aug 25 03:04:52 PM UTC 24 2917153100 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.1751030196 Aug 25 02:46:33 PM UTC 24 Aug 25 03:04:54 PM UTC 24 80146507500 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.688569501 Aug 25 03:01:40 PM UTC 24 Aug 25 03:04:55 PM UTC 24 182539800 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.3702134002 Aug 25 03:04:14 PM UTC 24 Aug 25 03:04:55 PM UTC 24 77471600 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2960288428 Aug 25 03:01:30 PM UTC 24 Aug 25 03:05:05 PM UTC 24 27226400 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.2618550777 Aug 25 03:04:29 PM UTC 24 Aug 25 03:05:06 PM UTC 24 11231200 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.3723783788 Aug 25 03:03:32 PM UTC 24 Aug 25 03:05:08 PM UTC 24 3330954300 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.1812007502 Aug 25 03:04:20 PM UTC 24 Aug 25 03:05:11 PM UTC 24 39585200 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.3048341551 Aug 25 03:04:53 PM UTC 24 Aug 25 03:05:18 PM UTC 24 46336000 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.3839256430 Aug 25 03:01:44 PM UTC 24 Aug 25 03:05:20 PM UTC 24 4438491700 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.974843378 Aug 25 02:59:46 PM UTC 24 Aug 25 03:05:21 PM UTC 24 6278808900 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.3670646936 Aug 25 03:04:26 PM UTC 24 Aug 25 03:05:21 PM UTC 24 71920800 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.1960762170 Aug 25 03:04:55 PM UTC 24 Aug 25 03:05:23 PM UTC 24 39615100 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.1647572415 Aug 25 03:04:51 PM UTC 24 Aug 25 03:05:25 PM UTC 24 13123600 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.3555417252 Aug 25 03:04:55 PM UTC 24 Aug 25 03:05:25 PM UTC 24 65618700 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.2873808401 Aug 25 02:59:40 PM UTC 24 Aug 25 03:05:41 PM UTC 24 540689600 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.2396942322 Aug 25 03:05:22 PM UTC 24 Aug 25 03:05:46 PM UTC 24 17665600 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.2596262519 Aug 25 03:05:25 PM UTC 24 Aug 25 03:05:57 PM UTC 24 21585600 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.3774250110 Aug 25 03:03:38 PM UTC 24 Aug 25 03:05:58 PM UTC 24 1099181800 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.941221320 Aug 25 03:05:24 PM UTC 24 Aug 25 03:05:59 PM UTC 24 25686400 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.498949595 Aug 25 03:05:43 PM UTC 24 Aug 25 03:06:08 PM UTC 24 56797300 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.2666400743 Aug 25 03:01:38 PM UTC 24 Aug 25 03:06:09 PM UTC 24 2616260400 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2879242502 Aug 25 03:00:07 PM UTC 24 Aug 25 03:06:09 PM UTC 24 23628126000 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.1861076940 Aug 25 03:03:12 PM UTC 24 Aug 25 03:06:11 PM UTC 24 35684900 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.3761731616 Aug 25 03:05:22 PM UTC 24 Aug 25 03:06:12 PM UTC 24 31891400 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.2483428236 Aug 25 03:01:53 PM UTC 24 Aug 25 03:06:13 PM UTC 24 9701639000 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.1503431272 Aug 25 03:05:22 PM UTC 24 Aug 25 03:06:14 PM UTC 24 45411700 ps
T398 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.657198698 Aug 25 03:04:38 PM UTC 24 Aug 25 03:06:23 PM UTC 24 7727205400 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.212029179 Aug 25 03:06:10 PM UTC 24 Aug 25 03:06:35 PM UTC 24 76821400 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.1379788220 Aug 25 03:06:15 PM UTC 24 Aug 25 03:06:40 PM UTC 24 22463400 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.3468708207 Aug 25 02:52:19 PM UTC 24 Aug 25 03:06:42 PM UTC 24 238071600 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.683288892 Aug 25 03:06:24 PM UTC 24 Aug 25 03:06:48 PM UTC 24 135326400 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.3718459396 Aug 25 03:06:12 PM UTC 24 Aug 25 03:06:50 PM UTC 24 37035900 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.3299905002 Aug 25 03:03:35 PM UTC 24 Aug 25 03:07:00 PM UTC 24 9360504200 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.1606624278 Aug 25 03:03:01 PM UTC 24 Aug 25 03:07:06 PM UTC 24 10018860100 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.2230822742 Aug 25 03:03:41 PM UTC 24 Aug 25 03:07:07 PM UTC 24 3385976900 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.1633961561 Aug 25 03:05:25 PM UTC 24 Aug 25 03:07:11 PM UTC 24 1734025200 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.3850141711 Aug 25 03:03:25 PM UTC 24 Aug 25 03:07:21 PM UTC 24 42385000 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1571544981 Aug 25 02:48:15 PM UTC 24 Aug 25 03:07:28 PM UTC 24 40126334800 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.3388913003 Aug 25 03:02:01 PM UTC 24 Aug 25 03:07:29 PM UTC 24 18435529600 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.2249007912 Aug 25 03:07:11 PM UTC 24 Aug 25 03:07:35 PM UTC 24 40369300 ps
T433 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_full_mem_access.4024161397 Aug 25 02:12:10 PM UTC 24 Aug 25 03:07:44 PM UTC 24 217554968700 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.3150246198 Aug 25 03:07:22 PM UTC 24 Aug 25 03:07:45 PM UTC 24 91235100 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.2329630191 Aug 25 03:07:08 PM UTC 24 Aug 25 03:07:46 PM UTC 24 16283500 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.1826829927 Aug 25 03:03:22 PM UTC 24 Aug 25 03:07:54 PM UTC 24 5297869300 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rand_ops.1585191282 Aug 25 02:30:24 PM UTC 24 Aug 25 03:07:59 PM UTC 24 543100700 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.3473741187 Aug 25 02:58:07 PM UTC 24 Aug 25 03:08:04 PM UTC 24 3880359100 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_stress_all.1913926914 Aug 25 02:15:50 PM UTC 24 Aug 25 03:08:10 PM UTC 24 1247979900 ps
T396 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.870695054 Aug 25 03:06:14 PM UTC 24 Aug 25 03:08:15 PM UTC 24 8335776600 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.1729042629 Aug 25 02:57:49 PM UTC 24 Aug 25 03:08:18 PM UTC 24 328584900 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.2367235524 Aug 25 03:06:36 PM UTC 24 Aug 25 03:08:19 PM UTC 24 16402800 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.4288765674 Aug 25 03:07:54 PM UTC 24 Aug 25 03:08:19 PM UTC 24 28968000 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.1964409321 Aug 25 03:02:07 PM UTC 24 Aug 25 03:08:35 PM UTC 24 11629077900 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.68799040 Aug 25 03:08:08 PM UTC 24 Aug 25 03:08:35 PM UTC 24 55298100 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.3845959303 Aug 25 03:08:05 PM UTC 24 Aug 25 03:08:38 PM UTC 24 50215900 ps
T427 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.1594913102 Aug 25 03:08:01 PM UTC 24 Aug 25 03:08:39 PM UTC 24 13125700 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.3338766507 Aug 25 03:04:55 PM UTC 24 Aug 25 03:08:43 PM UTC 24 10012142200 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.3881521246 Aug 25 03:06:00 PM UTC 24 Aug 25 03:08:45 PM UTC 24 1412086000 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.2853659809 Aug 25 02:56:35 PM UTC 24 Aug 25 03:08:47 PM UTC 24 8967313400 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.4075899781 Aug 25 03:07:55 PM UTC 24 Aug 25 03:08:47 PM UTC 24 53965800 ps
T405 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.444992287 Aug 25 03:07:10 PM UTC 24 Aug 25 03:08:48 PM UTC 24 1541319300 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.2195358677 Aug 25 03:07:30 PM UTC 24 Aug 25 03:08:53 PM UTC 24 1424828400 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.721225722 Aug 25 03:05:08 PM UTC 24 Aug 25 03:08:59 PM UTC 24 35563282300 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2055293903 Aug 25 03:05:47 PM UTC 24 Aug 25 03:08:59 PM UTC 24 100628100 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.2903799525 Aug 25 03:08:35 PM UTC 24 Aug 25 03:09:02 PM UTC 24 19662400 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.3504808246 Aug 25 03:05:18 PM UTC 24 Aug 25 03:09:09 PM UTC 24 11707904600 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.1729535036 Aug 25 02:37:46 PM UTC 24 Aug 25 03:09:09 PM UTC 24 2907413200 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.1265603573 Aug 25 03:08:47 PM UTC 24 Aug 25 03:09:12 PM UTC 24 72462300 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.4196900098 Aug 25 03:08:46 PM UTC 24 Aug 25 03:09:13 PM UTC 24 25219200 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.3241882165 Aug 25 03:08:39 PM UTC 24 Aug 25 03:09:14 PM UTC 24 46226800 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.4226806327 Aug 25 02:43:32 PM UTC 24 Aug 25 03:09:15 PM UTC 24 685304300 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.3060856107 Aug 25 03:06:41 PM UTC 24 Aug 25 03:09:23 PM UTC 24 1560974100 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.383328310 Aug 25 03:05:09 PM UTC 24 Aug 25 03:09:25 PM UTC 24 39005700 ps
T803 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.1335185551 Aug 25 03:09:00 PM UTC 24 Aug 25 03:09:25 PM UTC 24 238967900 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.668750239 Aug 25 03:05:59 PM UTC 24 Aug 25 03:09:32 PM UTC 24 127478300 ps
T804 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.1976792591 Aug 25 03:05:12 PM UTC 24 Aug 25 03:09:32 PM UTC 24 3215146200 ps
T805 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.694334376 Aug 25 03:08:36 PM UTC 24 Aug 25 03:09:34 PM UTC 24 80373600 ps
T806 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3474881307 Aug 25 03:08:39 PM UTC 24 Aug 25 03:09:36 PM UTC 24 38961400 ps
T807 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.390529772 Aug 25 03:08:05 PM UTC 24 Aug 25 03:09:37 PM UTC 24 11513118200 ps
T808 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.566337426 Aug 25 03:07:29 PM UTC 24 Aug 25 03:09:37 PM UTC 24 321959300 ps
T809 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.1847780377 Aug 25 03:09:14 PM UTC 24 Aug 25 03:09:40 PM UTC 24 27539200 ps
T810 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.2793483262 Aug 25 03:09:15 PM UTC 24 Aug 25 03:09:41 PM UTC 24 137775900 ps
T811 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.2824980621 Aug 25 03:08:16 PM UTC 24 Aug 25 03:09:42 PM UTC 24 14581822800 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.3052464350 Aug 25 03:09:09 PM UTC 24 Aug 25 03:09:51 PM UTC 24 67866200 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.877657880 Aug 25 02:21:36 PM UTC 24 Aug 25 03:09:57 PM UTC 24 901405952000 ps
T812 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.1933028629 Aug 25 03:09:33 PM UTC 24 Aug 25 03:09:59 PM UTC 24 22182800 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.2393144762 Aug 25 03:06:49 PM UTC 24 Aug 25 03:10:03 PM UTC 24 1789932400 ps
T813 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.2735231802 Aug 25 03:09:09 PM UTC 24 Aug 25 03:10:07 PM UTC 24 49429300 ps
T814 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.3057542090 Aug 25 03:09:42 PM UTC 24 Aug 25 03:10:08 PM UTC 24 17884000 ps
T815 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.3824363380 Aug 25 03:09:41 PM UTC 24 Aug 25 03:10:09 PM UTC 24 24963000 ps
T816 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.2818566756 Aug 25 03:07:01 PM UTC 24 Aug 25 03:10:13 PM UTC 24 4277647700 ps
T817 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.653519086 Aug 25 03:09:38 PM UTC 24 Aug 25 03:10:16 PM UTC 24 19993200 ps
T818 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.2567279432 Aug 25 02:59:43 PM UTC 24 Aug 25 03:10:23 PM UTC 24 69239300 ps
T819 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.355708328 Aug 25 03:09:24 PM UTC 24 Aug 25 03:10:23 PM UTC 24 1266443100 ps
T820 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.1651918067 Aug 25 03:06:43 PM UTC 24 Aug 25 03:10:25 PM UTC 24 75212400 ps
T821 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.2603780957 Aug 25 03:08:20 PM UTC 24 Aug 25 03:12:02 PM UTC 24 6184364800 ps
T822 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.2755559070 Aug 25 03:03:53 PM UTC 24 Aug 25 03:10:28 PM UTC 24 47948485400 ps
T823 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.1076514630 Aug 25 03:10:04 PM UTC 24 Aug 25 03:10:28 PM UTC 24 30969500 ps
T824 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.225427295 Aug 25 03:01:35 PM UTC 24 Aug 25 03:10:31 PM UTC 24 2825831800 ps
T403 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.1018412216 Aug 25 03:09:13 PM UTC 24 Aug 25 03:10:35 PM UTC 24 777226100 ps
T825 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.2497453477 Aug 25 03:09:35 PM UTC 24 Aug 25 03:10:37 PM UTC 24 29869400 ps
T826 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.2417755348 Aug 25 03:00:06 PM UTC 24 Aug 25 03:10:38 PM UTC 24 5908907500 ps
T408 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.2758333933 Aug 25 03:08:43 PM UTC 24 Aug 25 03:10:38 PM UTC 24 1763027500 ps
T827 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.2232582861 Aug 25 03:10:10 PM UTC 24 Aug 25 03:10:42 PM UTC 24 37595900 ps
T828 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.3126580089 Aug 25 03:10:17 PM UTC 24 Aug 25 03:10:46 PM UTC 24 60416000 ps
T829 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.3904662799 Aug 25 03:09:16 PM UTC 24 Aug 25 03:10:48 PM UTC 24 22362700 ps
T830 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.2563538167 Aug 25 03:10:23 PM UTC 24 Aug 25 03:10:49 PM UTC 24 117837300 ps
T831 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.3116328918 Aug 25 03:08:11 PM UTC 24 Aug 25 03:10:56 PM UTC 24 146745900 ps
T832 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.2649509188 Aug 25 03:08:49 PM UTC 24 Aug 25 03:10:56 PM UTC 24 3262584700 ps
T833 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.1567771914 Aug 25 03:10:08 PM UTC 24 Aug 25 03:10:59 PM UTC 24 40343100 ps
T834 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.541793123 Aug 25 03:10:33 PM UTC 24 Aug 25 03:11:02 PM UTC 24 22519700 ps
T835 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.1792933584 Aug 25 03:10:10 PM UTC 24 Aug 25 03:11:02 PM UTC 24 54114700 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.149740073 Aug 25 03:07:36 PM UTC 24 Aug 25 03:11:05 PM UTC 24 38602700 ps
T836 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.1147195425 Aug 25 03:10:47 PM UTC 24 Aug 25 03:11:15 PM UTC 24 56102300 ps
T837 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.4150717531 Aug 25 03:10:43 PM UTC 24 Aug 25 03:11:16 PM UTC 24 16060400 ps
T838 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.1530951295 Aug 25 03:10:38 PM UTC 24 Aug 25 03:11:16 PM UTC 24 36286900 ps
T839 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.3439184807 Aug 25 03:09:39 PM UTC 24 Aug 25 03:11:22 PM UTC 24 694131700 ps
T840 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.162654653 Aug 25 03:08:20 PM UTC 24 Aug 25 03:11:24 PM UTC 24 1311885300 ps
T841 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.3062688247 Aug 25 03:10:37 PM UTC 24 Aug 25 03:11:24 PM UTC 24 35878800 ps
T842 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.1913617547 Aug 25 02:56:11 PM UTC 24 Aug 25 03:11:28 PM UTC 24 1515631300 ps
T843 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.4053897020 Aug 25 03:10:36 PM UTC 24 Aug 25 03:11:33 PM UTC 24 84716800 ps
T844 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.63476562 Aug 25 03:05:06 PM UTC 24 Aug 25 03:11:33 PM UTC 24 238854400 ps
T845 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.3927464603 Aug 25 03:11:18 PM UTC 24 Aug 25 03:11:43 PM UTC 24 97854300 ps
T846 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.3473998355 Aug 25 03:11:17 PM UTC 24 Aug 25 03:11:44 PM UTC 24 22871000 ps
T847 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.984251031 Aug 25 03:10:14 PM UTC 24 Aug 25 03:11:49 PM UTC 24 2605608600 ps
T848 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.806918188 Aug 25 03:11:07 PM UTC 24 Aug 25 03:11:51 PM UTC 24 40429000 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.104074370 Aug 25 03:11:03 PM UTC 24 Aug 25 03:11:55 PM UTC 24 31952500 ps
T849 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.2067296004 Aug 25 03:11:06 PM UTC 24 Aug 25 03:12:00 PM UTC 24 70234900 ps
T850 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.3976665111 Aug 25 03:08:19 PM UTC 24 Aug 25 03:12:07 PM UTC 24 74040300 ps
T851 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.2081984870 Aug 25 02:40:23 PM UTC 24 Aug 25 03:12:16 PM UTC 24 548793000 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.1024717127 Aug 25 03:11:52 PM UTC 24 Aug 25 03:12:17 PM UTC 24 74044800 ps
T853 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.2588609426 Aug 25 03:09:00 PM UTC 24 Aug 25 03:12:21 PM UTC 24 11414642700 ps
T854 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.2208687545 Aug 25 03:11:45 PM UTC 24 Aug 25 03:12:21 PM UTC 24 16361300 ps
T855 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.1120840444 Aug 25 03:11:56 PM UTC 24 Aug 25 03:12:22 PM UTC 24 28130600 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.900631652 Aug 25 02:54:18 PM UTC 24 Aug 25 03:12:23 PM UTC 24 40123952000 ps
T856 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.3730710579 Aug 25 03:10:39 PM UTC 24 Aug 25 03:12:27 PM UTC 24 1577809500 ps
T857 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.908422267 Aug 25 03:09:43 PM UTC 24 Aug 25 03:12:30 PM UTC 24 57685100 ps
T858 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.2654218495 Aug 25 03:08:54 PM UTC 24 Aug 25 03:12:33 PM UTC 24 37195600 ps
T859 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.1410079911 Aug 25 03:08:48 PM UTC 24 Aug 25 03:12:35 PM UTC 24 38007200 ps
T860 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.3011785959 Aug 25 03:11:25 PM UTC 24 Aug 25 03:12:36 PM UTC 24 1259750500 ps
T861 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.3304462659 Aug 25 03:09:26 PM UTC 24 Aug 25 03:12:40 PM UTC 24 2552199900 ps
T862 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.1513497390 Aug 25 03:12:22 PM UTC 24 Aug 25 03:12:51 PM UTC 24 83365200 ps
T863 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.2788403947 Aug 25 03:12:22 PM UTC 24 Aug 25 03:12:52 PM UTC 24 176993100 ps
T864 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.1413652336 Aug 25 02:57:58 PM UTC 24 Aug 25 03:12:53 PM UTC 24 22944128700 ps
T865 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.2573125759 Aug 25 03:07:52 PM UTC 24 Aug 25 03:12:55 PM UTC 24 11961812200 ps
T424 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.1122738729 Aug 25 03:12:18 PM UTC 24 Aug 25 03:12:58 PM UTC 24 10882200 ps
T866 /workspaces/repo/scratch/os_regression_2024_08_24/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.4262179718 Aug 25 03:06:09 PM UTC 24 Aug 25 03:13:00 PM UTC 24 52796490600 ps
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