Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/flash_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5244424	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	395497	1		T14	11		T16	11		T49	2612
duration[2]	770660	1		T2	5		T7	10		T14	190
duration[3]	119307	1		T14	17		T15	1		T16	3
duration[4]	1073509	1		T2	4		T7	15		T14	296
duration[5]	64154	1		T14	13		T16	3		T49	508
duration[6]	479604	1		T2	1		T14	9		T18	106
duration[7]	48791	1		T14	19		T16	2		T49	151
duration[8]	22194	1		T14	11		T25	3		T27	1
duration[9]	29766	1		T14	15		T27	1		T49	87
duration[10]	16004	1		T14	15		T49	83		T41	93
duration[11]	17825	1		T14	11		T49	52		T41	170
duration[12]	16436	1		T14	6		T49	36		T41	102
duration[13]	13596	1		T14	9		T27	1		T49	42
duration[14]	14149	1		T14	5		T49	18		T41	59
duration[15]	11302	1		T14	5		T49	20		T41	22
duration[16]	11377	1		T14	4		T49	12		T41	35
duration[17]	11943	1		T14	1		T18	2		T58	30
duration[18]	9646	1		T19	1		T58	9		T27	1
duration[19]	11447	1		T14	1		T18	7		T19	1
duration[20]	10065	1		T19	5		T58	18		T27	1
duration[21]	9837	1		T18	10		T58	33		T25	1
duration[22]	10032	1		T19	9		T58	2		T25	1
duration[23]	7046	1		T18	7		T19	2		T58	60
duration[24]	7522	1		T18	1		T19	7		T58	15
duration[25]	7148	1		T18	6		T19	1		T58	23
duration[26]	6645	1		T14	2		T18	1		T19	4
duration[27]	3769	1		T18	3		T19	1		T58	39
duration[28]	3811	1		T14	1		T18	1		T19	2
duration[29]	3565	1		T14	4		T19	1		T15	1
duration[30]	5702	1		T18	1		T15	1		T41	19
duration[31]	3215	1		T15	1		T49	4		T41	31
duration[32]	3866	1		T14	4		T49	3		T41	4
duration[33]	2979	1		T14	1		T49	4		T41	1
duration[34]	5461	1		T14	4		T49	7		T41	1
duration[35]	1704	1		T58	17		T49	16		T41	21
duration[36]	1912	1		T26	1		T49	16		T52	2
duration[37]	1437	1		T49	32		T52	2		T57	1
duration[38]	1254	1		T26	2		T52	2		T87	2
duration[39]	2182	1		T26	2		T52	3		T87	4
duration[40]	1692	1		T19	1		T26	2		T87	1
duration[41]	943	1		T102	2		T146	2		T34	3
duration[42]	10761	1		T26	4		T62	93		T87	2
duration[43]	941	1		T34	1		T88	2		T104	1
duration[44]	320	1		T26	2		T41	1		T51	1
duration[45]	526	1		T26	1		T49	1		T102	2
duration[46]	1476	1		T87	1		T51	1		T146	1
duration[47]	289	1		T52	1		T51	1		T101	1
duration[48]	871	1		T51	1		T160	1		T101	3
duration[49]	259	1		T51	1		T160	1		T101	1
duration[50]	156799	1		T87	1		T57	1		T51	1
duration[51]	266549	1		T71	1		T87	1		T51	36
duration[52]	20428	1		T52	1		T51	26		T160	4
duration[53]	222714	1		T51	7		T160	8		T101	9
duration[54]	10884	1		T71	2		T87	2		T51	98
duration[55]	8072	1		T59	7		T56	1		T51	106
duration[56]	1262	1		T87	1		T51	9		T160	18
duration[57]	5013	1		T71	3		T87	2		T51	13
duration[58]	3217	1		T63	1		T51	50		T160	12
duration[59]	1164	1		T87	2		T51	10		T160	5
duration[60]	2093	1		T26	1		T87	2		T51	16
duration[61]	1934	1		T51	15		T160	21		T101	21
duration[62]	1117	1		T51	5		T160	9		T101	22
duration[63]	2824	1		T26	1		T59	1		T56	1
duration[64]	2812	1		T26	1		T59	1		T51	8
duration[65]	1571	1		T87	1		T51	5		T160	9
duration[66]	4329	1		T41	1		T59	1		T87	1
duration[67]	1303	1		T87	1		T51	4		T160	21
duration[68]	5870	1		T57	1		T51	4		T160	28
duration[69]	956	1		T25	1		T87	3		T51	3
duration[70]	3187	1		T87	4		T51	2		T160	14
duration[71]	614	1		T58	1		T87	1		T51	1
duration[72]	5197	1		T87	1		T51	2		T160	5
duration[73]	436	1		T51	1		T160	8		T101	4
duration[74]	376	1		T51	2		T160	6		T101	3
duration[75]	281	1		T51	1		T160	2		T101	2
duration[76]	1119	1		T160	2		T101	2		T210	3
duration[77]	258	1		T160	4		T38	2		T206	1
duration[78]	1733	1		T160	3		T210	1		T38	4
duration[79]	205	1		T160	2		T38	2		T206	2
duration[80]	2984	1		T160	1		T101	1		T38	4
duration[81]	217	1		T160	3		T38	4		T206	1
duration[82]	176	1		T160	3		T211	2		T216	2
duration[83]	146	1		T87	1		T160	1		T38	3
duration[84]	132	1		T58	1		T160	2		T38	3
duration[85]	114	1		T160	2		T210	1		T38	1
duration[86]	116	1		T160	1		T38	1		T211	1
duration[87]	103	1		T87	1		T38	3		T211	1
duration[88]	88	1		T51	1		T160	2		T38	2
duration[89]	91	1		T160	1		T38	6		T211	1
duration[90]	97	1		T87	1		T160	3		T38	4
duration[91]	76	1		T38	3		T438	2		T161	1
duration[92]	75	1		T18	1		T19	1		T87	1
duration[93]	121	1		T16	1		T49	1		T41	1
duration[94]	148	1		T26	1		T27	1		T210	2
duration[95]	60	1		T101	1		T38	1		T439	1
duration[96]	68	1		T112	1		T87	1		T51	1
duration[97]	68	1		T160	1		T101	1		T38	1
duration[98]	64	1		T14	2		T51	1		T210	1
duration[99]	67	1		T51	1		T160	2		T211	1