Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
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Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
50.00 50.00 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_shadowed_field_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_0_shadowed_errs_cov 50.00 1 100 1 64 64
flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_1_shadowed_errs_cov 50.00 1 100 1 64 64




Group Instance : flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_0_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
50.00 1 100 1 64 64




Summary for Group Instance flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_0_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 1 1 50.00


Variables for Group Instance flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_0_shadowed_errs_cov
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 1 0 0.00 100 1 1 0



Group Instance : flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_1_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
50.00 1 100 1 64 64




Summary for Group Instance flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_1_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 1 1 50.00


Variables for Group Instance flash_ctrl_core_reg_block.mp_bank_cfg_shadowed.erase_en_1_shadowed_errs_cov
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 1 0 0.00 100 1 1 0


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14411 1 T3 102 T15 2 T17 200



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_update_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
update_err 0 1 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14411 1 T3 102 T15 2 T17 200



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_update_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
update_err 0 1 1