Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.85	97.12	94.40	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	364596665	3774	0	0
addr_rd_A	364596665	1700	0	0
bank0_info0_page_cfg_0_rd_A	364596665	2514	0	0
bank0_info0_page_cfg_1_rd_A	364596665	2761	0	0
bank0_info0_page_cfg_2_rd_A	364596665	2458	0	0
bank0_info0_page_cfg_3_rd_A	364596665	2897	0	0
bank0_info0_page_cfg_4_rd_A	364596665	2846	0	0
bank0_info0_page_cfg_5_rd_A	364596665	2973	0	0
bank0_info0_page_cfg_6_rd_A	364596665	3008	0	0
bank0_info0_page_cfg_7_rd_A	364596665	3024	0	0
bank0_info0_page_cfg_8_rd_A	364596665	2436	0	0
bank0_info0_page_cfg_9_rd_A	364596665	2984	0	0
bank0_info0_regwen_0_rd_A	364596665	1337	0	0
bank0_info0_regwen_1_rd_A	364596665	1292	0	0
bank0_info0_regwen_2_rd_A	364596665	664	0	0
bank0_info0_regwen_3_rd_A	364596665	1738	0	0
bank0_info0_regwen_4_rd_A	364596665	1816	0	0
bank0_info0_regwen_5_rd_A	364596665	1349	0	0
bank0_info0_regwen_6_rd_A	364596665	1864	0	0
bank0_info0_regwen_7_rd_A	364596665	1219	0	0
bank0_info0_regwen_8_rd_A	364596665	1800	0	0
bank0_info0_regwen_9_rd_A	364596665	1835	0	0
bank0_info1_page_cfg_rd_A	364596665	2761	0	0
bank0_info1_regwen_rd_A	364596665	1905	0	0
bank0_info2_page_cfg_0_rd_A	364596665	2576	0	0
bank0_info2_page_cfg_1_rd_A	364596665	2531	0	0
bank0_info2_regwen_0_rd_A	364596665	1688	0	0
bank0_info2_regwen_1_rd_A	364596665	1323	0	0
bank1_info0_page_cfg_0_rd_A	364596665	2937	0	0
bank1_info0_page_cfg_1_rd_A	364596665	2831	0	0
bank1_info0_page_cfg_2_rd_A	364596665	2407	0	0
bank1_info0_page_cfg_3_rd_A	364596665	2894	0	0
bank1_info0_page_cfg_4_rd_A	364596665	3180	0	0
bank1_info0_page_cfg_5_rd_A	364596665	1940	0	0
bank1_info0_page_cfg_6_rd_A	364596665	2283	0	0
bank1_info0_page_cfg_7_rd_A	364596665	2371	0	0
bank1_info0_page_cfg_8_rd_A	364596665	2447	0	0
bank1_info0_page_cfg_9_rd_A	364596665	2478	0	0
bank1_info0_regwen_0_rd_A	364596665	1770	0	0
bank1_info0_regwen_1_rd_A	364596665	1696	0	0
bank1_info0_regwen_2_rd_A	364596665	768	0	0
bank1_info0_regwen_3_rd_A	364596665	1680	0	0
bank1_info0_regwen_4_rd_A	364596665	1336	0	0
bank1_info0_regwen_5_rd_A	364596665	1794	0	0
bank1_info0_regwen_6_rd_A	364596665	1727	0	0
bank1_info0_regwen_7_rd_A	364596665	1857	0	0
bank1_info0_regwen_8_rd_A	364596665	1251	0	0
bank1_info0_regwen_9_rd_A	364596665	1806	0	0
bank1_info1_page_cfg_rd_A	364596665	2869	0	0
bank1_info1_regwen_rd_A	364596665	1290	0	0
bank1_info2_page_cfg_0_rd_A	364596665	2425	0	0
bank1_info2_page_cfg_1_rd_A	364596665	2805	0	0
bank1_info2_regwen_0_rd_A	364596665	1282	0	0
bank1_info2_regwen_1_rd_A	364596665	1228	0	0
bank_cfg_regwen_rd_A	364596665	1242	0	0
default_region_rd_A	364596665	2629	0	0
exec_rd_A	364596665	1761	0	0
fifo_lvl_rd_A	364596665	1881	0	0
fifo_rst_rd_A	364596665	1737	0	0
hw_info_cfg_override_rd_A	364596665	1932	0	0
intr_enable_rd_A	364596665	2819	0	0
mp_region_0_rd_A	364596665	1860	0	0
mp_region_1_rd_A	364596665	1841	0	0
mp_region_2_rd_A	364596665	1456	0	0
mp_region_3_rd_A	364596665	1498	0	0
mp_region_4_rd_A	364596665	1852	0	0
mp_region_5_rd_A	364596665	1994	0	0
mp_region_6_rd_A	364596665	1990	0	0
mp_region_7_rd_A	364596665	1465	0	0
mp_region_cfg_0_rd_A	364596665	3232	0	0
mp_region_cfg_1_rd_A	364596665	2724	0	0
mp_region_cfg_2_rd_A	364596665	2891	0	0
mp_region_cfg_3_rd_A	364596665	2928	0	0
mp_region_cfg_4_rd_A	364596665	2368	0	0
mp_region_cfg_5_rd_A	364596665	2926	0	0
mp_region_cfg_6_rd_A	364596665	3048	0	0
mp_region_cfg_7_rd_A	364596665	2802	0	0
phy_alert_cfg_rd_A	364596665	1265	0	0
region_cfg_regwen_0_rd_A	364596665	1793	0	0
region_cfg_regwen_1_rd_A	364596665	1812	0	0
region_cfg_regwen_2_rd_A	364596665	1195	0	0
region_cfg_regwen_3_rd_A	364596665	1195	0	0
region_cfg_regwen_4_rd_A	364596665	1286	0	0
region_cfg_regwen_5_rd_A	364596665	1688	0	0
region_cfg_regwen_6_rd_A	364596665	1850	0	0
region_cfg_regwen_7_rd_A	364596665	1366	0	0
scratch_rd_A	364596665	1179	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3774	0	0
T77	4902	154	0	0
T79	2485	3	0	0
T132	9367	9	0	0
T133	8294	2	0	0
T134	3657	84	0	0
T230	6017	167	0	0
T231	2920	106	0	0
T233	5711	188	0	0
T242	4488	5	0	0
T243	4846	334	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1700	0	0
T132	9367	9	0	0
T251	9706	17	0	0
T252	4209	7	0	0
T253	9975	4	0	0
T254	3794	10	0	0
T264	158751	962	0	0
T266	137168	122	0	0
T300	19428	19	0	0
T301	5547	7	0	0
T302	6203	8	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2514	0	0
T132	9367	32	0	0
T251	9706	9	0	0
T252	4209	6	0	0
T253	9975	14	0	0
T254	3794	39	0	0
T264	158751	496	0	0
T266	137168	134	0	0
T300	19428	35	0	0
T301	5547	11	0	0
T302	6203	30	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2761	0	0
T132	9367	8	0	0
T251	9706	41	0	0
T252	4209	1	0	0
T253	9975	6	0	0
T254	3794	7	0	0
T264	158751	920	0	0
T266	137168	137	0	0
T300	19428	60	0	0
T301	5547	1	0	0
T302	6203	20	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2458	0	0
T132	9367	40	0	0
T251	9706	15	0	0
T252	4209	27	0	0
T253	9975	23	0	0
T254	3794	3	0	0
T264	158751	556	0	0
T266	137168	119	0	0
T300	19428	15	0	0
T301	5547	27	0	0
T302	6203	9	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2897	0	0
T132	9367	21	0	0
T251	9706	3	0	0
T252	4209	25	0	0
T253	9975	2	0	0
T254	3794	24	0	0
T264	158751	1007	0	0
T266	137168	157	0	0
T300	19428	34	0	0
T301	5547	16	0	0
T302	6203	10	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2846	0	0
T132	9367	63	0	0
T251	9706	10	0	0
T252	4209	7	0	0
T254	3794	28	0	0
T264	158751	939	0	0
T266	137168	163	0	0
T300	19428	34	0	0
T301	5547	12	0	0
T302	6203	2	0	0
T303	4513	8	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2973	0	0
T132	9367	12	0	0
T251	9706	23	0	0
T252	4209	25	0	0
T253	9975	21	0	0
T264	158751	1048	0	0
T266	137168	152	0	0
T300	19428	37	0	0
T301	5547	24	0	0
T302	6203	35	0	0
T303	4513	8	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3008	0	0
T132	9367	33	0	0
T251	9706	26	0	0
T252	4209	4	0	0
T253	9975	19	0	0
T254	3794	1	0	0
T264	158751	1004	0	0
T266	137168	120	0	0
T300	19428	43	0	0
T301	5547	5	0	0
T302	6203	38	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3024	0	0
T132	9367	42	0	0
T251	9706	40	0	0
T252	4209	6	0	0
T253	9975	27	0	0
T254	3794	25	0	0
T264	158751	949	0	0
T266	137168	121	0	0
T300	19428	37	0	0
T301	5547	50	0	0
T302	6203	14	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2436	0	0
T132	9367	48	0	0
T251	9706	40	0	0
T252	4209	22	0	0
T253	9975	31	0	0
T254	3794	19	0	0
T264	158751	493	0	0
T266	137168	157	0	0
T300	19428	66	0	0
T301	5547	1	0	0
T302	6203	33	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2984	0	0
T132	9367	40	0	0
T251	9706	3	0	0
T252	4209	27	0	0
T253	9975	22	0	0
T254	3794	21	0	0
T264	158751	961	0	0
T266	137168	177	0	0
T300	19428	64	0	0
T301	5547	11	0	0
T302	6203	30	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1337	0	0
T132	9367	9	0	0
T252	4209	8	0	0
T253	9975	20	0	0
T254	3794	1	0	0
T264	158751	509	0	0
T266	137168	147	0	0
T300	19428	78	0	0
T301	5547	7	0	0
T302	6203	3	0	0
T303	4513	4	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1292	0	0
T132	9367	15	0	0
T251	9706	14	0	0
T252	4209	9	0	0
T253	9975	1	0	0
T254	3794	5	0	0
T264	158751	469	0	0
T266	137168	171	0	0
T300	19428	10	0	0
T301	5547	11	0	0
T302	6203	9	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	664	0	0
T132	9367	28	0	0
T251	9706	2	0	0
T252	4209	7	0	0
T253	9975	6	0	0
T254	3794	7	0	0
T266	137168	97	0	0
T300	19428	40	0	0
T301	5547	11	0	0
T302	6203	10	0	0
T303	4513	9	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1738	0	0
T132	9367	13	0	0
T251	9706	28	0	0
T252	4209	3	0	0
T253	9975	25	0	0
T254	3794	1	0	0
T264	158751	994	0	0
T266	137168	147	0	0
T300	19428	7	0	0
T301	5547	9	0	0
T302	6203	1	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1816	0	0
T132	9367	9	0	0
T251	9706	17	0	0
T252	4209	3	0	0
T253	9975	14	0	0
T264	158751	1035	0	0
T266	137168	143	0	0
T300	19428	31	0	0
T301	5547	7	0	0
T302	6203	9	0	0
T303	4513	6	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1349	0	0
T132	9367	24	0	0
T252	4209	5	0	0
T253	9975	39	0	0
T254	3794	2	0	0
T264	158751	483	0	0
T266	137168	173	0	0
T300	19428	32	0	0
T301	5547	4	0	0
T302	6203	3	0	0
T303	4513	2	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1864	0	0
T132	9367	20	0	0
T251	9706	10	0	0
T252	4209	8	0	0
T253	9975	8	0	0
T254	3794	3	0	0
T264	158751	1007	0	0
T266	137168	156	0	0
T300	19428	49	0	0
T301	5547	8	0	0
T302	6203	14	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1219	0	0
T132	9367	10	0	0
T251	9706	25	0	0
T252	4209	7	0	0
T253	9975	12	0	0
T264	158751	523	0	0
T266	137168	104	0	0
T300	19428	35	0	0
T301	5547	5	0	0
T302	6203	15	0	0
T303	4513	6	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1800	0	0
T132	9367	14	0	0
T251	9706	15	0	0
T252	4209	6	0	0
T264	158751	962	0	0
T266	137168	148	0	0
T300	19428	43	0	0
T301	5547	7	0	0
T302	6203	8	0	0
T303	4513	10	0	0
T304	3709	9	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1835	0	0
T132	9367	17	0	0
T251	9706	12	0	0
T252	4209	8	0	0
T254	3794	4	0	0
T264	158751	1061	0	0
T266	137168	155	0	0
T300	19428	44	0	0
T301	5547	4	0	0
T302	6203	2	0	0
T303	4513	2	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2761	0	0
T132	9367	16	0	0
T251	9706	29	0	0
T252	4209	30	0	0
T253	9975	16	0	0
T254	3794	5	0	0
T264	158751	1010	0	0
T266	137168	94	0	0
T300	19428	44	0	0
T301	5547	15	0	0
T302	6203	16	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1905	0	0
T132	9367	7	0	0
T251	9706	44	0	0
T252	4209	6	0	0
T253	9975	16	0	0
T254	3794	1	0	0
T264	158751	1061	0	0
T266	137168	117	0	0
T300	19428	66	0	0
T301	5547	18	0	0
T302	6203	8	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2576	0	0
T132	9367	14	0	0
T251	9706	15	0	0
T252	4209	4	0	0
T253	9975	8	0	0
T254	3794	4	0	0
T264	158751	525	0	0
T266	137168	119	0	0
T300	19428	53	0	0
T301	5547	16	0	0
T302	6203	28	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2531	0	0
T132	9367	69	0	0
T251	9706	22	0	0
T252	4209	17	0	0
T253	9975	12	0	0
T254	3794	34	0	0
T264	158751	524	0	0
T266	137168	133	0	0
T300	19428	33	0	0
T301	5547	39	0	0
T302	6203	2	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1688	0	0
T132	9367	14	0	0
T251	9706	19	0	0
T253	9975	9	0	0
T254	3794	1	0	0
T264	158751	947	0	0
T266	137168	123	0	0
T300	19428	57	0	0
T301	5547	10	0	0
T302	6203	5	0	0
T303	4513	6	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1323	0	0
T132	9367	24	0	0
T251	9706	66	0	0
T252	4209	5	0	0
T253	9975	9	0	0
T254	3794	7	0	0
T264	158751	476	0	0
T266	137168	132	0	0
T301	5547	5	0	0
T302	6203	7	0	0
T303	4513	9	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2937	0	0
T132	9367	20	0	0
T251	9706	11	0	0
T252	4209	19	0	0
T253	9975	20	0	0
T254	3794	4	0	0
T264	158751	1012	0	0
T266	137168	141	0	0
T300	19428	22	0	0
T301	5547	21	0	0
T302	6203	10	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2831	0	0
T132	9367	15	0	0
T251	9706	27	0	0
T252	4209	3	0	0
T253	9975	16	0	0
T254	3794	31	0	0
T264	158751	1002	0	0
T266	137168	130	0	0
T300	19428	66	0	0
T301	5547	6	0	0
T302	6203	37	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2407	0	0
T132	9367	20	0	0
T251	9706	32	0	0
T252	4209	9	0	0
T253	9975	11	0	0
T254	3794	2	0	0
T264	158751	541	0	0
T266	137168	92	0	0
T300	19428	48	0	0
T301	5547	8	0	0
T302	6203	28	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2894	0	0
T132	9367	44	0	0
T251	9706	24	0	0
T252	4209	1	0	0
T253	9975	17	0	0
T254	3794	27	0	0
T264	158751	949	0	0
T266	137168	150	0	0
T300	19428	17	0	0
T301	5547	14	0	0
T302	6203	32	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3180	0	0
T132	9367	42	0	0
T251	9706	18	0	0
T252	4209	8	0	0
T253	9975	9	0	0
T254	3794	17	0	0
T264	158751	1013	0	0
T266	137168	157	0	0
T300	19428	16	0	0
T301	5547	35	0	0
T302	6203	6	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1940	0	0
T132	9367	36	0	0
T251	9706	2	0	0
T252	4209	6	0	0
T253	9975	20	0	0
T254	3794	37	0	0
T266	137168	156	0	0
T300	19428	60	0	0
T301	5547	38	0	0
T302	6203	7	0	0
T303	4513	10	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2283	0	0
T132	9367	12	0	0
T251	9706	8	0	0
T252	4209	17	0	0
T253	9975	14	0	0
T254	3794	22	0	0
T264	158751	463	0	0
T266	137168	134	0	0
T300	19428	51	0	0
T301	5547	34	0	0
T302	6203	20	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2371	0	0
T132	9367	45	0	0
T251	9706	2	0	0
T253	9975	8	0	0
T254	3794	6	0	0
T264	158751	507	0	0
T266	137168	122	0	0
T300	19428	38	0	0
T301	5547	28	0	0
T302	6203	22	0	0
T303	4513	7	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2447	0	0
T132	9367	69	0	0
T251	9706	40	0	0
T252	4209	20	0	0
T253	9975	7	0	0
T254	3794	30	0	0
T264	158751	476	0	0
T266	137168	158	0	0
T300	19428	43	0	0
T301	5547	5	0	0
T302	6203	10	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2478	0	0
T132	9367	38	0	0
T251	9706	32	0	0
T252	4209	35	0	0
T253	9975	16	0	0
T254	3794	35	0	0
T264	158751	444	0	0
T266	137168	95	0	0
T300	19428	38	0	0
T301	5547	22	0	0
T302	6203	39	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1770	0	0
T132	9367	19	0	0
T251	9706	28	0	0
T252	4209	3	0	0
T253	9975	24	0	0
T254	3794	3	0	0
T264	158751	1018	0	0
T266	137168	150	0	0
T300	19428	52	0	0
T301	5547	14	0	0
T302	6203	18	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1696	0	0
T132	9367	13	0	0
T251	9706	6	0	0
T252	4209	3	0	0
T253	9975	18	0	0
T254	3794	8	0	0
T264	158751	1006	0	0
T266	137168	140	0	0
T300	19428	21	0	0
T301	5547	7	0	0
T302	6203	9	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	768	0	0
T132	9367	18	0	0
T251	9706	36	0	0
T252	4209	4	0	0
T253	9975	2	0	0
T254	3794	8	0	0
T266	137168	99	0	0
T300	19428	65	0	0
T301	5547	16	0	0
T302	6203	9	0	0
T303	4513	7	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1680	0	0
T132	9367	17	0	0
T251	9706	8	0	0
T252	4209	5	0	0
T253	9975	23	0	0
T264	158751	1018	0	0
T266	137168	112	0	0
T300	19428	12	0	0
T301	5547	7	0	0
T302	6203	5	0	0
T303	4513	9	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1336	0	0
T132	9367	18	0	0
T251	9706	25	0	0
T252	4209	5	0	0
T253	9975	7	0	0
T254	3794	8	0	0
T264	158751	531	0	0
T266	137168	128	0	0
T300	19428	70	0	0
T301	5547	14	0	0
T302	6203	9	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1794	0	0
T132	9367	6	0	0
T252	4209	10	0	0
T253	9975	13	0	0
T254	3794	9	0	0
T264	158751	975	0	0
T266	137168	174	0	0
T300	19428	42	0	0
T301	5547	5	0	0
T302	6203	13	0	0
T303	4513	12	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1727	0	0
T132	9367	21	0	0
T251	9706	16	0	0
T252	4209	6	0	0
T253	9975	5	0	0
T264	158751	994	0	0
T266	137168	104	0	0
T300	19428	73	0	0
T301	5547	13	0	0
T302	6203	4	0	0
T303	4513	7	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1857	0	0
T132	9367	18	0	0
T251	9706	35	0	0
T252	4209	9	0	0
T253	9975	18	0	0
T254	3794	4	0	0
T264	158751	941	0	0
T266	137168	141	0	0
T300	19428	53	0	0
T301	5547	11	0	0
T302	6203	9	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1251	0	0
T132	9367	17	0	0
T251	9706	50	0	0
T253	9975	1	0	0
T254	3794	1	0	0
T264	158751	561	0	0
T266	137168	115	0	0
T300	19428	12	0	0
T301	5547	8	0	0
T302	6203	4	0	0
T303	4513	8	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1806	0	0
T132	9367	15	0	0
T251	9706	24	0	0
T252	4209	4	0	0
T253	9975	3	0	0
T254	3794	8	0	0
T264	158751	969	0	0
T266	137168	106	0	0
T300	19428	54	0	0
T301	5547	15	0	0
T302	6203	8	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2869	0	0
T132	9367	81	0	0
T251	9706	39	0	0
T252	4209	38	0	0
T253	9975	14	0	0
T254	3794	23	0	0
T264	158751	561	0	0
T266	137168	101	0	0
T300	19428	48	0	0
T301	5547	25	0	0
T302	6203	40	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1290	0	0
T132	9367	21	0	0
T251	9706	7	0	0
T252	4209	7	0	0
T253	9975	5	0	0
T264	158751	528	0	0
T266	137168	156	0	0
T300	19428	33	0	0
T301	5547	7	0	0
T302	6203	14	0	0
T303	4513	8	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2425	0	0
T132	9367	43	0	0
T251	9706	31	0	0
T252	4209	1	0	0
T253	9975	7	0	0
T254	3794	8	0	0
T264	158751	497	0	0
T266	137168	195	0	0
T300	19428	73	0	0
T301	5547	8	0	0
T302	6203	5	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2805	0	0
T132	9367	48	0	0
T251	9706	27	0	0
T252	4209	1	0	0
T253	9975	4	0	0
T264	158751	955	0	0
T266	137168	151	0	0
T300	19428	20	0	0
T301	5547	47	0	0
T302	6203	14	0	0
T303	4513	8	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1282	0	0
T132	9367	13	0	0
T251	9706	16	0	0
T252	4209	2	0	0
T253	9975	23	0	0
T254	3794	6	0	0
T264	158751	529	0	0
T266	137168	139	0	0
T300	19428	37	0	0
T301	5547	11	0	0
T302	6203	4	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1228	0	0
T132	9367	10	0	0
T251	9706	11	0	0
T253	9975	30	0	0
T254	3794	1	0	0
T264	158751	508	0	0
T266	137168	114	0	0
T300	19428	22	0	0
T301	5547	3	0	0
T302	6203	2	0	0
T303	4513	9	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1242	0	0
T132	9367	10	0	0
T252	4209	10	0	0
T253	9975	16	0	0
T254	3794	7	0	0
T264	158751	503	0	0
T266	137168	153	0	0
T300	19428	34	0	0
T301	5547	7	0	0
T302	6203	5	0	0
T303	4513	6	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2629	0	0
T132	9367	28	0	0
T251	9706	26	0	0
T252	4209	6	0	0
T253	9975	14	0	0
T254	3794	9	0	0
T264	158751	958	0	0
T266	137168	128	0	0
T300	19428	43	0	0
T301	5547	15	0	0
T302	6203	33	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1761	0	0
T132	9367	6	0	0
T251	9706	15	0	0
T252	4209	8	0	0
T253	9975	20	0	0
T254	3794	7	0	0
T264	158751	997	0	0
T266	137168	119	0	0
T300	19428	64	0	0
T301	5547	9	0	0
T302	6203	6	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1881	0	0
T132	9367	21	0	0
T251	9706	52	0	0
T252	4209	7	0	0
T253	9975	10	0	0
T254	3794	5	0	0
T264	158751	984	0	0
T266	137168	89	0	0
T300	19428	50	0	0
T301	5547	6	0	0
T302	6203	12	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1737	0	0
T132	9367	21	0	0
T252	4209	1	0	0
T253	9975	5	0	0
T254	3794	5	0	0
T264	158751	1009	0	0
T266	137168	153	0	0
T300	19428	41	0	0
T301	5547	7	0	0
T302	6203	4	0	0
T303	4513	9	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1932	0	0
T132	9367	33	0	0
T251	9706	5	0	0
T252	4209	15	0	0
T253	9975	6	0	0
T254	3794	5	0	0
T264	158751	1024	0	0
T266	137168	95	0	0
T300	19428	33	0	0
T301	5547	6	0	0
T302	6203	11	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2819	0	0
T132	9367	65	0	0
T252	4209	22	0	0
T254	3794	37	0	0
T264	158751	1012	0	0
T266	137168	104	0	0
T300	19428	50	0	0
T301	5547	30	0	0
T302	6203	7	0	0
T303	4513	7	0	0
T304	3709	1	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1860	0	0
T132	9367	30	0	0
T251	9706	7	0	0
T252	4209	4	0	0
T254	3794	11	0	0
T264	158751	890	0	0
T266	137168	150	0	0
T300	19428	41	0	0
T301	5547	9	0	0
T302	6203	10	0	0
T303	4513	10	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1841	0	0
T132	9367	10	0	0
T251	9706	25	0	0
T252	4209	3	0	0
T253	9975	4	0	0
T254	3794	4	0	0
T264	158751	983	0	0
T266	137168	145	0	0
T300	19428	53	0	0
T301	5547	4	0	0
T302	6203	1	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1456	0	0
T132	9367	20	0	0
T251	9706	7	0	0
T252	4209	6	0	0
T253	9975	14	0	0
T254	3794	5	0	0
T264	158751	489	0	0
T266	137168	120	0	0
T300	19428	30	0	0
T301	5547	21	0	0
T302	6203	12	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1498	0	0
T132	9367	20	0	0
T251	9706	46	0	0
T252	4209	2	0	0
T253	9975	20	0	0
T254	3794	6	0	0
T264	158751	511	0	0
T266	137168	125	0	0
T300	19428	94	0	0
T301	5547	6	0	0
T302	6203	2	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1852	0	0
T132	9367	13	0	0
T251	9706	18	0	0
T252	4209	11	0	0
T253	9975	19	0	0
T254	3794	7	0	0
T264	158751	999	0	0
T266	137168	109	0	0
T300	19428	15	0	0
T301	5547	6	0	0
T302	6203	6	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1994	0	0
T132	9367	26	0	0
T251	9706	4	0	0
T252	4209	10	0	0
T253	9975	26	0	0
T254	3794	4	0	0
T264	158751	1018	0	0
T266	137168	139	0	0
T300	19428	43	0	0
T301	5547	8	0	0
T302	6203	11	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1990	0	0
T132	9367	17	0	0
T251	9706	9	0	0
T252	4209	6	0	0
T253	9975	7	0	0
T254	3794	1	0	0
T264	158751	1044	0	0
T266	137168	128	0	0
T300	19428	37	0	0
T301	5547	11	0	0
T302	6203	6	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1465	0	0
T132	9367	16	0	0
T251	9706	37	0	0
T253	9975	6	0	0
T254	3794	9	0	0
T264	158751	540	0	0
T266	137168	162	0	0
T300	19428	39	0	0
T301	5547	2	0	0
T302	6203	24	0	0
T303	4513	2	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3232	0	0
T132	9367	69	0	0
T251	9706	9	0	0
T252	4209	19	0	0
T253	9975	10	0	0
T254	3794	32	0	0
T264	158751	994	0	0
T266	137168	185	0	0
T300	19428	39	0	0
T301	5547	13	0	0
T302	6203	24	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2724	0	0
T132	9367	17	0	0
T251	9706	7	0	0
T252	4209	7	0	0
T253	9975	13	0	0
T254	3794	5	0	0
T264	158751	926	0	0
T266	137168	90	0	0
T300	19428	11	0	0
T301	5547	3	0	0
T302	6203	46	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2891	0	0
T132	9367	25	0	0
T251	9706	8	0	0
T252	4209	2	0	0
T253	9975	8	0	0
T254	3794	30	0	0
T264	158751	1005	0	0
T266	137168	84	0	0
T300	19428	54	0	0
T301	5547	15	0	0
T302	6203	19	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2928	0	0
T132	9367	39	0	0
T251	9706	27	0	0
T252	4209	17	0	0
T253	9975	12	0	0
T254	3794	26	0	0
T264	158751	957	0	0
T266	137168	130	0	0
T300	19428	70	0	0
T301	5547	39	0	0
T302	6203	1	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2368	0	0
T132	9367	29	0	0
T251	9706	33	0	0
T252	4209	6	0	0
T253	9975	26	0	0
T254	3794	5	0	0
T264	158751	475	0	0
T266	137168	108	0	0
T300	19428	16	0	0
T301	5547	35	0	0
T302	6203	9	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2926	0	0
T132	9367	45	0	0
T251	9706	16	0	0
T252	4209	5	0	0
T253	9975	14	0	0
T254	3794	32	0	0
T264	158751	881	0	0
T266	137168	135	0	0
T300	19428	7	0	0
T301	5547	4	0	0
T302	6203	19	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	3048	0	0
T132	9367	48	0	0
T251	9706	29	0	0
T252	4209	32	0	0
T253	9975	9	0	0
T254	3794	4	0	0
T264	158751	1006	0	0
T266	137168	153	0	0
T300	19428	39	0	0
T301	5547	21	0	0
T302	6203	25	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	2802	0	0
T132	9367	39	0	0
T251	9706	18	0	0
T252	4209	4	0	0
T254	3794	17	0	0
T264	158751	951	0	0
T266	137168	127	0	0
T300	19428	60	0	0
T301	5547	19	0	0
T302	6203	17	0	0
T303	4513	13	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1265	0	0
T251	9706	35	0	0
T253	9975	15	0	0
T264	158751	1016	0	0
T300	19428	26	0	0
T301	5547	2	0	0
T302	6203	4	0	0
T303	4513	14	0	0
T305	9744	13	0	0
T306	10293	15	0	0
T307	19373	51	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1793	0	0
T132	9367	11	0	0
T251	9706	17	0	0
T252	4209	1	0	0
T253	9975	8	0	0
T254	3794	4	0	0
T264	158751	995	0	0
T266	137168	130	0	0
T300	19428	46	0	0
T301	5547	9	0	0
T302	6203	5	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1812	0	0
T132	9367	11	0	0
T251	9706	16	0	0
T252	4209	1	0	0
T253	9975	16	0	0
T264	158751	1071	0	0
T266	137168	127	0	0
T300	19428	47	0	0
T301	5547	11	0	0
T302	6203	8	0	0
T303	4513	5	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1195	0	0
T132	9367	13	0	0
T251	9706	14	0	0
T253	9975	9	0	0
T264	158751	504	0	0
T266	137168	102	0	0
T300	19428	12	0	0
T301	5547	6	0	0
T302	6203	5	0	0
T303	4513	10	0	0
T304	3709	7	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1195	0	0
T132	9367	13	0	0
T251	9706	18	0	0
T252	4209	7	0	0
T253	9975	3	0	0
T254	3794	8	0	0
T264	158751	446	0	0
T266	137168	130	0	0
T300	19428	29	0	0
T301	5547	9	0	0
T302	6203	12	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1286	0	0
T132	9367	22	0	0
T251	9706	12	0	0
T252	4209	8	0	0
T253	9975	10	0	0
T264	158751	531	0	0
T266	137168	121	0	0
T300	19428	2	0	0
T301	5547	9	0	0
T302	6203	4	0	0
T303	4513	7	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1688	0	0
T132	9367	30	0	0
T253	9975	17	0	0
T254	3794	3	0	0
T264	158751	966	0	0
T266	137168	137	0	0
T300	19428	19	0	0
T301	5547	10	0	0
T302	6203	7	0	0
T303	4513	7	0	0
T304	3709	2	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1850	0	0
T132	9367	14	0	0
T251	9706	12	0	0
T252	4209	1	0	0
T253	9975	3	0	0
T254	3794	9	0	0
T264	158751	1091	0	0
T266	137168	129	0	0
T300	19428	44	0	0
T301	5547	4	0	0
T302	6203	16	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1366	0	0
T132	9367	15	0	0
T251	9706	24	0	0
T252	4209	6	0	0
T253	9975	7	0	0
T254	3794	8	0	0
T264	158751	497	0	0
T266	137168	170	0	0
T300	19428	35	0	0
T301	5547	2	0	0
T302	6203	12	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	364596665	1179	0	0
T132	9367	15	0	0
T251	9706	20	0	0
T252	4209	4	0	0
T253	9975	11	0	0
T254	3794	4	0	0
T264	158751	457	0	0
T266	137168	143	0	0
T300	19428	55	0	0
T301	5547	10	0	0
T302	6203	4	0	0