Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8588 |
1 |
|
|
T1 |
2 |
|
T4 |
3 |
|
T6 |
5 |
auto[1] |
10520 |
1 |
|
|
T1 |
8 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9367 |
1 |
|
|
T1 |
6 |
|
T2 |
1 |
|
T3 |
1 |
auto[1] |
9741 |
1 |
|
|
T1 |
4 |
|
T4 |
2 |
|
T6 |
9 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1142 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T7 |
1 |
auto[0] |
auto[0] |
auto[1] |
1008 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T7 |
2 |
auto[0] |
auto[1] |
auto[0] |
3409 |
1 |
|
|
T6 |
1 |
|
T7 |
1 |
|
T8 |
2 |
auto[0] |
auto[1] |
auto[1] |
3029 |
1 |
|
|
T4 |
1 |
|
T6 |
4 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[0] |
1170 |
1 |
|
|
T1 |
3 |
|
T7 |
3 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T1 |
2 |
|
T7 |
3 |
|
T8 |
8 |
auto[1] |
auto[1] |
auto[0] |
3646 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T3 |
1 |
auto[1] |
auto[1] |
auto[1] |
4292 |
1 |
|
|
T1 |
1 |
|
T6 |
5 |
|
T7 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8528 |
1 |
|
|
T1 |
7 |
|
T4 |
1 |
|
T6 |
8 |
auto[1] |
10580 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9525 |
1 |
|
|
T1 |
4 |
|
T4 |
2 |
|
T6 |
4 |
auto[1] |
9583 |
1 |
|
|
T1 |
6 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1205 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T7 |
5 |
auto[0] |
auto[0] |
auto[1] |
994 |
1 |
|
|
T1 |
3 |
|
T8 |
7 |
|
T42 |
1 |
auto[0] |
auto[1] |
auto[0] |
3461 |
1 |
|
|
T1 |
2 |
|
T6 |
4 |
|
T7 |
2 |
auto[0] |
auto[1] |
auto[1] |
2868 |
1 |
|
|
T1 |
1 |
|
T6 |
4 |
|
T7 |
1 |
auto[1] |
auto[0] |
auto[0] |
1146 |
1 |
|
|
T1 |
1 |
|
T7 |
2 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T1 |
2 |
|
T4 |
1 |
|
T7 |
2 |
auto[1] |
auto[1] |
auto[0] |
3713 |
1 |
|
|
T4 |
1 |
|
T8 |
2 |
|
T10 |
11 |
auto[1] |
auto[1] |
auto[1] |
4334 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8687 |
1 |
|
|
T1 |
3 |
|
T4 |
2 |
|
T6 |
6 |
auto[1] |
10421 |
1 |
|
|
T1 |
7 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9391 |
1 |
|
|
T1 |
6 |
|
T4 |
2 |
|
T6 |
6 |
auto[1] |
9717 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1137 |
1 |
|
|
T1 |
2 |
|
T4 |
1 |
|
T7 |
3 |
auto[0] |
auto[0] |
auto[1] |
1049 |
1 |
|
|
T7 |
3 |
|
T8 |
4 |
|
T42 |
5 |
auto[0] |
auto[1] |
auto[0] |
3444 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
3 |
auto[0] |
auto[1] |
auto[1] |
3057 |
1 |
|
|
T6 |
3 |
|
T7 |
2 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[0] |
1178 |
1 |
|
|
T1 |
2 |
|
T8 |
3 |
|
T43 |
2 |
auto[1] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T1 |
3 |
|
T4 |
1 |
|
T7 |
3 |
auto[1] |
auto[1] |
auto[0] |
3632 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[1] |
4243 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8615 |
1 |
|
|
T1 |
6 |
|
T4 |
1 |
|
T6 |
7 |
auto[1] |
10493 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9303 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T3 |
1 |
auto[1] |
9805 |
1 |
|
|
T1 |
8 |
|
T4 |
1 |
|
T6 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1170 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T7 |
2 |
auto[0] |
auto[0] |
auto[1] |
1007 |
1 |
|
|
T1 |
3 |
|
T7 |
3 |
|
T42 |
3 |
auto[0] |
auto[1] |
auto[0] |
3373 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T7 |
1 |
auto[0] |
auto[1] |
auto[1] |
3065 |
1 |
|
|
T1 |
1 |
|
T6 |
5 |
|
T10 |
11 |
auto[1] |
auto[0] |
auto[0] |
1157 |
1 |
|
|
T7 |
3 |
|
T8 |
6 |
|
T42 |
2 |
auto[1] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T1 |
3 |
|
T4 |
1 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[0] |
3603 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
4335 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T7 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8595 |
1 |
|
|
T1 |
6 |
|
T6 |
6 |
|
T7 |
9 |
auto[1] |
10513 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9494 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T3 |
1 |
auto[1] |
9614 |
1 |
|
|
T1 |
6 |
|
T4 |
1 |
|
T6 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1145 |
1 |
|
|
T1 |
2 |
|
T7 |
4 |
|
T8 |
4 |
auto[0] |
auto[0] |
auto[1] |
1007 |
1 |
|
|
T1 |
2 |
|
T7 |
2 |
|
T8 |
3 |
auto[0] |
auto[1] |
auto[0] |
3515 |
1 |
|
|
T6 |
4 |
|
T7 |
2 |
|
T8 |
2 |
auto[0] |
auto[1] |
auto[1] |
2928 |
1 |
|
|
T1 |
2 |
|
T6 |
2 |
|
T7 |
1 |
auto[1] |
auto[0] |
auto[0] |
1162 |
1 |
|
|
T1 |
2 |
|
T4 |
2 |
|
T7 |
2 |
auto[1] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T1 |
1 |
|
T7 |
1 |
|
T8 |
3 |
auto[1] |
auto[1] |
auto[0] |
3672 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
3 |
auto[1] |
auto[1] |
auto[1] |
4261 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4732 |
1 |
|
|
T1 |
7 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
14376 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8637 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T4 |
1 |
auto[1] |
10471 |
1 |
|
|
T1 |
6 |
|
T3 |
1 |
|
T4 |
2 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9245 |
1 |
|
|
T1 |
4 |
|
T4 |
3 |
|
T6 |
6 |
auto[1] |
9863 |
1 |
|
|
T1 |
6 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1168 |
1 |
|
|
T1 |
2 |
|
T4 |
1 |
|
T7 |
1 |
auto[0] |
auto[0] |
auto[1] |
1016 |
1 |
|
|
T1 |
1 |
|
T7 |
4 |
|
T8 |
3 |
auto[0] |
auto[1] |
auto[0] |
3425 |
1 |
|
|
T6 |
2 |
|
T7 |
1 |
|
T8 |
2 |
auto[0] |
auto[1] |
auto[1] |
3028 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
3 |
auto[1] |
auto[0] |
auto[0] |
1145 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T7 |
1 |
auto[1] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T1 |
3 |
|
T7 |
3 |
|
T8 |
1 |
auto[1] |
auto[1] |
auto[0] |
3507 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
4 |
auto[1] |
auto[1] |
auto[1] |
4416 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T6 |
3 |