Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11647 |
1 |
|
|
T2 |
23 |
|
T5 |
5 |
|
T6 |
15 |
auto[1] |
13933 |
1 |
|
|
T2 |
27 |
|
T4 |
1 |
|
T5 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12121 |
1 |
|
|
T2 |
21 |
|
T4 |
1 |
|
T5 |
6 |
auto[1] |
13459 |
1 |
|
|
T2 |
29 |
|
T5 |
7 |
|
T6 |
31 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1567 |
1 |
|
|
T8 |
2 |
|
T44 |
2 |
|
T15 |
26 |
auto[0] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T8 |
10 |
|
T9 |
1 |
|
T44 |
2 |
auto[0] |
auto[1] |
auto[0] |
4449 |
1 |
|
|
T2 |
8 |
|
T5 |
2 |
|
T6 |
8 |
auto[0] |
auto[1] |
auto[1] |
4094 |
1 |
|
|
T2 |
15 |
|
T5 |
3 |
|
T6 |
7 |
auto[1] |
auto[0] |
auto[0] |
1494 |
1 |
|
|
T8 |
8 |
|
T9 |
2 |
|
T44 |
2 |
auto[1] |
auto[0] |
auto[1] |
2060 |
1 |
|
|
T8 |
11 |
|
T9 |
1 |
|
T44 |
2 |
auto[1] |
auto[1] |
auto[0] |
4611 |
1 |
|
|
T2 |
13 |
|
T4 |
1 |
|
T5 |
4 |
auto[1] |
auto[1] |
auto[1] |
5768 |
1 |
|
|
T2 |
14 |
|
T5 |
4 |
|
T6 |
24 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11492 |
1 |
|
|
T2 |
23 |
|
T5 |
5 |
|
T6 |
24 |
auto[1] |
14088 |
1 |
|
|
T2 |
27 |
|
T4 |
1 |
|
T5 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12184 |
1 |
|
|
T2 |
18 |
|
T5 |
9 |
|
T6 |
25 |
auto[1] |
13396 |
1 |
|
|
T2 |
32 |
|
T4 |
1 |
|
T5 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1487 |
1 |
|
|
T8 |
4 |
|
T9 |
1 |
|
T44 |
2 |
auto[0] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T8 |
10 |
|
T9 |
1 |
|
T44 |
3 |
auto[0] |
auto[1] |
auto[0] |
4404 |
1 |
|
|
T2 |
10 |
|
T5 |
4 |
|
T6 |
15 |
auto[0] |
auto[1] |
auto[1] |
4044 |
1 |
|
|
T2 |
13 |
|
T5 |
1 |
|
T6 |
9 |
auto[1] |
auto[0] |
auto[0] |
1557 |
1 |
|
|
T8 |
4 |
|
T9 |
1 |
|
T44 |
1 |
auto[1] |
auto[0] |
auto[1] |
2057 |
1 |
|
|
T8 |
13 |
|
T9 |
1 |
|
T44 |
2 |
auto[1] |
auto[1] |
auto[0] |
4736 |
1 |
|
|
T2 |
8 |
|
T5 |
5 |
|
T6 |
10 |
auto[1] |
auto[1] |
auto[1] |
5738 |
1 |
|
|
T2 |
19 |
|
T4 |
1 |
|
T5 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11487 |
1 |
|
|
T2 |
21 |
|
T5 |
6 |
|
T6 |
29 |
auto[1] |
14093 |
1 |
|
|
T2 |
29 |
|
T4 |
1 |
|
T5 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12182 |
1 |
|
|
T2 |
23 |
|
T4 |
1 |
|
T5 |
8 |
auto[1] |
13398 |
1 |
|
|
T2 |
27 |
|
T5 |
5 |
|
T6 |
30 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1552 |
1 |
|
|
T8 |
10 |
|
T9 |
1 |
|
T44 |
4 |
auto[0] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T8 |
5 |
|
T9 |
1 |
|
T44 |
2 |
auto[0] |
auto[1] |
auto[0] |
4352 |
1 |
|
|
T2 |
9 |
|
T5 |
4 |
|
T6 |
13 |
auto[0] |
auto[1] |
auto[1] |
4057 |
1 |
|
|
T2 |
12 |
|
T5 |
2 |
|
T6 |
16 |
auto[1] |
auto[0] |
auto[0] |
1535 |
1 |
|
|
T8 |
6 |
|
T9 |
1 |
|
T44 |
1 |
auto[1] |
auto[0] |
auto[1] |
2045 |
1 |
|
|
T8 |
10 |
|
T9 |
1 |
|
T44 |
1 |
auto[1] |
auto[1] |
auto[0] |
4743 |
1 |
|
|
T2 |
14 |
|
T4 |
1 |
|
T5 |
4 |
auto[1] |
auto[1] |
auto[1] |
5770 |
1 |
|
|
T2 |
15 |
|
T5 |
3 |
|
T6 |
14 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11518 |
1 |
|
|
T2 |
19 |
|
T5 |
7 |
|
T6 |
28 |
auto[1] |
14062 |
1 |
|
|
T2 |
31 |
|
T4 |
1 |
|
T5 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12070 |
1 |
|
|
T2 |
19 |
|
T4 |
1 |
|
T5 |
8 |
auto[1] |
13510 |
1 |
|
|
T2 |
31 |
|
T5 |
5 |
|
T6 |
22 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1473 |
1 |
|
|
T8 |
2 |
|
T44 |
2 |
|
T15 |
25 |
auto[0] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T8 |
7 |
|
T44 |
3 |
|
T15 |
25 |
auto[0] |
auto[1] |
auto[0] |
4440 |
1 |
|
|
T2 |
7 |
|
T5 |
4 |
|
T6 |
15 |
auto[0] |
auto[1] |
auto[1] |
4012 |
1 |
|
|
T2 |
12 |
|
T5 |
3 |
|
T6 |
13 |
auto[1] |
auto[0] |
auto[0] |
1518 |
1 |
|
|
T8 |
13 |
|
T9 |
3 |
|
T15 |
24 |
auto[1] |
auto[0] |
auto[1] |
2074 |
1 |
|
|
T8 |
9 |
|
T9 |
1 |
|
T44 |
3 |
auto[1] |
auto[1] |
auto[0] |
4639 |
1 |
|
|
T2 |
12 |
|
T4 |
1 |
|
T5 |
4 |
auto[1] |
auto[1] |
auto[1] |
5831 |
1 |
|
|
T2 |
19 |
|
T5 |
2 |
|
T6 |
9 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11510 |
1 |
|
|
T2 |
25 |
|
T5 |
5 |
|
T6 |
21 |
auto[1] |
14070 |
1 |
|
|
T2 |
25 |
|
T4 |
1 |
|
T5 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12075 |
1 |
|
|
T2 |
24 |
|
T4 |
1 |
|
T5 |
8 |
auto[1] |
13505 |
1 |
|
|
T2 |
26 |
|
T5 |
5 |
|
T6 |
22 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1529 |
1 |
|
|
T8 |
10 |
|
T9 |
1 |
|
T15 |
19 |
auto[0] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T8 |
7 |
|
T9 |
1 |
|
T44 |
1 |
auto[0] |
auto[1] |
auto[0] |
4342 |
1 |
|
|
T2 |
14 |
|
T5 |
3 |
|
T6 |
13 |
auto[0] |
auto[1] |
auto[1] |
4127 |
1 |
|
|
T2 |
11 |
|
T5 |
2 |
|
T6 |
8 |
auto[1] |
auto[0] |
auto[0] |
1495 |
1 |
|
|
T8 |
3 |
|
T9 |
1 |
|
T44 |
3 |
auto[1] |
auto[0] |
auto[1] |
2122 |
1 |
|
|
T8 |
11 |
|
T9 |
1 |
|
T44 |
4 |
auto[1] |
auto[1] |
auto[0] |
4709 |
1 |
|
|
T2 |
10 |
|
T4 |
1 |
|
T5 |
5 |
auto[1] |
auto[1] |
auto[1] |
5744 |
1 |
|
|
T2 |
15 |
|
T5 |
3 |
|
T6 |
14 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6658 |
1 |
|
|
T8 |
31 |
|
T9 |
4 |
|
T44 |
8 |
auto[1] |
18922 |
1 |
|
|
T2 |
50 |
|
T4 |
1 |
|
T5 |
13 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11652 |
1 |
|
|
T2 |
28 |
|
T5 |
4 |
|
T6 |
20 |
auto[1] |
13928 |
1 |
|
|
T2 |
22 |
|
T4 |
1 |
|
T5 |
9 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12077 |
1 |
|
|
T2 |
24 |
|
T4 |
1 |
|
T5 |
7 |
auto[1] |
13503 |
1 |
|
|
T2 |
26 |
|
T5 |
6 |
|
T6 |
26 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1515 |
1 |
|
|
T8 |
12 |
|
T9 |
1 |
|
T44 |
1 |
auto[0] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T8 |
4 |
|
T9 |
2 |
|
T44 |
1 |
auto[0] |
auto[1] |
auto[0] |
4413 |
1 |
|
|
T2 |
12 |
|
T5 |
3 |
|
T6 |
12 |
auto[0] |
auto[1] |
auto[1] |
4172 |
1 |
|
|
T2 |
16 |
|
T5 |
1 |
|
T6 |
8 |
auto[1] |
auto[0] |
auto[0] |
1590 |
1 |
|
|
T8 |
8 |
|
T44 |
3 |
|
T15 |
24 |
auto[1] |
auto[0] |
auto[1] |
2001 |
1 |
|
|
T8 |
7 |
|
T9 |
1 |
|
T44 |
3 |
auto[1] |
auto[1] |
auto[0] |
4559 |
1 |
|
|
T2 |
12 |
|
T4 |
1 |
|
T5 |
4 |
auto[1] |
auto[1] |
auto[1] |
5778 |
1 |
|
|
T2 |
10 |
|
T5 |
5 |
|
T6 |
18 |