Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.44 96.00 96.37 100.00 99.02


Total tests in report: 1111
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
80.05 80.05 96.38 96.38 79.89 79.89 61.28 61.28 64.00 64.00 93.32 93.32 92.31 92.31 73.16 73.16 /workspace/coverage/default/5.pwrmgr_stress_all.3285056454
85.68 5.64 96.38 0.00 86.88 6.99 85.62 24.34 64.00 0.00 93.32 0.00 92.57 0.27 81.01 7.86 /workspace/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2063026982
89.84 4.15 96.78 0.40 87.16 0.29 88.63 3.01 86.00 22.00 93.89 0.57 93.90 1.33 82.49 1.47 /workspace/coverage/default/40.pwrmgr_reset_invalid.2237898407
92.00 2.16 96.95 0.16 88.30 1.14 98.31 9.68 88.00 2.00 94.66 0.76 94.96 1.06 82.82 0.33 /workspace/coverage/default/4.pwrmgr_sec_cm.2539398143
93.54 1.54 97.11 0.16 90.30 2.00 99.06 0.75 88.00 0.00 94.85 0.19 96.29 1.33 89.20 6.38 /workspace/coverage/default/3.pwrmgr_stress_all_with_rand_reset.4286576582
94.76 1.22 97.83 0.72 93.72 3.42 99.25 0.19 88.00 0.00 95.61 0.76 96.29 0.00 92.64 3.44 /workspace/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.1910659580
95.90 1.14 97.83 0.00 93.72 0.00 99.25 0.00 96.00 8.00 95.61 0.00 96.29 0.00 92.64 0.00 /workspace/coverage/default/23.pwrmgr_lowpower_invalid.1864716106
96.24 0.34 98.07 0.24 93.87 0.14 99.25 0.00 96.00 0.00 95.61 0.00 96.29 0.00 94.60 1.96 /workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.2142086382
96.56 0.32 98.07 0.00 94.15 0.29 99.25 0.00 96.00 0.00 95.61 0.00 96.29 0.00 96.56 1.96 /workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3807784454
96.83 0.27 98.07 0.00 94.15 0.00 99.25 0.00 96.00 0.00 95.61 0.00 98.14 1.86 96.56 0.00 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_rw.1939679262
97.06 0.23 98.07 0.00 94.29 0.14 99.25 0.00 96.00 0.00 95.61 0.00 99.47 1.33 96.73 0.16 /workspace/coverage/default/25.pwrmgr_stress_all_with_rand_reset.2913974780
97.24 0.18 98.07 0.00 95.58 1.28 99.25 0.00 96.00 0.00 95.61 0.00 99.47 0.00 96.73 0.00 /workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.1626982785
97.41 0.17 98.23 0.16 96.01 0.43 99.25 0.00 96.00 0.00 96.18 0.57 99.47 0.00 96.73 0.00 /workspace/coverage/default/13.pwrmgr_escalation_timeout.3438538787
97.57 0.16 98.23 0.00 96.01 0.00 99.25 0.00 96.00 0.00 96.37 0.19 99.73 0.27 97.38 0.65 /workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.2915449941
97.66 0.09 98.23 0.00 96.15 0.14 99.25 0.00 96.00 0.00 96.37 0.00 99.73 0.00 97.87 0.49 /workspace/coverage/cover_reg_top/13.pwrmgr_tl_intg_err.248526582
97.71 0.05 98.23 0.00 96.15 0.00 99.25 0.00 96.00 0.00 96.37 0.00 99.73 0.00 98.20 0.33 /workspace/coverage/default/32.pwrmgr_disable_rom_integrity_check.2982529656
97.73 0.03 98.23 0.00 96.15 0.00 99.44 0.19 96.00 0.00 96.37 0.00 99.73 0.00 98.20 0.00 /workspace/coverage/default/0.pwrmgr_sec_cm.2808295247
97.76 0.02 98.23 0.00 96.15 0.00 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 98.36 0.16 /workspace/coverage/cover_reg_top/10.pwrmgr_intr_test.2623097572
97.78 0.02 98.23 0.00 96.15 0.00 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 98.53 0.16 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.1030295405
97.80 0.02 98.23 0.00 96.15 0.00 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 98.69 0.16 /workspace/coverage/default/1.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.165838304
97.83 0.02 98.23 0.00 96.15 0.00 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 98.85 0.16 /workspace/coverage/default/42.pwrmgr_disable_rom_integrity_check.3348716255
97.85 0.02 98.23 0.00 96.15 0.00 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 99.02 0.16 /workspace/coverage/default/44.pwrmgr_disable_rom_integrity_check.1076850964
97.87 0.02 98.23 0.00 96.29 0.14 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 99.02 0.00 /workspace/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.4212191294
97.89 0.02 98.23 0.00 96.43 0.14 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 99.02 0.00 /workspace/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.1606685747
97.91 0.02 98.23 0.00 96.58 0.14 99.44 0.00 96.00 0.00 96.37 0.00 99.73 0.00 99.02 0.00 /workspace/coverage/default/20.pwrmgr_glitch.3563681289

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.3003464372
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.1881251972
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.751159130
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_rw.1325602005
/workspace/coverage/cover_reg_top/0.pwrmgr_intr_test.3573990657
/workspace/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.165601547
/workspace/coverage/cover_reg_top/0.pwrmgr_tl_errors.1958007226
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.1657238059
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1801841644
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.2485296300
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.1635518184
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.1193414872
/workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.3931599858
/workspace/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.690071970
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.2239843664
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.424913249
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.1390228485
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_rw.1822314307
/workspace/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.2212038097
/workspace/coverage/cover_reg_top/10.pwrmgr_tl_errors.974416234
/workspace/coverage/cover_reg_top/10.pwrmgr_tl_intg_err.2406520880
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.3924763170
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_rw.2281583129
/workspace/coverage/cover_reg_top/11.pwrmgr_intr_test.1005648157
/workspace/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.754280859
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.4085236218
/workspace/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.1753079688
/workspace/coverage/cover_reg_top/12.pwrmgr_csr_rw.2982991000
/workspace/coverage/cover_reg_top/12.pwrmgr_intr_test.2096296320
/workspace/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.603071136
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.1333784191
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.4220862248
/workspace/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.2935000832
/workspace/coverage/cover_reg_top/13.pwrmgr_csr_rw.687036350
/workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.464400988
/workspace/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.3981337396
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.235899328
/workspace/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.3524162992
/workspace/coverage/cover_reg_top/14.pwrmgr_csr_rw.3022342654
/workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.2820902974
/workspace/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.1793892611
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_errors.1251360219
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.3672448850
/workspace/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.2463831292
/workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.1345880800
/workspace/coverage/cover_reg_top/15.pwrmgr_intr_test.2792141154
/workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.2951964737
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_errors.1459144746
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.2145104932
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.215361474
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_rw.1388742956
/workspace/coverage/cover_reg_top/16.pwrmgr_intr_test.46729258
/workspace/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.998730469
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_errors.3606590723
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.2955291404
/workspace/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.2527187413
/workspace/coverage/cover_reg_top/17.pwrmgr_csr_rw.2463037896
/workspace/coverage/cover_reg_top/17.pwrmgr_intr_test.1891257243
/workspace/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.2851606260
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_errors.2583786580
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.2468708685
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_mem_rw_with_rand_reset.519361591
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.3817723677
/workspace/coverage/cover_reg_top/18.pwrmgr_same_csr_outstanding.3815290217
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.3693621769
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.752050883
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_rw.2920681487
/workspace/coverage/cover_reg_top/19.pwrmgr_intr_test.1305436674
/workspace/coverage/cover_reg_top/19.pwrmgr_same_csr_outstanding.327239626
/workspace/coverage/cover_reg_top/19.pwrmgr_tl_errors.2681398347
/workspace/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.3750707369
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.796139513
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.795022052
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2139236811
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.3305452779
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.3412837225
/workspace/coverage/cover_reg_top/2.pwrmgr_intr_test.4248760940
/workspace/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.4202087143
/workspace/coverage/cover_reg_top/2.pwrmgr_tl_errors.356844477
/workspace/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.1554385637
/workspace/coverage/cover_reg_top/20.pwrmgr_intr_test.2867697828
/workspace/coverage/cover_reg_top/21.pwrmgr_intr_test.1255355772
/workspace/coverage/cover_reg_top/22.pwrmgr_intr_test.668373510
/workspace/coverage/cover_reg_top/23.pwrmgr_intr_test.3495027872
/workspace/coverage/cover_reg_top/24.pwrmgr_intr_test.1713246414
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.2095600305
/workspace/coverage/cover_reg_top/26.pwrmgr_intr_test.4139545773
/workspace/coverage/cover_reg_top/27.pwrmgr_intr_test.1542475565
/workspace/coverage/cover_reg_top/28.pwrmgr_intr_test.2609058481
/workspace/coverage/cover_reg_top/29.pwrmgr_intr_test.1939920901
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.3408726396
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.3377131277
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.3589984334
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.713020057
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_rw.226608228
/workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.1162546226
/workspace/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.2711537822
/workspace/coverage/cover_reg_top/3.pwrmgr_tl_errors.383715774
/workspace/coverage/cover_reg_top/30.pwrmgr_intr_test.3645391227
/workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.1253740981
/workspace/coverage/cover_reg_top/32.pwrmgr_intr_test.2655869630
/workspace/coverage/cover_reg_top/33.pwrmgr_intr_test.2625157819
/workspace/coverage/cover_reg_top/34.pwrmgr_intr_test.1876027517
/workspace/coverage/cover_reg_top/35.pwrmgr_intr_test.401316518
/workspace/coverage/cover_reg_top/36.pwrmgr_intr_test.2545438108
/workspace/coverage/cover_reg_top/37.pwrmgr_intr_test.3472094524
/workspace/coverage/cover_reg_top/38.pwrmgr_intr_test.1619686534
/workspace/coverage/cover_reg_top/39.pwrmgr_intr_test.447663604
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1163283287
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.3015948647
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.1662689176
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.2159706072
/workspace/coverage/cover_reg_top/4.pwrmgr_intr_test.4095692731
/workspace/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.1531579556
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_errors.1208220255
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.1088940333
/workspace/coverage/cover_reg_top/40.pwrmgr_intr_test.1547556696
/workspace/coverage/cover_reg_top/41.pwrmgr_intr_test.1343750730
/workspace/coverage/cover_reg_top/42.pwrmgr_intr_test.1544631051
/workspace/coverage/cover_reg_top/43.pwrmgr_intr_test.3895105224
/workspace/coverage/cover_reg_top/44.pwrmgr_intr_test.2771090095
/workspace/coverage/cover_reg_top/45.pwrmgr_intr_test.4069806782
/workspace/coverage/cover_reg_top/46.pwrmgr_intr_test.3484808870
/workspace/coverage/cover_reg_top/47.pwrmgr_intr_test.2490427510
/workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.2742155984
/workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.384974683
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.4246838409
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_rw.2397045672
/workspace/coverage/cover_reg_top/5.pwrmgr_intr_test.1690831645
/workspace/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1019200061
/workspace/coverage/cover_reg_top/5.pwrmgr_tl_errors.1777057470
/workspace/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.78243703
/workspace/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.3742434221
/workspace/coverage/cover_reg_top/6.pwrmgr_csr_rw.1613675574
/workspace/coverage/cover_reg_top/6.pwrmgr_intr_test.4193601795
/workspace/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.1914667230
/workspace/coverage/cover_reg_top/6.pwrmgr_tl_errors.518195591
/workspace/coverage/cover_reg_top/6.pwrmgr_tl_intg_err.3255696858
/workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.4206031681
/workspace/coverage/cover_reg_top/7.pwrmgr_csr_rw.3736965307
/workspace/coverage/cover_reg_top/7.pwrmgr_intr_test.3494902185
/workspace/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.3723711422
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_errors.206497478
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.29366313
/workspace/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.762584721
/workspace/coverage/cover_reg_top/8.pwrmgr_csr_rw.925222014
/workspace/coverage/cover_reg_top/8.pwrmgr_intr_test.3837879572
/workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.3882025039
/workspace/coverage/cover_reg_top/8.pwrmgr_tl_errors.2758367315
/workspace/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.575586009
/workspace/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.2146429456
/workspace/coverage/cover_reg_top/9.pwrmgr_csr_rw.1178012160
/workspace/coverage/cover_reg_top/9.pwrmgr_intr_test.2683528737
/workspace/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.2048220440
/workspace/coverage/cover_reg_top/9.pwrmgr_tl_errors.772874672
/workspace/coverage/cover_reg_top/9.pwrmgr_tl_intg_err.677839374
/workspace/coverage/default/0.pwrmgr_aborted_low_power.1379143654
/workspace/coverage/default/0.pwrmgr_disable_rom_integrity_check.349288673
/workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.258455929
/workspace/coverage/default/0.pwrmgr_escalation_timeout.3283556317
/workspace/coverage/default/0.pwrmgr_glitch.2890720686
/workspace/coverage/default/0.pwrmgr_global_esc.4225577901
/workspace/coverage/default/0.pwrmgr_lowpower_invalid.3006487472
/workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.2919578047
/workspace/coverage/default/0.pwrmgr_reset.2551359952
/workspace/coverage/default/0.pwrmgr_reset_invalid.1911043106
/workspace/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.2159840887
/workspace/coverage/default/0.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1877652016
/workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3439879870
/workspace/coverage/default/0.pwrmgr_sec_cm_rstmgr_intersig_mubi.2973274910
/workspace/coverage/default/0.pwrmgr_smoke.3041565292
/workspace/coverage/default/0.pwrmgr_stress_all.2301114500
/workspace/coverage/default/0.pwrmgr_stress_all_with_rand_reset.4178391841
/workspace/coverage/default/0.pwrmgr_wakeup.205725366
/workspace/coverage/default/0.pwrmgr_wakeup_reset.2094691029
/workspace/coverage/default/1.pwrmgr_aborted_low_power.3579498200
/workspace/coverage/default/1.pwrmgr_disable_rom_integrity_check.3039303908
/workspace/coverage/default/1.pwrmgr_esc_clk_rst_malfunc.3503019419
/workspace/coverage/default/1.pwrmgr_escalation_timeout.4001671875
/workspace/coverage/default/1.pwrmgr_glitch.2136700982
/workspace/coverage/default/1.pwrmgr_global_esc.210491383
/workspace/coverage/default/1.pwrmgr_lowpower_invalid.912727378
/workspace/coverage/default/1.pwrmgr_lowpower_wakeup_race.3468168806
/workspace/coverage/default/1.pwrmgr_reset.398301069
/workspace/coverage/default/1.pwrmgr_reset_invalid.1559981347
/workspace/coverage/default/1.pwrmgr_sec_cm.885310658
/workspace/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.629783283
/workspace/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2134641567
/workspace/coverage/default/1.pwrmgr_sec_cm_rstmgr_intersig_mubi.502998202
/workspace/coverage/default/1.pwrmgr_smoke.1880185102
/workspace/coverage/default/1.pwrmgr_stress_all.2585079649
/workspace/coverage/default/1.pwrmgr_stress_all_with_rand_reset.495487120
/workspace/coverage/default/1.pwrmgr_wakeup.2668429597
/workspace/coverage/default/1.pwrmgr_wakeup_reset.4163906669
/workspace/coverage/default/10.pwrmgr_aborted_low_power.392205371
/workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.1090356314
/workspace/coverage/default/10.pwrmgr_escalation_timeout.1805906033
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/workspace/coverage/default/7.pwrmgr_wakeup_reset.117991316
/workspace/coverage/default/8.pwrmgr_aborted_low_power.1019718626
/workspace/coverage/default/8.pwrmgr_disable_rom_integrity_check.1422210153
/workspace/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.1934420785
/workspace/coverage/default/8.pwrmgr_escalation_timeout.237758347
/workspace/coverage/default/8.pwrmgr_glitch.596427111
/workspace/coverage/default/8.pwrmgr_global_esc.3007980801
/workspace/coverage/default/8.pwrmgr_lowpower_invalid.1656664104
/workspace/coverage/default/8.pwrmgr_lowpower_wakeup_race.2742442438
/workspace/coverage/default/8.pwrmgr_reset.4034500380
/workspace/coverage/default/8.pwrmgr_reset_invalid.345019312
/workspace/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.3205175091
/workspace/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1470053981
/workspace/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.553899383
/workspace/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.3016141148
/workspace/coverage/default/8.pwrmgr_smoke.3914269147
/workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.4258243523
/workspace/coverage/default/8.pwrmgr_wakeup.2702054626
/workspace/coverage/default/8.pwrmgr_wakeup_reset.537277872
/workspace/coverage/default/9.pwrmgr_aborted_low_power.1512015567
/workspace/coverage/default/9.pwrmgr_disable_rom_integrity_check.4099681411
/workspace/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.2490626147
/workspace/coverage/default/9.pwrmgr_escalation_timeout.940878522
/workspace/coverage/default/9.pwrmgr_glitch.165365774
/workspace/coverage/default/9.pwrmgr_global_esc.4049352823
/workspace/coverage/default/9.pwrmgr_lowpower_invalid.235229068
/workspace/coverage/default/9.pwrmgr_lowpower_wakeup_race.1664596880
/workspace/coverage/default/9.pwrmgr_reset.22408769
/workspace/coverage/default/9.pwrmgr_reset_invalid.607316846
/workspace/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.1167186327
/workspace/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2342658754
/workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.437852454
/workspace/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.422945566
/workspace/coverage/default/9.pwrmgr_smoke.1310318538
/workspace/coverage/default/9.pwrmgr_stress_all.3410842881
/workspace/coverage/default/9.pwrmgr_stress_all_with_rand_reset.42849735
/workspace/coverage/default/9.pwrmgr_wakeup.3047940819
/workspace/coverage/default/9.pwrmgr_wakeup_reset.770344946



Total test records in report: 1111
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/9.pwrmgr_stress_all.3410842881 Mar 26 02:55:24 PM PDT 24 Mar 26 02:55:25 PM PDT 24 75049789 ps
T2 /workspace/coverage/default/23.pwrmgr_glitch.3600138125 Mar 26 02:56:18 PM PDT 24 Mar 26 02:56:19 PM PDT 24 72540534 ps
T3 /workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3807784454 Mar 26 02:56:44 PM PDT 24 Mar 26 02:56:45 PM PDT 24 339434857 ps
T4 /workspace/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.1327761551 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:47 PM PDT 24 38055599 ps
T5 /workspace/coverage/default/42.pwrmgr_wakeup.1958777350 Mar 26 02:57:04 PM PDT 24 Mar 26 02:57:05 PM PDT 24 134778151 ps
T6 /workspace/coverage/default/27.pwrmgr_wakeup.1695988828 Mar 26 02:56:17 PM PDT 24 Mar 26 02:56:19 PM PDT 24 77858911 ps
T7 /workspace/coverage/default/41.pwrmgr_wakeup.526398069 Mar 26 02:56:50 PM PDT 24 Mar 26 02:56:51 PM PDT 24 98476431 ps
T8 /workspace/coverage/default/32.pwrmgr_glitch.2963254011 Mar 26 02:56:38 PM PDT 24 Mar 26 02:56:38 PM PDT 24 51319552 ps
T9 /workspace/coverage/default/5.pwrmgr_glitch.3132974338 Mar 26 02:55:18 PM PDT 24 Mar 26 02:55:19 PM PDT 24 48292550 ps
T10 /workspace/coverage/default/5.pwrmgr_stress_all.3285056454 Mar 26 02:55:11 PM PDT 24 Mar 26 02:55:14 PM PDT 24 879500264 ps
T13 /workspace/coverage/default/4.pwrmgr_sec_cm.2539398143 Mar 26 02:54:58 PM PDT 24 Mar 26 02:55:00 PM PDT 24 420260999 ps
T20 /workspace/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.464213066 Mar 26 02:56:19 PM PDT 24 Mar 26 02:56:21 PM PDT 24 1133808075 ps
T27 /workspace/coverage/default/10.pwrmgr_wakeup.572470987 Mar 26 02:55:36 PM PDT 24 Mar 26 02:55:37 PM PDT 24 171895980 ps
T15 /workspace/coverage/default/49.pwrmgr_aborted_low_power.670257432 Mar 26 02:57:09 PM PDT 24 Mar 26 02:57:10 PM PDT 24 50468058 ps
T11 /workspace/coverage/default/31.pwrmgr_escalation_timeout.788303118 Mar 26 02:56:41 PM PDT 24 Mar 26 02:56:42 PM PDT 24 609000942 ps
T28 /workspace/coverage/default/33.pwrmgr_glitch.227556080 Mar 26 02:56:39 PM PDT 24 Mar 26 02:56:45 PM PDT 24 79944371 ps
T14 /workspace/coverage/default/33.pwrmgr_stress_all_with_rand_reset.4231203628 Mar 26 02:56:38 PM PDT 24 Mar 26 02:56:51 PM PDT 24 3691840835 ps
T12 /workspace/coverage/default/14.pwrmgr_escalation_timeout.784751372 Mar 26 02:55:44 PM PDT 24 Mar 26 02:55:46 PM PDT 24 166406916 ps
T24 /workspace/coverage/default/15.pwrmgr_global_esc.2044942167 Mar 26 02:55:42 PM PDT 24 Mar 26 02:55:48 PM PDT 24 74542000 ps
T29 /workspace/coverage/default/31.pwrmgr_lowpower_wakeup_race.2140843844 Mar 26 02:56:33 PM PDT 24 Mar 26 02:56:34 PM PDT 24 149213628 ps
T37 /workspace/coverage/default/1.pwrmgr_aborted_low_power.3579498200 Mar 26 02:55:05 PM PDT 24 Mar 26 02:55:06 PM PDT 24 45268676 ps
T118 /workspace/coverage/default/17.pwrmgr_aborted_low_power.3953993091 Mar 26 02:55:52 PM PDT 24 Mar 26 02:55:53 PM PDT 24 38392818 ps
T23 /workspace/coverage/default/40.pwrmgr_reset_invalid.2237898407 Mar 26 02:57:09 PM PDT 24 Mar 26 02:57:10 PM PDT 24 154213101 ps
T71 /workspace/coverage/default/8.pwrmgr_lowpower_wakeup_race.2742442438 Mar 26 02:55:15 PM PDT 24 Mar 26 02:55:16 PM PDT 24 181748452 ps
T126 /workspace/coverage/default/3.pwrmgr_glitch.932760176 Mar 26 02:55:15 PM PDT 24 Mar 26 02:55:16 PM PDT 24 44813758 ps
T72 /workspace/coverage/default/28.pwrmgr_lowpower_wakeup_race.2183096428 Mar 26 02:56:20 PM PDT 24 Mar 26 02:56:22 PM PDT 24 161300793 ps
T55 /workspace/coverage/default/42.pwrmgr_lowpower_wakeup_race.1735832417 Mar 26 02:57:21 PM PDT 24 Mar 26 02:57:23 PM PDT 24 113581669 ps
T34 /workspace/coverage/default/22.pwrmgr_reset.947083607 Mar 26 02:56:01 PM PDT 24 Mar 26 02:56:02 PM PDT 24 23153487 ps
T185 /workspace/coverage/default/21.pwrmgr_glitch.2179291533 Mar 26 02:56:01 PM PDT 24 Mar 26 02:56:02 PM PDT 24 24348088 ps
T127 /workspace/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.120157964 Mar 26 02:55:44 PM PDT 24 Mar 26 02:55:46 PM PDT 24 173844847 ps
T51 /workspace/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.3916036730 Mar 26 02:55:37 PM PDT 24 Mar 26 02:55:38 PM PDT 24 253335118 ps
T30 /workspace/coverage/default/8.pwrmgr_wakeup_reset.537277872 Mar 26 02:55:27 PM PDT 24 Mar 26 02:55:28 PM PDT 24 319312069 ps
T73 /workspace/coverage/default/8.pwrmgr_aborted_low_power.1019718626 Mar 26 02:55:22 PM PDT 24 Mar 26 02:55:23 PM PDT 24 33234911 ps
T52 /workspace/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.2575152322 Mar 26 02:57:04 PM PDT 24 Mar 26 02:57:05 PM PDT 24 341682584 ps
T31 /workspace/coverage/default/38.pwrmgr_stress_all.1303739490 Mar 26 02:57:05 PM PDT 24 Mar 26 02:57:08 PM PDT 24 736984218 ps
T186 /workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1536820890 Mar 26 02:57:03 PM PDT 24 Mar 26 02:57:04 PM PDT 24 51159399 ps
T35 /workspace/coverage/default/21.pwrmgr_global_esc.720430911 Mar 26 02:55:49 PM PDT 24 Mar 26 02:55:50 PM PDT 24 107081088 ps
T32 /workspace/coverage/default/47.pwrmgr_stress_all.3310797351 Mar 26 02:57:17 PM PDT 24 Mar 26 02:57:23 PM PDT 24 1244380816 ps
T21 /workspace/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2415867948 Mar 26 02:57:23 PM PDT 24 Mar 26 02:57:26 PM PDT 24 1291966767 ps
T22 /workspace/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2063026982 Mar 26 02:56:04 PM PDT 24 Mar 26 02:56:07 PM PDT 24 886586436 ps
T187 /workspace/coverage/default/1.pwrmgr_wakeup.2668429597 Mar 26 02:54:55 PM PDT 24 Mar 26 02:54:56 PM PDT 24 269515821 ps
T36 /workspace/coverage/default/5.pwrmgr_global_esc.148647907 Mar 26 02:55:24 PM PDT 24 Mar 26 02:55:24 PM PDT 24 42299177 ps
T188 /workspace/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.37033816 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:49 PM PDT 24 408874777 ps
T69 /workspace/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2124820430 Mar 26 02:55:42 PM PDT 24 Mar 26 02:55:45 PM PDT 24 852306724 ps
T189 /workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.2644965083 Mar 26 02:57:10 PM PDT 24 Mar 26 02:57:13 PM PDT 24 300092192 ps
T70 /workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3457510355 Mar 26 02:57:13 PM PDT 24 Mar 26 02:57:17 PM PDT 24 827593972 ps
T38 /workspace/coverage/default/43.pwrmgr_lowpower_invalid.3924939253 Mar 26 02:56:51 PM PDT 24 Mar 26 02:56:51 PM PDT 24 78386696 ps
T33 /workspace/coverage/default/44.pwrmgr_reset_invalid.752465416 Mar 26 02:57:11 PM PDT 24 Mar 26 02:57:13 PM PDT 24 122581244 ps
T18 /workspace/coverage/default/3.pwrmgr_stress_all_with_rand_reset.4286576582 Mar 26 02:55:27 PM PDT 24 Mar 26 02:56:06 PM PDT 24 9669567183 ps
T79 /workspace/coverage/default/29.pwrmgr_reset.1800617571 Mar 26 02:56:30 PM PDT 24 Mar 26 02:56:31 PM PDT 24 194594032 ps
T40 /workspace/coverage/default/6.pwrmgr_lowpower_invalid.2314493163 Mar 26 02:55:18 PM PDT 24 Mar 26 02:55:19 PM PDT 24 52985227 ps
T80 /workspace/coverage/default/13.pwrmgr_escalation_timeout.3438538787 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:48 PM PDT 24 325674002 ps
T39 /workspace/coverage/default/20.pwrmgr_reset_invalid.2558907291 Mar 26 02:55:48 PM PDT 24 Mar 26 02:55:50 PM PDT 24 99045311 ps
T19 /workspace/coverage/default/12.pwrmgr_stress_all_with_rand_reset.4279124900 Mar 26 02:55:45 PM PDT 24 Mar 26 02:55:57 PM PDT 24 6881739081 ps
T81 /workspace/coverage/default/9.pwrmgr_wakeup_reset.770344946 Mar 26 02:55:36 PM PDT 24 Mar 26 02:55:37 PM PDT 24 191015044 ps
T42 /workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2214376532 Mar 26 02:56:45 PM PDT 24 Mar 26 02:56:52 PM PDT 24 1020409873 ps
T82 /workspace/coverage/default/10.pwrmgr_stress_all.1598424061 Mar 26 02:55:37 PM PDT 24 Mar 26 02:55:38 PM PDT 24 133756610 ps
T83 /workspace/coverage/default/23.pwrmgr_global_esc.2196002638 Mar 26 02:56:03 PM PDT 24 Mar 26 02:56:04 PM PDT 24 97383318 ps
T120 /workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.3662646028 Mar 26 02:55:18 PM PDT 24 Mar 26 02:55:28 PM PDT 24 5492326960 ps
T190 /workspace/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.4079214491 Mar 26 02:56:18 PM PDT 24 Mar 26 02:56:20 PM PDT 24 263349957 ps
T191 /workspace/coverage/default/26.pwrmgr_global_esc.1937900336 Mar 26 02:56:15 PM PDT 24 Mar 26 02:56:17 PM PDT 24 36931344 ps
T192 /workspace/coverage/default/30.pwrmgr_escalation_timeout.996063887 Mar 26 02:56:32 PM PDT 24 Mar 26 02:56:33 PM PDT 24 324598193 ps
T121 /workspace/coverage/default/46.pwrmgr_stress_all_with_rand_reset.1843176945 Mar 26 02:57:33 PM PDT 24 Mar 26 02:57:52 PM PDT 24 16701539269 ps
T41 /workspace/coverage/default/46.pwrmgr_lowpower_invalid.4012968150 Mar 26 02:57:12 PM PDT 24 Mar 26 02:57:14 PM PDT 24 71660058 ps
T193 /workspace/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.535024852 Mar 26 02:56:38 PM PDT 24 Mar 26 02:56:39 PM PDT 24 35178930 ps
T194 /workspace/coverage/default/43.pwrmgr_global_esc.1319431344 Mar 26 02:56:56 PM PDT 24 Mar 26 02:56:57 PM PDT 24 39073068 ps
T119 /workspace/coverage/default/7.pwrmgr_aborted_low_power.3891303698 Mar 26 02:55:18 PM PDT 24 Mar 26 02:55:19 PM PDT 24 49822484 ps
T195 /workspace/coverage/default/2.pwrmgr_wakeup_reset.4254476675 Mar 26 02:54:54 PM PDT 24 Mar 26 02:54:55 PM PDT 24 201179723 ps
T87 /workspace/coverage/default/32.pwrmgr_aborted_low_power.1326535993 Mar 26 02:56:39 PM PDT 24 Mar 26 02:56:40 PM PDT 24 98430350 ps
T156 /workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.1001217671 Mar 26 02:55:22 PM PDT 24 Mar 26 02:55:22 PM PDT 24 64979469 ps
T196 /workspace/coverage/default/39.pwrmgr_glitch.1031370002 Mar 26 02:56:46 PM PDT 24 Mar 26 02:56:47 PM PDT 24 86399881 ps
T197 /workspace/coverage/default/12.pwrmgr_reset_invalid.1054797974 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:48 PM PDT 24 111320650 ps
T198 /workspace/coverage/default/24.pwrmgr_aborted_low_power.4107708450 Mar 26 02:56:01 PM PDT 24 Mar 26 02:56:02 PM PDT 24 35401153 ps
T199 /workspace/coverage/default/24.pwrmgr_stress_all.1022446016 Mar 26 02:56:04 PM PDT 24 Mar 26 02:56:07 PM PDT 24 1341952133 ps
T200 /workspace/coverage/default/27.pwrmgr_reset.197730647 Mar 26 02:56:16 PM PDT 24 Mar 26 02:56:18 PM PDT 24 110228958 ps
T201 /workspace/coverage/default/12.pwrmgr_smoke.1716743944 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:42 PM PDT 24 60793658 ps
T202 /workspace/coverage/default/8.pwrmgr_global_esc.3007980801 Mar 26 02:55:29 PM PDT 24 Mar 26 02:55:30 PM PDT 24 67939333 ps
T203 /workspace/coverage/default/5.pwrmgr_lowpower_invalid.2730006109 Mar 26 02:55:22 PM PDT 24 Mar 26 02:55:23 PM PDT 24 47726035 ps
T204 /workspace/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.4067037492 Mar 26 02:56:41 PM PDT 24 Mar 26 02:56:42 PM PDT 24 29764558 ps
T205 /workspace/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2353634959 Mar 26 02:55:40 PM PDT 24 Mar 26 02:55:42 PM PDT 24 927102003 ps
T206 /workspace/coverage/default/49.pwrmgr_smoke.394415799 Mar 26 02:57:22 PM PDT 24 Mar 26 02:57:24 PM PDT 24 30369986 ps
T207 /workspace/coverage/default/35.pwrmgr_lowpower_wakeup_race.1573565203 Mar 26 02:56:55 PM PDT 24 Mar 26 02:56:55 PM PDT 24 115750233 ps
T88 /workspace/coverage/default/36.pwrmgr_aborted_low_power.319979837 Mar 26 02:56:51 PM PDT 24 Mar 26 02:56:52 PM PDT 24 68854403 ps
T208 /workspace/coverage/default/34.pwrmgr_smoke.1625792618 Mar 26 02:56:36 PM PDT 24 Mar 26 02:56:37 PM PDT 24 30247255 ps
T209 /workspace/coverage/default/37.pwrmgr_lowpower_invalid.3525093330 Mar 26 02:56:39 PM PDT 24 Mar 26 02:56:40 PM PDT 24 45111846 ps
T210 /workspace/coverage/default/22.pwrmgr_glitch.591808347 Mar 26 02:55:54 PM PDT 24 Mar 26 02:56:00 PM PDT 24 84606648 ps
T211 /workspace/coverage/default/33.pwrmgr_wakeup.1516705167 Mar 26 02:56:46 PM PDT 24 Mar 26 02:56:47 PM PDT 24 62247169 ps
T212 /workspace/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.2554354627 Mar 26 02:56:10 PM PDT 24 Mar 26 02:56:11 PM PDT 24 66043031 ps
T213 /workspace/coverage/default/29.pwrmgr_reset_invalid.2290292822 Mar 26 02:56:33 PM PDT 24 Mar 26 02:56:34 PM PDT 24 158576046 ps
T214 /workspace/coverage/default/25.pwrmgr_wakeup.3894620700 Mar 26 02:56:28 PM PDT 24 Mar 26 02:56:29 PM PDT 24 183010014 ps
T215 /workspace/coverage/default/10.pwrmgr_aborted_low_power.392205371 Mar 26 02:55:29 PM PDT 24 Mar 26 02:55:30 PM PDT 24 42404911 ps
T216 /workspace/coverage/default/17.pwrmgr_reset.4163381148 Mar 26 02:55:42 PM PDT 24 Mar 26 02:55:44 PM PDT 24 128507151 ps
T157 /workspace/coverage/default/20.pwrmgr_disable_rom_integrity_check.2881158382 Mar 26 02:56:04 PM PDT 24 Mar 26 02:56:04 PM PDT 24 96672841 ps
T217 /workspace/coverage/default/12.pwrmgr_lowpower_wakeup_race.4278481089 Mar 26 02:55:37 PM PDT 24 Mar 26 02:55:38 PM PDT 24 417328717 ps
T163 /workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2080756616 Mar 26 02:56:35 PM PDT 24 Mar 26 02:56:38 PM PDT 24 794467896 ps
T218 /workspace/coverage/default/25.pwrmgr_reset.1057978664 Mar 26 02:56:15 PM PDT 24 Mar 26 02:56:17 PM PDT 24 53608313 ps
T219 /workspace/coverage/default/4.pwrmgr_aborted_low_power.2184635742 Mar 26 02:55:00 PM PDT 24 Mar 26 02:55:01 PM PDT 24 98514938 ps
T220 /workspace/coverage/default/45.pwrmgr_global_esc.247725276 Mar 26 02:56:59 PM PDT 24 Mar 26 02:57:01 PM PDT 24 60583561 ps
T221 /workspace/coverage/default/27.pwrmgr_global_esc.3840713303 Mar 26 02:56:20 PM PDT 24 Mar 26 02:56:21 PM PDT 24 49780270 ps
T222 /workspace/coverage/default/25.pwrmgr_escalation_timeout.1675715300 Mar 26 02:56:25 PM PDT 24 Mar 26 02:56:26 PM PDT 24 903371708 ps
T223 /workspace/coverage/default/18.pwrmgr_reset.3708107845 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:43 PM PDT 24 36713311 ps
T224 /workspace/coverage/default/41.pwrmgr_reset.1741963177 Mar 26 02:56:51 PM PDT 24 Mar 26 02:56:51 PM PDT 24 52450630 ps
T225 /workspace/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.125943501 Mar 26 02:56:35 PM PDT 24 Mar 26 02:56:36 PM PDT 24 135742555 ps
T226 /workspace/coverage/default/20.pwrmgr_global_esc.3774437729 Mar 26 02:55:49 PM PDT 24 Mar 26 02:55:49 PM PDT 24 270303185 ps
T227 /workspace/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.3143213005 Mar 26 02:57:12 PM PDT 24 Mar 26 02:57:14 PM PDT 24 29445400 ps
T228 /workspace/coverage/default/20.pwrmgr_glitch.3563681289 Mar 26 02:56:05 PM PDT 24 Mar 26 02:56:06 PM PDT 24 50094820 ps
T229 /workspace/coverage/default/46.pwrmgr_global_esc.2772203246 Mar 26 02:57:07 PM PDT 24 Mar 26 02:57:09 PM PDT 24 27977765 ps
T158 /workspace/coverage/default/6.pwrmgr_disable_rom_integrity_check.257371525 Mar 26 02:55:24 PM PDT 24 Mar 26 02:55:25 PM PDT 24 49552169 ps
T230 /workspace/coverage/default/36.pwrmgr_lowpower_wakeup_race.3646627214 Mar 26 02:56:40 PM PDT 24 Mar 26 02:56:41 PM PDT 24 293813832 ps
T231 /workspace/coverage/default/24.pwrmgr_glitch.2897528081 Mar 26 02:56:15 PM PDT 24 Mar 26 02:56:16 PM PDT 24 34290845 ps
T232 /workspace/coverage/default/23.pwrmgr_stress_all_with_rand_reset.172906334 Mar 26 02:56:13 PM PDT 24 Mar 26 02:56:23 PM PDT 24 24942143833 ps
T164 /workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4205330560 Mar 26 02:56:20 PM PDT 24 Mar 26 02:56:22 PM PDT 24 1144663533 ps
T233 /workspace/coverage/default/42.pwrmgr_glitch.2731624205 Mar 26 02:56:44 PM PDT 24 Mar 26 02:56:45 PM PDT 24 23405557 ps
T234 /workspace/coverage/default/18.pwrmgr_global_esc.3361379176 Mar 26 02:56:16 PM PDT 24 Mar 26 02:56:18 PM PDT 24 34461567 ps
T235 /workspace/coverage/default/14.pwrmgr_global_esc.1338184126 Mar 26 02:55:52 PM PDT 24 Mar 26 02:55:53 PM PDT 24 24987204 ps
T236 /workspace/coverage/default/17.pwrmgr_global_esc.2680374066 Mar 26 02:55:49 PM PDT 24 Mar 26 02:55:50 PM PDT 24 49928427 ps
T237 /workspace/coverage/default/1.pwrmgr_smoke.1880185102 Mar 26 02:55:27 PM PDT 24 Mar 26 02:55:27 PM PDT 24 59671186 ps
T238 /workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.3826518055 Mar 26 02:55:19 PM PDT 24 Mar 26 02:55:20 PM PDT 24 111274424 ps
T159 /workspace/coverage/default/32.pwrmgr_disable_rom_integrity_check.2982529656 Mar 26 02:56:36 PM PDT 24 Mar 26 02:56:37 PM PDT 24 144637041 ps
T239 /workspace/coverage/default/49.pwrmgr_reset.1359627527 Mar 26 02:57:30 PM PDT 24 Mar 26 02:57:30 PM PDT 24 47659789 ps
T240 /workspace/coverage/default/13.pwrmgr_smoke.558113774 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:48 PM PDT 24 31234626 ps
T45 /workspace/coverage/default/28.pwrmgr_stress_all_with_rand_reset.3062673921 Mar 26 02:56:30 PM PDT 24 Mar 26 02:56:35 PM PDT 24 1057222403 ps
T241 /workspace/coverage/default/9.pwrmgr_lowpower_invalid.235229068 Mar 26 02:55:36 PM PDT 24 Mar 26 02:55:37 PM PDT 24 45358123 ps
T160 /workspace/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.553899383 Mar 26 02:55:23 PM PDT 24 Mar 26 02:55:25 PM PDT 24 1012103307 ps
T242 /workspace/coverage/default/12.pwrmgr_sec_cm_ctrl_config_regwen.1220448770 Mar 26 02:55:44 PM PDT 24 Mar 26 02:55:45 PM PDT 24 279373461 ps
T243 /workspace/coverage/default/11.pwrmgr_stress_all.2663987004 Mar 26 02:55:42 PM PDT 24 Mar 26 02:55:46 PM PDT 24 2249055026 ps
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T248 /workspace/coverage/default/26.pwrmgr_lowpower_wakeup_race.1600877386 Mar 26 02:56:23 PM PDT 24 Mar 26 02:56:24 PM PDT 24 194177613 ps
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T122 /workspace/coverage/default/0.pwrmgr_stress_all_with_rand_reset.4178391841 Mar 26 02:55:00 PM PDT 24 Mar 26 02:55:18 PM PDT 24 15047125212 ps
T255 /workspace/coverage/default/2.pwrmgr_wakeup.2371600768 Mar 26 02:55:08 PM PDT 24 Mar 26 02:55:09 PM PDT 24 46940655 ps
T256 /workspace/coverage/default/23.pwrmgr_aborted_low_power.2791437897 Mar 26 02:56:15 PM PDT 24 Mar 26 02:56:16 PM PDT 24 36366043 ps
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T259 /workspace/coverage/default/18.pwrmgr_lowpower_wakeup_race.1713483737 Mar 26 02:55:48 PM PDT 24 Mar 26 02:55:50 PM PDT 24 119590689 ps
T260 /workspace/coverage/default/43.pwrmgr_lowpower_wakeup_race.2081337017 Mar 26 02:56:44 PM PDT 24 Mar 26 02:56:45 PM PDT 24 128671699 ps
T261 /workspace/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.2495019639 Mar 26 02:55:50 PM PDT 24 Mar 26 02:55:51 PM PDT 24 251824322 ps
T262 /workspace/coverage/default/47.pwrmgr_global_esc.3535113960 Mar 26 02:57:12 PM PDT 24 Mar 26 02:57:13 PM PDT 24 46328279 ps
T162 /workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.2915449941 Mar 26 02:55:39 PM PDT 24 Mar 26 02:55:40 PM PDT 24 79137925 ps
T263 /workspace/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.252180653 Mar 26 02:55:49 PM PDT 24 Mar 26 02:55:52 PM PDT 24 1134891264 ps
T264 /workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2908937227 Mar 26 02:55:55 PM PDT 24 Mar 26 02:55:58 PM PDT 24 1650855550 ps
T265 /workspace/coverage/default/15.pwrmgr_wakeup_reset.1876440846 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:43 PM PDT 24 339492626 ps
T266 /workspace/coverage/default/39.pwrmgr_reset.2550326866 Mar 26 02:57:08 PM PDT 24 Mar 26 02:57:09 PM PDT 24 88960903 ps
T267 /workspace/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.413375081 Mar 26 02:57:15 PM PDT 24 Mar 26 02:57:18 PM PDT 24 848238446 ps
T268 /workspace/coverage/default/23.pwrmgr_lowpower_invalid.1864716106 Mar 26 02:56:00 PM PDT 24 Mar 26 02:56:01 PM PDT 24 81956454 ps
T269 /workspace/coverage/default/38.pwrmgr_aborted_low_power.3910676865 Mar 26 02:56:43 PM PDT 24 Mar 26 02:56:44 PM PDT 24 34834638 ps
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T271 /workspace/coverage/default/41.pwrmgr_lowpower_invalid.1888216891 Mar 26 02:57:08 PM PDT 24 Mar 26 02:57:09 PM PDT 24 134983026 ps
T272 /workspace/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1316903032 Mar 26 02:56:31 PM PDT 24 Mar 26 02:56:34 PM PDT 24 998379257 ps
T273 /workspace/coverage/default/35.pwrmgr_wakeup.2265427671 Mar 26 02:56:43 PM PDT 24 Mar 26 02:56:44 PM PDT 24 141890761 ps
T123 /workspace/coverage/default/14.pwrmgr_stress_all_with_rand_reset.861734288 Mar 26 02:55:45 PM PDT 24 Mar 26 02:56:03 PM PDT 24 11785257576 ps
T274 /workspace/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1176764575 Mar 26 02:56:12 PM PDT 24 Mar 26 02:56:14 PM PDT 24 2375542216 ps
T275 /workspace/coverage/default/10.pwrmgr_glitch.2757085916 Mar 26 02:55:42 PM PDT 24 Mar 26 02:55:43 PM PDT 24 55771109 ps
T276 /workspace/coverage/default/4.pwrmgr_disable_rom_integrity_check.390961132 Mar 26 02:54:55 PM PDT 24 Mar 26 02:54:56 PM PDT 24 49555855 ps
T277 /workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3301137719 Mar 26 02:57:00 PM PDT 24 Mar 26 02:57:03 PM PDT 24 1068338743 ps
T278 /workspace/coverage/default/23.pwrmgr_lowpower_wakeup_race.2535473737 Mar 26 02:56:11 PM PDT 24 Mar 26 02:56:12 PM PDT 24 70218936 ps
T279 /workspace/coverage/default/23.pwrmgr_wakeup.1321306344 Mar 26 02:56:16 PM PDT 24 Mar 26 02:56:17 PM PDT 24 186219625 ps
T280 /workspace/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.646992494 Mar 26 02:57:10 PM PDT 24 Mar 26 02:57:11 PM PDT 24 75718628 ps
T124 /workspace/coverage/default/5.pwrmgr_stress_all_with_rand_reset.2914345633 Mar 26 02:55:10 PM PDT 24 Mar 26 02:55:19 PM PDT 24 4017444682 ps
T125 /workspace/coverage/default/7.pwrmgr_stress_all_with_rand_reset.525590059 Mar 26 02:55:26 PM PDT 24 Mar 26 02:55:50 PM PDT 24 9405299458 ps
T281 /workspace/coverage/default/48.pwrmgr_disable_rom_integrity_check.3493384233 Mar 26 02:57:15 PM PDT 24 Mar 26 02:57:16 PM PDT 24 96886413 ps
T282 /workspace/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.2032026102 Mar 26 02:55:19 PM PDT 24 Mar 26 02:55:20 PM PDT 24 135999245 ps
T283 /workspace/coverage/default/19.pwrmgr_glitch.4175998607 Mar 26 02:55:52 PM PDT 24 Mar 26 02:55:53 PM PDT 24 60831620 ps
T284 /workspace/coverage/default/27.pwrmgr_reset_invalid.2545915440 Mar 26 02:56:21 PM PDT 24 Mar 26 02:56:22 PM PDT 24 111149485 ps
T285 /workspace/coverage/default/22.pwrmgr_smoke.1145850606 Mar 26 02:55:53 PM PDT 24 Mar 26 02:55:53 PM PDT 24 65943818 ps
T286 /workspace/coverage/default/16.pwrmgr_disable_rom_integrity_check.568999780 Mar 26 02:56:00 PM PDT 24 Mar 26 02:56:01 PM PDT 24 87322837 ps
T287 /workspace/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.1103727083 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:43 PM PDT 24 95529210 ps
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T289 /workspace/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.4148497461 Mar 26 02:55:15 PM PDT 24 Mar 26 02:55:16 PM PDT 24 167494961 ps
T290 /workspace/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.3041243787 Mar 26 02:55:02 PM PDT 24 Mar 26 02:55:03 PM PDT 24 184482622 ps
T291 /workspace/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2134641567 Mar 26 02:55:11 PM PDT 24 Mar 26 02:55:14 PM PDT 24 887630580 ps
T292 /workspace/coverage/default/16.pwrmgr_glitch.1245055477 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:47 PM PDT 24 26304308 ps
T293 /workspace/coverage/default/46.pwrmgr_reset_invalid.2882178125 Mar 26 02:57:14 PM PDT 24 Mar 26 02:57:15 PM PDT 24 163604557 ps
T294 /workspace/coverage/default/26.pwrmgr_escalation_timeout.1872047318 Mar 26 02:56:01 PM PDT 24 Mar 26 02:56:02 PM PDT 24 611988572 ps
T89 /workspace/coverage/default/23.pwrmgr_stress_all.2524430224 Mar 26 02:56:21 PM PDT 24 Mar 26 02:56:22 PM PDT 24 390924683 ps
T295 /workspace/coverage/default/1.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.165838304 Mar 26 02:55:14 PM PDT 24 Mar 26 02:55:16 PM PDT 24 1076991144 ps
T296 /workspace/coverage/default/6.pwrmgr_lowpower_wakeup_race.3244461901 Mar 26 02:55:20 PM PDT 24 Mar 26 02:55:21 PM PDT 24 233542884 ps
T297 /workspace/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3402067213 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:48 PM PDT 24 65718455 ps
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T299 /workspace/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.171600637 Mar 26 02:54:57 PM PDT 24 Mar 26 02:54:59 PM PDT 24 852992546 ps
T300 /workspace/coverage/default/29.pwrmgr_glitch.1658047878 Mar 26 02:56:18 PM PDT 24 Mar 26 02:56:19 PM PDT 24 46450713 ps
T301 /workspace/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3387544415 Mar 26 02:54:56 PM PDT 24 Mar 26 02:54:59 PM PDT 24 825640486 ps
T302 /workspace/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4020286044 Mar 26 02:55:35 PM PDT 24 Mar 26 02:55:38 PM PDT 24 1280047637 ps
T303 /workspace/coverage/default/13.pwrmgr_reset_invalid.926086691 Mar 26 02:55:48 PM PDT 24 Mar 26 02:55:49 PM PDT 24 106570396 ps
T304 /workspace/coverage/default/22.pwrmgr_aborted_low_power.646865246 Mar 26 02:55:47 PM PDT 24 Mar 26 02:55:48 PM PDT 24 40390560 ps
T305 /workspace/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.2624941436 Mar 26 02:55:50 PM PDT 24 Mar 26 02:55:51 PM PDT 24 81333358 ps
T306 /workspace/coverage/default/16.pwrmgr_reset.3007605259 Mar 26 02:55:46 PM PDT 24 Mar 26 02:55:47 PM PDT 24 106324617 ps
T307 /workspace/coverage/default/14.pwrmgr_aborted_low_power.751221022 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:42 PM PDT 24 27742791 ps
T308 /workspace/coverage/default/37.pwrmgr_stress_all.450235322 Mar 26 02:56:37 PM PDT 24 Mar 26 02:56:38 PM PDT 24 618262019 ps
T309 /workspace/coverage/default/48.pwrmgr_smoke.1060047610 Mar 26 02:57:07 PM PDT 24 Mar 26 02:57:09 PM PDT 24 31758638 ps
T310 /workspace/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.1899582508 Mar 26 02:56:39 PM PDT 24 Mar 26 02:56:40 PM PDT 24 30959077 ps
T311 /workspace/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2003104776 Mar 26 02:56:43 PM PDT 24 Mar 26 02:56:46 PM PDT 24 825222450 ps
T312 /workspace/coverage/default/28.pwrmgr_stress_all.1264564341 Mar 26 02:56:24 PM PDT 24 Mar 26 02:56:27 PM PDT 24 1708335523 ps
T313 /workspace/coverage/default/1.pwrmgr_escalation_timeout.4001671875 Mar 26 02:54:52 PM PDT 24 Mar 26 02:54:53 PM PDT 24 607367229 ps
T314 /workspace/coverage/default/8.pwrmgr_glitch.596427111 Mar 26 02:55:46 PM PDT 24 Mar 26 02:55:47 PM PDT 24 57099015 ps
T315 /workspace/coverage/default/26.pwrmgr_reset_invalid.2332318390 Mar 26 02:55:59 PM PDT 24 Mar 26 02:56:00 PM PDT 24 205827360 ps
T316 /workspace/coverage/default/7.pwrmgr_reset_invalid.3686220156 Mar 26 02:55:10 PM PDT 24 Mar 26 02:55:11 PM PDT 24 103579404 ps
T317 /workspace/coverage/default/35.pwrmgr_glitch.1496565775 Mar 26 02:56:38 PM PDT 24 Mar 26 02:56:39 PM PDT 24 52571604 ps
T318 /workspace/coverage/default/35.pwrmgr_aborted_low_power.1534662106 Mar 26 02:56:52 PM PDT 24 Mar 26 02:56:53 PM PDT 24 28284836 ps
T319 /workspace/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2141096612 Mar 26 02:56:39 PM PDT 24 Mar 26 02:56:40 PM PDT 24 29359953 ps
T320 /workspace/coverage/default/38.pwrmgr_global_esc.3616326532 Mar 26 02:57:19 PM PDT 24 Mar 26 02:57:19 PM PDT 24 36156818 ps
T321 /workspace/coverage/default/46.pwrmgr_smoke.3009106870 Mar 26 02:57:13 PM PDT 24 Mar 26 02:57:14 PM PDT 24 36853248 ps
T322 /workspace/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.1167186327 Mar 26 02:55:36 PM PDT 24 Mar 26 02:55:37 PM PDT 24 270432453 ps
T323 /workspace/coverage/default/35.pwrmgr_global_esc.2286143788 Mar 26 02:56:37 PM PDT 24 Mar 26 02:56:38 PM PDT 24 40196910 ps
T183 /workspace/coverage/default/12.pwrmgr_disable_rom_integrity_check.4099162975 Mar 26 02:55:48 PM PDT 24 Mar 26 02:55:49 PM PDT 24 54523291 ps
T324 /workspace/coverage/default/48.pwrmgr_stress_all_with_rand_reset.3713687435 Mar 26 02:57:21 PM PDT 24 Mar 26 02:57:29 PM PDT 24 4507646038 ps
T325 /workspace/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.2457008492 Mar 26 02:55:03 PM PDT 24 Mar 26 02:55:04 PM PDT 24 267071732 ps
T326 /workspace/coverage/default/46.pwrmgr_wakeup_reset.1522150733 Mar 26 02:57:06 PM PDT 24 Mar 26 02:57:08 PM PDT 24 260339260 ps
T327 /workspace/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.1424981295 Mar 26 02:57:03 PM PDT 24 Mar 26 02:57:03 PM PDT 24 30213516 ps
T328 /workspace/coverage/default/20.pwrmgr_stress_all.398434416 Mar 26 02:56:01 PM PDT 24 Mar 26 02:56:02 PM PDT 24 56659891 ps
T329 /workspace/coverage/default/26.pwrmgr_lowpower_invalid.3315377504 Mar 26 02:56:21 PM PDT 24 Mar 26 02:56:22 PM PDT 24 89841404 ps
T330 /workspace/coverage/default/7.pwrmgr_glitch.2815601454 Mar 26 02:55:17 PM PDT 24 Mar 26 02:55:18 PM PDT 24 48567194 ps
T331 /workspace/coverage/default/29.pwrmgr_stress_all.1158462646 Mar 26 02:56:25 PM PDT 24 Mar 26 02:56:27 PM PDT 24 749744907 ps
T332 /workspace/coverage/default/10.pwrmgr_global_esc.1419527465 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:42 PM PDT 24 59304097 ps
T333 /workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.2198115771 Mar 26 02:56:06 PM PDT 24 Mar 26 02:56:07 PM PDT 24 149571200 ps
T334 /workspace/coverage/default/32.pwrmgr_smoke.796235745 Mar 26 02:56:32 PM PDT 24 Mar 26 02:56:33 PM PDT 24 32978346 ps
T90 /workspace/coverage/default/41.pwrmgr_stress_all.4149025160 Mar 26 02:56:45 PM PDT 24 Mar 26 02:56:48 PM PDT 24 1747946619 ps
T335 /workspace/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.1485207848 Mar 26 02:55:14 PM PDT 24 Mar 26 02:55:15 PM PDT 24 217559395 ps
T336 /workspace/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4178729252 Mar 26 02:56:40 PM PDT 24 Mar 26 02:56:43 PM PDT 24 823274137 ps
T337 /workspace/coverage/default/22.pwrmgr_wakeup_reset.484373774 Mar 26 02:55:57 PM PDT 24 Mar 26 02:55:58 PM PDT 24 304575090 ps
T338 /workspace/coverage/default/39.pwrmgr_global_esc.892423303 Mar 26 02:56:37 PM PDT 24 Mar 26 02:56:42 PM PDT 24 58155542 ps
T339 /workspace/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1800639754 Mar 26 02:56:44 PM PDT 24 Mar 26 02:56:47 PM PDT 24 815921543 ps
T340 /workspace/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1955065929 Mar 26 02:56:43 PM PDT 24 Mar 26 02:56:44 PM PDT 24 64878834 ps
T341 /workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2076191056 Mar 26 02:56:36 PM PDT 24 Mar 26 02:56:39 PM PDT 24 775298099 ps
T342 /workspace/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1137442181 Mar 26 02:56:52 PM PDT 24 Mar 26 02:56:55 PM PDT 24 1352543349 ps
T343 /workspace/coverage/default/40.pwrmgr_lowpower_invalid.2331779571 Mar 26 02:56:35 PM PDT 24 Mar 26 02:56:36 PM PDT 24 124956459 ps
T344 /workspace/coverage/default/16.pwrmgr_smoke.1321887779 Mar 26 02:55:43 PM PDT 24 Mar 26 02:55:44 PM PDT 24 31696176 ps
T345 /workspace/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.3688745948 Mar 26 02:56:45 PM PDT 24 Mar 26 02:56:46 PM PDT 24 83182576 ps
T346 /workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.27318227 Mar 26 02:56:18 PM PDT 24 Mar 26 02:56:19 PM PDT 24 38496807 ps
T347 /workspace/coverage/default/44.pwrmgr_reset.3931957686 Mar 26 02:56:40 PM PDT 24 Mar 26 02:56:40 PM PDT 24 93455677 ps
T348 /workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1137589406 Mar 26 02:57:05 PM PDT 24 Mar 26 02:57:06 PM PDT 24 303614202 ps
T349 /workspace/coverage/default/44.pwrmgr_lowpower_invalid.2873565002 Mar 26 02:57:17 PM PDT 24 Mar 26 02:57:18 PM PDT 24 76766245 ps
T91 /workspace/coverage/default/13.pwrmgr_stress_all.3714124001 Mar 26 02:55:41 PM PDT 24 Mar 26 02:55:44 PM PDT 24 1907192081 ps
T128 /workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2911688375 Mar 26 02:56:08 PM PDT 24 Mar 26 02:56:19 PM PDT 24 3580710451 ps
T135 /workspace/coverage/default/43.pwrmgr_reset_invalid.2764076079 Mar 26 02:56:40 PM PDT 24 Mar 26 02:56:41 PM PDT 24 115586767 ps
T136 /workspace/coverage/default/34.pwrmgr_reset.3476275793 Mar 26 02:56:38 PM PDT 24 Mar 26 02:56:39 PM PDT 24 39162324 ps
T137 /workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.2956217900 Mar 26 02:56:59 PM PDT 24 Mar 26 02:57:01 PM PDT 24 269534676 ps
T138 /workspace/coverage/default/21.pwrmgr_lowpower_invalid.562121647 Mar 26 02:56:08 PM PDT 24 Mar 26 02:56:09 PM PDT 24 96946890 ps
T139 /workspace/coverage/default/19.pwrmgr_lowpower_wakeup_race.1576847063 Mar 26 02:56:08 PM PDT 24 Mar 26 02:56:09 PM PDT 24 77264528 ps
T140 /workspace/coverage/default/25.pwrmgr_glitch.4093330743 Mar 26 02:56:16 PM PDT 24 Mar 26 02:56:17 PM PDT 24 59454863 ps
T141 /workspace/coverage/default/22.pwrmgr_disable_rom_integrity_check.1480052617 Mar 26 02:55:50 PM PDT 24 Mar 26 02:55:51 PM PDT 24 66013932 ps
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