| T324 |
/workspace/coverage/default/19.pwrmgr_reset_invalid.1661722753 |
|
|
Mar 31 01:54:35 PM PDT 24 |
Mar 31 01:54:36 PM PDT 24 |
167205235 ps |
| T325 |
/workspace/coverage/default/21.pwrmgr_reset.1874616015 |
|
|
Mar 31 01:54:50 PM PDT 24 |
Mar 31 01:54:51 PM PDT 24 |
77710874 ps |
| T326 |
/workspace/coverage/default/18.pwrmgr_lowpower_invalid.2344716569 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
77663573 ps |
| T327 |
/workspace/coverage/default/15.pwrmgr_escalation_timeout.952844987 |
|
|
Mar 31 01:54:13 PM PDT 24 |
Mar 31 01:54:15 PM PDT 24 |
319550864 ps |
| T328 |
/workspace/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.115700447 |
|
|
Mar 31 01:56:18 PM PDT 24 |
Mar 31 01:56:18 PM PDT 24 |
32512706 ps |
| T329 |
/workspace/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.1878226107 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:34 PM PDT 24 |
448631039 ps |
| T330 |
/workspace/coverage/default/8.pwrmgr_global_esc.460267613 |
|
|
Mar 31 01:53:40 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
27255033 ps |
| T331 |
/workspace/coverage/default/34.pwrmgr_reset.132545930 |
|
|
Mar 31 01:55:31 PM PDT 24 |
Mar 31 01:55:32 PM PDT 24 |
49597292 ps |
| T332 |
/workspace/coverage/default/7.pwrmgr_glitch.633263781 |
|
|
Mar 31 01:53:40 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
80040047 ps |
| T333 |
/workspace/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.388870804 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:16 PM PDT 24 |
836458694 ps |
| T334 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1935387939 |
|
|
Mar 31 01:55:58 PM PDT 24 |
Mar 31 01:56:02 PM PDT 24 |
743820496 ps |
| T335 |
/workspace/coverage/default/42.pwrmgr_glitch.1298891064 |
|
|
Mar 31 01:56:09 PM PDT 24 |
Mar 31 01:56:09 PM PDT 24 |
61353213 ps |
| T45 |
/workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.121065869 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:57 PM PDT 24 |
4545575029 ps |
| T139 |
/workspace/coverage/default/7.pwrmgr_stress_all_with_rand_reset.3130290457 |
|
|
Mar 31 01:53:39 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
3689195234 ps |
| T336 |
/workspace/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.2841350876 |
|
|
Mar 31 01:54:57 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
52402622 ps |
| T337 |
/workspace/coverage/default/20.pwrmgr_smoke.1664930236 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:54:40 PM PDT 24 |
70073865 ps |
| T338 |
/workspace/coverage/default/23.pwrmgr_smoke.775039907 |
|
|
Mar 31 01:54:45 PM PDT 24 |
Mar 31 01:54:45 PM PDT 24 |
41862331 ps |
| T339 |
/workspace/coverage/default/43.pwrmgr_reset.2138000175 |
|
|
Mar 31 01:56:06 PM PDT 24 |
Mar 31 01:56:07 PM PDT 24 |
292994018 ps |
| T340 |
/workspace/coverage/default/44.pwrmgr_wakeup_reset.758419106 |
|
|
Mar 31 01:56:08 PM PDT 24 |
Mar 31 01:56:09 PM PDT 24 |
98860031 ps |
| T341 |
/workspace/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.147183825 |
|
|
Mar 31 01:54:36 PM PDT 24 |
Mar 31 01:54:37 PM PDT 24 |
36250394 ps |
| T342 |
/workspace/coverage/default/46.pwrmgr_lowpower_wakeup_race.167679060 |
|
|
Mar 31 01:56:20 PM PDT 24 |
Mar 31 01:56:21 PM PDT 24 |
73314629 ps |
| T343 |
/workspace/coverage/default/7.pwrmgr_lowpower_wakeup_race.3247850128 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:33 PM PDT 24 |
74106760 ps |
| T344 |
/workspace/coverage/default/24.pwrmgr_wakeup_reset.3128859541 |
|
|
Mar 31 01:54:50 PM PDT 24 |
Mar 31 01:54:51 PM PDT 24 |
240459424 ps |
| T345 |
/workspace/coverage/default/33.pwrmgr_glitch.492128388 |
|
|
Mar 31 01:55:32 PM PDT 24 |
Mar 31 01:55:33 PM PDT 24 |
72134562 ps |
| T346 |
/workspace/coverage/default/23.pwrmgr_lowpower_invalid.4120520065 |
|
|
Mar 31 01:54:49 PM PDT 24 |
Mar 31 01:54:50 PM PDT 24 |
87843851 ps |
| T95 |
/workspace/coverage/default/42.pwrmgr_stress_all_with_rand_reset.99033455 |
|
|
Mar 31 01:56:07 PM PDT 24 |
Mar 31 01:56:23 PM PDT 24 |
30259128272 ps |
| T347 |
/workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.2699698134 |
|
|
Mar 31 01:52:58 PM PDT 24 |
Mar 31 01:53:00 PM PDT 24 |
206929674 ps |
| T348 |
/workspace/coverage/default/35.pwrmgr_smoke.1413078176 |
|
|
Mar 31 01:55:38 PM PDT 24 |
Mar 31 01:55:39 PM PDT 24 |
29519088 ps |
| T349 |
/workspace/coverage/default/40.pwrmgr_glitch.4082552933 |
|
|
Mar 31 01:55:57 PM PDT 24 |
Mar 31 01:55:58 PM PDT 24 |
21799135 ps |
| T350 |
/workspace/coverage/default/13.pwrmgr_lowpower_wakeup_race.276404131 |
|
|
Mar 31 01:54:07 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
161118688 ps |
| T351 |
/workspace/coverage/default/2.pwrmgr_glitch.3084213958 |
|
|
Mar 31 01:53:13 PM PDT 24 |
Mar 31 01:53:14 PM PDT 24 |
35730552 ps |
| T352 |
/workspace/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2782978536 |
|
|
Mar 31 01:53:54 PM PDT 24 |
Mar 31 01:53:58 PM PDT 24 |
778269797 ps |
| T353 |
/workspace/coverage/default/2.pwrmgr_wakeup_reset.3610454324 |
|
|
Mar 31 01:53:17 PM PDT 24 |
Mar 31 01:53:18 PM PDT 24 |
73364182 ps |
| T354 |
/workspace/coverage/default/9.pwrmgr_stress_all_with_rand_reset.2814516991 |
|
|
Mar 31 01:53:45 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
16003375833 ps |
| T355 |
/workspace/coverage/default/44.pwrmgr_aborted_low_power.3249094539 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:14 PM PDT 24 |
19551361 ps |
| T356 |
/workspace/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.2204182291 |
|
|
Mar 31 01:54:42 PM PDT 24 |
Mar 31 01:54:43 PM PDT 24 |
224690160 ps |
| T357 |
/workspace/coverage/default/41.pwrmgr_smoke.3518535359 |
|
|
Mar 31 01:55:59 PM PDT 24 |
Mar 31 01:56:01 PM PDT 24 |
41303716 ps |
| T358 |
/workspace/coverage/default/30.pwrmgr_lowpower_wakeup_race.619522199 |
|
|
Mar 31 01:55:17 PM PDT 24 |
Mar 31 01:55:19 PM PDT 24 |
303794107 ps |
| T359 |
/workspace/coverage/default/18.pwrmgr_global_esc.3282858762 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:30 PM PDT 24 |
22906143 ps |
| T360 |
/workspace/coverage/default/28.pwrmgr_stress_all.4023588821 |
|
|
Mar 31 01:55:14 PM PDT 24 |
Mar 31 01:55:19 PM PDT 24 |
2487472565 ps |
| T361 |
/workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3716894727 |
|
|
Mar 31 01:55:01 PM PDT 24 |
Mar 31 01:55:03 PM PDT 24 |
1213724566 ps |
| T362 |
/workspace/coverage/default/38.pwrmgr_disable_rom_integrity_check.4188540434 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:55:55 PM PDT 24 |
72114736 ps |
| T363 |
/workspace/coverage/default/11.pwrmgr_wakeup.3754135327 |
|
|
Mar 31 01:53:52 PM PDT 24 |
Mar 31 01:53:53 PM PDT 24 |
230813290 ps |
| T364 |
/workspace/coverage/default/37.pwrmgr_reset_invalid.906458262 |
|
|
Mar 31 01:55:43 PM PDT 24 |
Mar 31 01:55:45 PM PDT 24 |
103355074 ps |
| T365 |
/workspace/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2796289457 |
|
|
Mar 31 01:53:51 PM PDT 24 |
Mar 31 01:53:53 PM PDT 24 |
1150511141 ps |
| T366 |
/workspace/coverage/default/22.pwrmgr_escalation_timeout.1284229891 |
|
|
Mar 31 01:54:45 PM PDT 24 |
Mar 31 01:54:46 PM PDT 24 |
308680127 ps |
| T367 |
/workspace/coverage/default/42.pwrmgr_lowpower_wakeup_race.3804663692 |
|
|
Mar 31 01:56:06 PM PDT 24 |
Mar 31 01:56:07 PM PDT 24 |
372565019 ps |
| T368 |
/workspace/coverage/default/14.pwrmgr_lowpower_wakeup_race.811755227 |
|
|
Mar 31 01:54:06 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
56961405 ps |
| T369 |
/workspace/coverage/default/27.pwrmgr_glitch.813057532 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:08 PM PDT 24 |
95388701 ps |
| T370 |
/workspace/coverage/default/18.pwrmgr_wakeup_reset.341523449 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:31 PM PDT 24 |
94275001 ps |
| T371 |
/workspace/coverage/default/0.pwrmgr_reset_invalid.2717945058 |
|
|
Mar 31 01:53:01 PM PDT 24 |
Mar 31 01:53:02 PM PDT 24 |
114992146 ps |
| T372 |
/workspace/coverage/default/29.pwrmgr_wakeup.448129473 |
|
|
Mar 31 01:55:13 PM PDT 24 |
Mar 31 01:55:14 PM PDT 24 |
121147135 ps |
| T373 |
/workspace/coverage/default/16.pwrmgr_wakeup.319131401 |
|
|
Mar 31 01:54:20 PM PDT 24 |
Mar 31 01:54:22 PM PDT 24 |
45394697 ps |
| T374 |
/workspace/coverage/default/41.pwrmgr_reset_invalid.2944680637 |
|
|
Mar 31 01:55:59 PM PDT 24 |
Mar 31 01:56:01 PM PDT 24 |
163596386 ps |
| T375 |
/workspace/coverage/default/30.pwrmgr_escalation_timeout.3740405429 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
160708003 ps |
| T376 |
/workspace/coverage/default/22.pwrmgr_glitch.3442828902 |
|
|
Mar 31 01:54:52 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
38430936 ps |
| T377 |
/workspace/coverage/default/49.pwrmgr_lowpower_wakeup_race.2105335256 |
|
|
Mar 31 01:56:35 PM PDT 24 |
Mar 31 01:56:36 PM PDT 24 |
376722306 ps |
| T378 |
/workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4085417648 |
|
|
Mar 31 01:55:58 PM PDT 24 |
Mar 31 01:56:02 PM PDT 24 |
744743463 ps |
| T379 |
/workspace/coverage/default/17.pwrmgr_glitch.1205079961 |
|
|
Mar 31 01:54:20 PM PDT 24 |
Mar 31 01:54:22 PM PDT 24 |
42125076 ps |
| T380 |
/workspace/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.3443432497 |
|
|
Mar 31 01:55:32 PM PDT 24 |
Mar 31 01:55:32 PM PDT 24 |
30675586 ps |
| T381 |
/workspace/coverage/default/48.pwrmgr_disable_rom_integrity_check.2177104021 |
|
|
Mar 31 01:56:33 PM PDT 24 |
Mar 31 01:56:34 PM PDT 24 |
61667009 ps |
| T382 |
/workspace/coverage/default/1.pwrmgr_escalation_timeout.3504036697 |
|
|
Mar 31 01:53:10 PM PDT 24 |
Mar 31 01:53:12 PM PDT 24 |
165495567 ps |
| T383 |
/workspace/coverage/default/23.pwrmgr_wakeup_reset.1585966294 |
|
|
Mar 31 01:54:43 PM PDT 24 |
Mar 31 01:54:43 PM PDT 24 |
186218810 ps |
| T384 |
/workspace/coverage/default/4.pwrmgr_glitch.3589187572 |
|
|
Mar 31 01:53:25 PM PDT 24 |
Mar 31 01:53:26 PM PDT 24 |
65161074 ps |
| T385 |
/workspace/coverage/default/16.pwrmgr_stress_all.2074923029 |
|
|
Mar 31 01:54:21 PM PDT 24 |
Mar 31 01:54:24 PM PDT 24 |
491809131 ps |
| T386 |
/workspace/coverage/default/20.pwrmgr_escalation_timeout.1361727417 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:54:40 PM PDT 24 |
162469617 ps |
| T387 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3624420345 |
|
|
Mar 31 01:53:59 PM PDT 24 |
Mar 31 01:54:02 PM PDT 24 |
1183606391 ps |
| T388 |
/workspace/coverage/default/36.pwrmgr_reset_invalid.3163578592 |
|
|
Mar 31 01:55:44 PM PDT 24 |
Mar 31 01:55:46 PM PDT 24 |
90109844 ps |
| T389 |
/workspace/coverage/default/6.pwrmgr_escalation_timeout.2062912367 |
|
|
Mar 31 01:53:37 PM PDT 24 |
Mar 31 01:53:38 PM PDT 24 |
391667454 ps |
| T21 |
/workspace/coverage/default/3.pwrmgr_sec_cm.2534516578 |
|
|
Mar 31 01:53:23 PM PDT 24 |
Mar 31 01:53:24 PM PDT 24 |
364856124 ps |
| T390 |
/workspace/coverage/default/44.pwrmgr_lowpower_wakeup_race.825358211 |
|
|
Mar 31 01:56:09 PM PDT 24 |
Mar 31 01:56:10 PM PDT 24 |
316264736 ps |
| T391 |
/workspace/coverage/default/15.pwrmgr_glitch.1995499707 |
|
|
Mar 31 01:54:18 PM PDT 24 |
Mar 31 01:54:18 PM PDT 24 |
82103134 ps |
| T392 |
/workspace/coverage/default/25.pwrmgr_global_esc.344123808 |
|
|
Mar 31 01:54:57 PM PDT 24 |
Mar 31 01:54:58 PM PDT 24 |
255831994 ps |
| T393 |
/workspace/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.2484266232 |
|
|
Mar 31 01:53:47 PM PDT 24 |
Mar 31 01:53:48 PM PDT 24 |
100258364 ps |
| T394 |
/workspace/coverage/default/3.pwrmgr_smoke.3123808195 |
|
|
Mar 31 01:53:14 PM PDT 24 |
Mar 31 01:53:15 PM PDT 24 |
32323981 ps |
| T395 |
/workspace/coverage/default/22.pwrmgr_lowpower_invalid.3481824943 |
|
|
Mar 31 01:54:52 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
40725155 ps |
| T396 |
/workspace/coverage/default/39.pwrmgr_glitch.3067725786 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:55:54 PM PDT 24 |
31850471 ps |
| T397 |
/workspace/coverage/default/35.pwrmgr_reset_invalid.679965334 |
|
|
Mar 31 01:55:46 PM PDT 24 |
Mar 31 01:55:47 PM PDT 24 |
235765274 ps |
| T398 |
/workspace/coverage/default/36.pwrmgr_glitch.533557607 |
|
|
Mar 31 01:55:38 PM PDT 24 |
Mar 31 01:55:39 PM PDT 24 |
34892992 ps |
| T399 |
/workspace/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.3633107064 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:39 PM PDT 24 |
40339391 ps |
| T400 |
/workspace/coverage/default/15.pwrmgr_wakeup.3197308268 |
|
|
Mar 31 01:54:12 PM PDT 24 |
Mar 31 01:54:13 PM PDT 24 |
182045993 ps |
| T401 |
/workspace/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3876822236 |
|
|
Mar 31 01:55:50 PM PDT 24 |
Mar 31 01:55:53 PM PDT 24 |
938042756 ps |
| T402 |
/workspace/coverage/default/47.pwrmgr_reset.2679714961 |
|
|
Mar 31 01:56:28 PM PDT 24 |
Mar 31 01:56:28 PM PDT 24 |
46209051 ps |
| T403 |
/workspace/coverage/default/17.pwrmgr_reset_invalid.4054197667 |
|
|
Mar 31 01:54:22 PM PDT 24 |
Mar 31 01:54:23 PM PDT 24 |
110214681 ps |
| T404 |
/workspace/coverage/default/33.pwrmgr_lowpower_wakeup_race.399747260 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
386812036 ps |
| T405 |
/workspace/coverage/default/25.pwrmgr_lowpower_wakeup_race.116864457 |
|
|
Mar 31 01:54:58 PM PDT 24 |
Mar 31 01:54:59 PM PDT 24 |
421170335 ps |
| T406 |
/workspace/coverage/default/5.pwrmgr_glitch.3867218157 |
|
|
Mar 31 01:53:28 PM PDT 24 |
Mar 31 01:53:29 PM PDT 24 |
44423932 ps |
| T407 |
/workspace/coverage/default/3.pwrmgr_wakeup_reset.2800884795 |
|
|
Mar 31 01:53:15 PM PDT 24 |
Mar 31 01:53:16 PM PDT 24 |
220361018 ps |
| T408 |
/workspace/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3587602818 |
|
|
Mar 31 01:54:42 PM PDT 24 |
Mar 31 01:54:45 PM PDT 24 |
1186932908 ps |
| T409 |
/workspace/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.2084347156 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
144063437 ps |
| T410 |
/workspace/coverage/default/23.pwrmgr_global_esc.1175915179 |
|
|
Mar 31 01:54:51 PM PDT 24 |
Mar 31 01:54:52 PM PDT 24 |
36021209 ps |
| T411 |
/workspace/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3081158241 |
|
|
Mar 31 01:55:12 PM PDT 24 |
Mar 31 01:55:15 PM PDT 24 |
793553539 ps |
| T412 |
/workspace/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3021384203 |
|
|
Mar 31 01:54:52 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
39790473 ps |
| T102 |
/workspace/coverage/default/12.pwrmgr_stress_all.263233617 |
|
|
Mar 31 01:53:59 PM PDT 24 |
Mar 31 01:54:02 PM PDT 24 |
1474572257 ps |
| T413 |
/workspace/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.1559312915 |
|
|
Mar 31 01:55:31 PM PDT 24 |
Mar 31 01:55:32 PM PDT 24 |
32485703 ps |
| T414 |
/workspace/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2822457447 |
|
|
Mar 31 01:54:14 PM PDT 24 |
Mar 31 01:54:16 PM PDT 24 |
142528655 ps |
| T415 |
/workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.253644695 |
|
|
Mar 31 01:56:04 PM PDT 24 |
Mar 31 01:56:07 PM PDT 24 |
837001728 ps |
| T416 |
/workspace/coverage/default/0.pwrmgr_reset.2771731567 |
|
|
Mar 31 01:52:55 PM PDT 24 |
Mar 31 01:52:56 PM PDT 24 |
52745658 ps |
| T417 |
/workspace/coverage/default/31.pwrmgr_stress_all.3484300834 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:24 PM PDT 24 |
662034747 ps |
| T418 |
/workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.3798108308 |
|
|
Mar 31 01:55:02 PM PDT 24 |
Mar 31 01:55:03 PM PDT 24 |
70356271 ps |
| T419 |
/workspace/coverage/default/35.pwrmgr_wakeup_reset.3492221869 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:35 PM PDT 24 |
343127209 ps |
| T420 |
/workspace/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.972785359 |
|
|
Mar 31 01:55:02 PM PDT 24 |
Mar 31 01:55:05 PM PDT 24 |
747367088 ps |
| T421 |
/workspace/coverage/default/5.pwrmgr_smoke.39551457 |
|
|
Mar 31 01:53:25 PM PDT 24 |
Mar 31 01:53:26 PM PDT 24 |
70823816 ps |
| T103 |
/workspace/coverage/default/0.pwrmgr_stress_all.2294421962 |
|
|
Mar 31 01:53:03 PM PDT 24 |
Mar 31 01:53:07 PM PDT 24 |
1834543593 ps |
| T422 |
/workspace/coverage/default/39.pwrmgr_reset_invalid.122877044 |
|
|
Mar 31 01:55:58 PM PDT 24 |
Mar 31 01:55:59 PM PDT 24 |
156217076 ps |
| T423 |
/workspace/coverage/default/33.pwrmgr_reset.3925688238 |
|
|
Mar 31 01:55:26 PM PDT 24 |
Mar 31 01:55:27 PM PDT 24 |
123207656 ps |
| T424 |
/workspace/coverage/default/14.pwrmgr_global_esc.905173433 |
|
|
Mar 31 01:54:12 PM PDT 24 |
Mar 31 01:54:13 PM PDT 24 |
53333836 ps |
| T425 |
/workspace/coverage/default/30.pwrmgr_wakeup_reset.2757643617 |
|
|
Mar 31 01:55:17 PM PDT 24 |
Mar 31 01:55:18 PM PDT 24 |
100821656 ps |
| T426 |
/workspace/coverage/default/11.pwrmgr_aborted_low_power.1095425033 |
|
|
Mar 31 01:53:54 PM PDT 24 |
Mar 31 01:53:55 PM PDT 24 |
42177748 ps |
| T427 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.3376214192 |
|
|
Mar 31 01:53:50 PM PDT 24 |
Mar 31 01:53:51 PM PDT 24 |
75524932 ps |
| T428 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3312082031 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:36 PM PDT 24 |
912776222 ps |
| T429 |
/workspace/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.3180171553 |
|
|
Mar 31 01:56:03 PM PDT 24 |
Mar 31 01:56:04 PM PDT 24 |
105521202 ps |
| T430 |
/workspace/coverage/default/18.pwrmgr_lowpower_wakeup_race.1911627095 |
|
|
Mar 31 01:54:29 PM PDT 24 |
Mar 31 01:54:30 PM PDT 24 |
223087898 ps |
| T431 |
/workspace/coverage/default/31.pwrmgr_aborted_low_power.105708370 |
|
|
Mar 31 01:55:22 PM PDT 24 |
Mar 31 01:55:23 PM PDT 24 |
22168866 ps |
| T432 |
/workspace/coverage/default/37.pwrmgr_global_esc.3424457882 |
|
|
Mar 31 01:55:48 PM PDT 24 |
Mar 31 01:55:48 PM PDT 24 |
48091621 ps |
| T433 |
/workspace/coverage/default/19.pwrmgr_global_esc.637576025 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:39 PM PDT 24 |
62891789 ps |
| T434 |
/workspace/coverage/default/33.pwrmgr_wakeup.3864003469 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:28 PM PDT 24 |
112522357 ps |
| T435 |
/workspace/coverage/default/13.pwrmgr_smoke.895867348 |
|
|
Mar 31 01:54:00 PM PDT 24 |
Mar 31 01:54:01 PM PDT 24 |
31306501 ps |
| T436 |
/workspace/coverage/default/9.pwrmgr_glitch.285065976 |
|
|
Mar 31 01:53:50 PM PDT 24 |
Mar 31 01:53:50 PM PDT 24 |
54214196 ps |
| T104 |
/workspace/coverage/default/8.pwrmgr_aborted_low_power.1495103787 |
|
|
Mar 31 01:53:40 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
74910295 ps |
| T437 |
/workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.838316294 |
|
|
Mar 31 01:53:18 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
9888879615 ps |
| T438 |
/workspace/coverage/default/14.pwrmgr_escalation_timeout.3372261642 |
|
|
Mar 31 01:54:18 PM PDT 24 |
Mar 31 01:54:19 PM PDT 24 |
167148538 ps |
| T439 |
/workspace/coverage/default/23.pwrmgr_escalation_timeout.117219974 |
|
|
Mar 31 01:54:52 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
318493390 ps |
| T440 |
/workspace/coverage/default/3.pwrmgr_reset_invalid.138679248 |
|
|
Mar 31 01:53:22 PM PDT 24 |
Mar 31 01:53:23 PM PDT 24 |
111807990 ps |
| T441 |
/workspace/coverage/default/24.pwrmgr_glitch.2427422267 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:54 PM PDT 24 |
25116052 ps |
| T442 |
/workspace/coverage/default/11.pwrmgr_lowpower_invalid.703657337 |
|
|
Mar 31 01:54:01 PM PDT 24 |
Mar 31 01:54:02 PM PDT 24 |
47720737 ps |
| T443 |
/workspace/coverage/default/42.pwrmgr_wakeup.2678293230 |
|
|
Mar 31 01:56:07 PM PDT 24 |
Mar 31 01:56:08 PM PDT 24 |
198427644 ps |
| T444 |
/workspace/coverage/default/10.pwrmgr_stress_all.3252703641 |
|
|
Mar 31 01:53:55 PM PDT 24 |
Mar 31 01:53:56 PM PDT 24 |
812684874 ps |
| T445 |
/workspace/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.3839282973 |
|
|
Mar 31 01:54:10 PM PDT 24 |
Mar 31 01:54:12 PM PDT 24 |
205402221 ps |
| T446 |
/workspace/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.1036718560 |
|
|
Mar 31 01:56:12 PM PDT 24 |
Mar 31 01:56:13 PM PDT 24 |
30872146 ps |
| T447 |
/workspace/coverage/default/6.pwrmgr_lowpower_wakeup_race.3509549250 |
|
|
Mar 31 01:53:38 PM PDT 24 |
Mar 31 01:53:39 PM PDT 24 |
274136860 ps |
| T448 |
/workspace/coverage/default/1.pwrmgr_reset_invalid.2760634449 |
|
|
Mar 31 01:53:10 PM PDT 24 |
Mar 31 01:53:11 PM PDT 24 |
98209241 ps |
| T449 |
/workspace/coverage/default/3.pwrmgr_escalation_timeout.1223004219 |
|
|
Mar 31 01:53:18 PM PDT 24 |
Mar 31 01:53:19 PM PDT 24 |
308620269 ps |
| T450 |
/workspace/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.869739068 |
|
|
Mar 31 01:55:28 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
29487711 ps |
| T451 |
/workspace/coverage/default/36.pwrmgr_stress_all.648282272 |
|
|
Mar 31 01:55:44 PM PDT 24 |
Mar 31 01:55:51 PM PDT 24 |
2944000952 ps |
| T452 |
/workspace/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1733331497 |
|
|
Mar 31 01:55:54 PM PDT 24 |
Mar 31 01:55:57 PM PDT 24 |
1044435902 ps |
| T140 |
/workspace/coverage/default/48.pwrmgr_stress_all_with_rand_reset.2098177053 |
|
|
Mar 31 01:56:34 PM PDT 24 |
Mar 31 01:57:11 PM PDT 24 |
12727082433 ps |
| T453 |
/workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.281792561 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:15 PM PDT 24 |
208162872 ps |
| T454 |
/workspace/coverage/default/28.pwrmgr_lowpower_wakeup_race.1546430053 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:08 PM PDT 24 |
165624124 ps |
| T455 |
/workspace/coverage/default/47.pwrmgr_wakeup.658960296 |
|
|
Mar 31 01:56:24 PM PDT 24 |
Mar 31 01:56:24 PM PDT 24 |
81042545 ps |
| T456 |
/workspace/coverage/default/34.pwrmgr_wakeup_reset.3451520773 |
|
|
Mar 31 01:55:36 PM PDT 24 |
Mar 31 01:55:37 PM PDT 24 |
45561485 ps |
| T457 |
/workspace/coverage/default/0.pwrmgr_lowpower_invalid.3353040743 |
|
|
Mar 31 01:53:03 PM PDT 24 |
Mar 31 01:53:04 PM PDT 24 |
54054838 ps |
| T458 |
/workspace/coverage/default/11.pwrmgr_wakeup_reset.4126590607 |
|
|
Mar 31 01:53:53 PM PDT 24 |
Mar 31 01:53:54 PM PDT 24 |
84608319 ps |
| T459 |
/workspace/coverage/default/16.pwrmgr_lowpower_invalid.46099838 |
|
|
Mar 31 01:54:24 PM PDT 24 |
Mar 31 01:54:25 PM PDT 24 |
84667187 ps |
| T460 |
/workspace/coverage/default/13.pwrmgr_reset_invalid.1500199316 |
|
|
Mar 31 01:54:06 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
114886068 ps |
| T461 |
/workspace/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4132784661 |
|
|
Mar 31 01:54:08 PM PDT 24 |
Mar 31 01:54:12 PM PDT 24 |
923799244 ps |
| T462 |
/workspace/coverage/default/41.pwrmgr_wakeup_reset.2724046263 |
|
|
Mar 31 01:56:01 PM PDT 24 |
Mar 31 01:56:02 PM PDT 24 |
202054218 ps |
| T463 |
/workspace/coverage/default/10.pwrmgr_escalation_timeout.2910073973 |
|
|
Mar 31 01:53:54 PM PDT 24 |
Mar 31 01:53:55 PM PDT 24 |
218579691 ps |
| T464 |
/workspace/coverage/default/39.pwrmgr_disable_rom_integrity_check.2812069971 |
|
|
Mar 31 01:55:57 PM PDT 24 |
Mar 31 01:55:58 PM PDT 24 |
86690428 ps |
| T465 |
/workspace/coverage/default/38.pwrmgr_wakeup.223352721 |
|
|
Mar 31 01:55:44 PM PDT 24 |
Mar 31 01:55:45 PM PDT 24 |
78094886 ps |
| T466 |
/workspace/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.1349610719 |
|
|
Mar 31 01:55:32 PM PDT 24 |
Mar 31 01:55:33 PM PDT 24 |
72573671 ps |
| T467 |
/workspace/coverage/default/9.pwrmgr_wakeup_reset.3841670606 |
|
|
Mar 31 01:53:51 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
376575431 ps |
| T468 |
/workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.3468266234 |
|
|
Mar 31 01:53:39 PM PDT 24 |
Mar 31 01:53:40 PM PDT 24 |
80553244 ps |
| T469 |
/workspace/coverage/default/31.pwrmgr_global_esc.2516279581 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
50699322 ps |
| T470 |
/workspace/coverage/default/45.pwrmgr_stress_all.1015029663 |
|
|
Mar 31 01:56:21 PM PDT 24 |
Mar 31 01:56:24 PM PDT 24 |
1086994884 ps |
| T471 |
/workspace/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.2243164651 |
|
|
Mar 31 01:56:11 PM PDT 24 |
Mar 31 01:56:12 PM PDT 24 |
31716683 ps |
| T472 |
/workspace/coverage/default/44.pwrmgr_lowpower_invalid.3000366377 |
|
|
Mar 31 01:56:11 PM PDT 24 |
Mar 31 01:56:12 PM PDT 24 |
78211537 ps |
| T473 |
/workspace/coverage/default/0.pwrmgr_glitch.1784231856 |
|
|
Mar 31 01:52:58 PM PDT 24 |
Mar 31 01:53:00 PM PDT 24 |
39623094 ps |
| T474 |
/workspace/coverage/default/9.pwrmgr_wakeup.758929422 |
|
|
Mar 31 01:53:52 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
122058923 ps |
| T475 |
/workspace/coverage/default/14.pwrmgr_wakeup.1605803663 |
|
|
Mar 31 01:54:08 PM PDT 24 |
Mar 31 01:54:09 PM PDT 24 |
208789823 ps |
| T476 |
/workspace/coverage/default/48.pwrmgr_stress_all.1675607342 |
|
|
Mar 31 01:56:33 PM PDT 24 |
Mar 31 01:56:34 PM PDT 24 |
281210745 ps |
| T477 |
/workspace/coverage/default/5.pwrmgr_stress_all_with_rand_reset.3777472367 |
|
|
Mar 31 01:53:28 PM PDT 24 |
Mar 31 01:53:58 PM PDT 24 |
8888255261 ps |
| T478 |
/workspace/coverage/default/41.pwrmgr_stress_all.1964902980 |
|
|
Mar 31 01:56:01 PM PDT 24 |
Mar 31 01:56:03 PM PDT 24 |
341765131 ps |
| T479 |
/workspace/coverage/default/31.pwrmgr_escalation_timeout.3808746226 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
321394693 ps |
| T480 |
/workspace/coverage/default/13.pwrmgr_aborted_low_power.187628571 |
|
|
Mar 31 01:54:10 PM PDT 24 |
Mar 31 01:54:11 PM PDT 24 |
93423622 ps |
| T481 |
/workspace/coverage/default/1.pwrmgr_wakeup.1022630960 |
|
|
Mar 31 01:53:01 PM PDT 24 |
Mar 31 01:53:02 PM PDT 24 |
156186222 ps |
| T482 |
/workspace/coverage/default/33.pwrmgr_stress_all.3325297137 |
|
|
Mar 31 01:55:36 PM PDT 24 |
Mar 31 01:55:40 PM PDT 24 |
1832617137 ps |
| T483 |
/workspace/coverage/default/16.pwrmgr_escalation_timeout.3162509925 |
|
|
Mar 31 01:54:22 PM PDT 24 |
Mar 31 01:54:24 PM PDT 24 |
610093190 ps |
| T484 |
/workspace/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2944364119 |
|
|
Mar 31 01:53:20 PM PDT 24 |
Mar 31 01:53:23 PM PDT 24 |
1241996926 ps |
| T485 |
/workspace/coverage/default/36.pwrmgr_lowpower_invalid.937388026 |
|
|
Mar 31 01:55:50 PM PDT 24 |
Mar 31 01:55:51 PM PDT 24 |
40504418 ps |
| T486 |
/workspace/coverage/default/18.pwrmgr_stress_all_with_rand_reset.1613342550 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:40 PM PDT 24 |
5263956881 ps |
| T487 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4025654842 |
|
|
Mar 31 01:54:06 PM PDT 24 |
Mar 31 01:54:09 PM PDT 24 |
805968552 ps |
| T488 |
/workspace/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2808157441 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:30 PM PDT 24 |
1678237307 ps |
| T105 |
/workspace/coverage/default/1.pwrmgr_aborted_low_power.1980855111 |
|
|
Mar 31 01:53:03 PM PDT 24 |
Mar 31 01:53:05 PM PDT 24 |
27425716 ps |
| T489 |
/workspace/coverage/default/33.pwrmgr_aborted_low_power.495531096 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
74528195 ps |
| T490 |
/workspace/coverage/default/17.pwrmgr_reset.3301099427 |
|
|
Mar 31 01:54:23 PM PDT 24 |
Mar 31 01:54:24 PM PDT 24 |
42403340 ps |
| T491 |
/workspace/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.1869562636 |
|
|
Mar 31 01:55:45 PM PDT 24 |
Mar 31 01:55:47 PM PDT 24 |
256233468 ps |
| T492 |
/workspace/coverage/default/43.pwrmgr_glitch.127802553 |
|
|
Mar 31 01:56:11 PM PDT 24 |
Mar 31 01:56:11 PM PDT 24 |
56094235 ps |
| T493 |
/workspace/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.1243244446 |
|
|
Mar 31 01:56:38 PM PDT 24 |
Mar 31 01:56:39 PM PDT 24 |
29226712 ps |
| T494 |
/workspace/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.2132932533 |
|
|
Mar 31 01:53:15 PM PDT 24 |
Mar 31 01:53:16 PM PDT 24 |
68014865 ps |
| T22 |
/workspace/coverage/default/2.pwrmgr_sec_cm.1605841528 |
|
|
Mar 31 01:53:14 PM PDT 24 |
Mar 31 01:53:15 PM PDT 24 |
392669923 ps |
| T495 |
/workspace/coverage/default/45.pwrmgr_aborted_low_power.2574800612 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:14 PM PDT 24 |
20107856 ps |
| T496 |
/workspace/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.1467153689 |
|
|
Mar 31 01:55:02 PM PDT 24 |
Mar 31 01:55:03 PM PDT 24 |
76983459 ps |
| T497 |
/workspace/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1130454331 |
|
|
Mar 31 01:54:20 PM PDT 24 |
Mar 31 01:54:24 PM PDT 24 |
779684730 ps |
| T498 |
/workspace/coverage/default/40.pwrmgr_global_esc.544981499 |
|
|
Mar 31 01:55:56 PM PDT 24 |
Mar 31 01:55:57 PM PDT 24 |
81416945 ps |
| T499 |
/workspace/coverage/default/0.pwrmgr_global_esc.1256999602 |
|
|
Mar 31 01:52:56 PM PDT 24 |
Mar 31 01:52:57 PM PDT 24 |
65243397 ps |
| T500 |
/workspace/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1256455917 |
|
|
Mar 31 01:56:24 PM PDT 24 |
Mar 31 01:56:27 PM PDT 24 |
891508123 ps |
| T501 |
/workspace/coverage/default/7.pwrmgr_escalation_timeout.2351676794 |
|
|
Mar 31 01:53:38 PM PDT 24 |
Mar 31 01:53:39 PM PDT 24 |
168523903 ps |
| T502 |
/workspace/coverage/default/18.pwrmgr_disable_rom_integrity_check.3847026752 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:32 PM PDT 24 |
55859648 ps |
| T503 |
/workspace/coverage/default/17.pwrmgr_lowpower_wakeup_race.4167352350 |
|
|
Mar 31 01:54:20 PM PDT 24 |
Mar 31 01:54:21 PM PDT 24 |
269959629 ps |
| T504 |
/workspace/coverage/default/12.pwrmgr_lowpower_wakeup_race.609769134 |
|
|
Mar 31 01:54:02 PM PDT 24 |
Mar 31 01:54:04 PM PDT 24 |
167682605 ps |
| T505 |
/workspace/coverage/default/49.pwrmgr_stress_all.3263802255 |
|
|
Mar 31 01:56:38 PM PDT 24 |
Mar 31 01:56:43 PM PDT 24 |
1431210077 ps |
| T506 |
/workspace/coverage/default/29.pwrmgr_wakeup_reset.3506312402 |
|
|
Mar 31 01:55:16 PM PDT 24 |
Mar 31 01:55:17 PM PDT 24 |
45563227 ps |
| T507 |
/workspace/coverage/default/5.pwrmgr_global_esc.3381879061 |
|
|
Mar 31 01:53:30 PM PDT 24 |
Mar 31 01:53:31 PM PDT 24 |
41399163 ps |
| T508 |
/workspace/coverage/default/18.pwrmgr_reset.208528002 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
83176949 ps |
| T509 |
/workspace/coverage/default/16.pwrmgr_global_esc.2269051442 |
|
|
Mar 31 01:54:19 PM PDT 24 |
Mar 31 01:54:20 PM PDT 24 |
71175680 ps |
| T510 |
/workspace/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.131741621 |
|
|
Mar 31 01:55:09 PM PDT 24 |
Mar 31 01:55:10 PM PDT 24 |
38713905 ps |
| T511 |
/workspace/coverage/default/36.pwrmgr_wakeup_reset.2682263076 |
|
|
Mar 31 01:55:38 PM PDT 24 |
Mar 31 01:55:39 PM PDT 24 |
258523195 ps |
| T512 |
/workspace/coverage/default/28.pwrmgr_escalation_timeout.2720988789 |
|
|
Mar 31 01:55:11 PM PDT 24 |
Mar 31 01:55:12 PM PDT 24 |
326747630 ps |
| T513 |
/workspace/coverage/default/9.pwrmgr_disable_rom_integrity_check.3019079637 |
|
|
Mar 31 01:53:51 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
65268986 ps |
| T514 |
/workspace/coverage/default/33.pwrmgr_reset_invalid.3041546839 |
|
|
Mar 31 01:55:35 PM PDT 24 |
Mar 31 01:55:36 PM PDT 24 |
485889195 ps |
| T515 |
/workspace/coverage/default/4.pwrmgr_wakeup_reset.3978290016 |
|
|
Mar 31 01:53:23 PM PDT 24 |
Mar 31 01:53:24 PM PDT 24 |
67589208 ps |
| T516 |
/workspace/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.2949618885 |
|
|
Mar 31 01:54:53 PM PDT 24 |
Mar 31 01:54:54 PM PDT 24 |
29726905 ps |
| T517 |
/workspace/coverage/default/26.pwrmgr_global_esc.119260863 |
|
|
Mar 31 01:55:05 PM PDT 24 |
Mar 31 01:55:05 PM PDT 24 |
60514957 ps |
| T518 |
/workspace/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.175208798 |
|
|
Mar 31 01:55:05 PM PDT 24 |
Mar 31 01:55:06 PM PDT 24 |
101050621 ps |
| T519 |
/workspace/coverage/default/26.pwrmgr_glitch.2483175600 |
|
|
Mar 31 01:55:04 PM PDT 24 |
Mar 31 01:55:05 PM PDT 24 |
78660230 ps |
| T520 |
/workspace/coverage/default/35.pwrmgr_stress_all_with_rand_reset.1686799067 |
|
|
Mar 31 01:55:40 PM PDT 24 |
Mar 31 01:55:55 PM PDT 24 |
6498190657 ps |
| T521 |
/workspace/coverage/default/38.pwrmgr_lowpower_wakeup_race.2074440045 |
|
|
Mar 31 01:55:46 PM PDT 24 |
Mar 31 01:55:47 PM PDT 24 |
298383433 ps |
| T522 |
/workspace/coverage/default/37.pwrmgr_lowpower_invalid.3178627529 |
|
|
Mar 31 01:55:52 PM PDT 24 |
Mar 31 01:55:53 PM PDT 24 |
64586212 ps |
| T523 |
/workspace/coverage/default/38.pwrmgr_wakeup_reset.161081048 |
|
|
Mar 31 01:55:47 PM PDT 24 |
Mar 31 01:55:48 PM PDT 24 |
141659239 ps |
| T141 |
/workspace/coverage/default/30.pwrmgr_stress_all_with_rand_reset.3559444381 |
|
|
Mar 31 01:55:19 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
7511867311 ps |
| T524 |
/workspace/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1925421582 |
|
|
Mar 31 01:56:24 PM PDT 24 |
Mar 31 01:56:28 PM PDT 24 |
898095586 ps |
| T525 |
/workspace/coverage/default/16.pwrmgr_lowpower_wakeup_race.1353617185 |
|
|
Mar 31 01:54:23 PM PDT 24 |
Mar 31 01:54:24 PM PDT 24 |
485096983 ps |
| T526 |
/workspace/coverage/default/27.pwrmgr_escalation_timeout.221786559 |
|
|
Mar 31 01:55:09 PM PDT 24 |
Mar 31 01:55:10 PM PDT 24 |
320372389 ps |
| T527 |
/workspace/coverage/default/2.pwrmgr_smoke.1071612408 |
|
|
Mar 31 01:53:09 PM PDT 24 |
Mar 31 01:53:10 PM PDT 24 |
60584004 ps |
| T528 |
/workspace/coverage/default/43.pwrmgr_reset_invalid.2283884076 |
|
|
Mar 31 01:56:12 PM PDT 24 |
Mar 31 01:56:13 PM PDT 24 |
98264942 ps |
| T529 |
/workspace/coverage/default/8.pwrmgr_lowpower_invalid.694473083 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
74803696 ps |
| T530 |
/workspace/coverage/default/7.pwrmgr_aborted_low_power.3754795046 |
|
|
Mar 31 01:53:32 PM PDT 24 |
Mar 31 01:53:33 PM PDT 24 |
20542705 ps |
| T531 |
/workspace/coverage/default/29.pwrmgr_reset.128404324 |
|
|
Mar 31 01:55:13 PM PDT 24 |
Mar 31 01:55:14 PM PDT 24 |
78231489 ps |
| T532 |
/workspace/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.559870920 |
|
|
Mar 31 01:53:17 PM PDT 24 |
Mar 31 01:53:17 PM PDT 24 |
136442944 ps |
| T533 |
/workspace/coverage/default/10.pwrmgr_wakeup_reset.507875852 |
|
|
Mar 31 01:53:45 PM PDT 24 |
Mar 31 01:53:46 PM PDT 24 |
373645055 ps |
| T534 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.641405586 |
|
|
Mar 31 01:56:33 PM PDT 24 |
Mar 31 01:56:36 PM PDT 24 |
851001428 ps |
| T535 |
/workspace/coverage/default/42.pwrmgr_reset.3012205721 |
|
|
Mar 31 01:56:06 PM PDT 24 |
Mar 31 01:56:07 PM PDT 24 |
76377656 ps |
| T536 |
/workspace/coverage/default/48.pwrmgr_reset_invalid.3233492103 |
|
|
Mar 31 01:56:33 PM PDT 24 |
Mar 31 01:56:34 PM PDT 24 |
156402308 ps |
| T537 |
/workspace/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.133799881 |
|
|
Mar 31 01:55:16 PM PDT 24 |
Mar 31 01:55:17 PM PDT 24 |
1329812567 ps |
| T538 |
/workspace/coverage/default/15.pwrmgr_aborted_low_power.817467786 |
|
|
Mar 31 01:54:12 PM PDT 24 |
Mar 31 01:54:12 PM PDT 24 |
70585173 ps |
| T539 |
/workspace/coverage/default/48.pwrmgr_lowpower_wakeup_race.4066701932 |
|
|
Mar 31 01:56:25 PM PDT 24 |
Mar 31 01:56:26 PM PDT 24 |
172932826 ps |
| T540 |
/workspace/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3867543687 |
|
|
Mar 31 01:55:42 PM PDT 24 |
Mar 31 01:55:44 PM PDT 24 |
2497030366 ps |
| T541 |
/workspace/coverage/default/1.pwrmgr_lowpower_invalid.824187737 |
|
|
Mar 31 01:53:07 PM PDT 24 |
Mar 31 01:53:08 PM PDT 24 |
42198357 ps |
| T542 |
/workspace/coverage/default/22.pwrmgr_aborted_low_power.2282649457 |
|
|
Mar 31 01:54:43 PM PDT 24 |
Mar 31 01:54:44 PM PDT 24 |
121708225 ps |
| T543 |
/workspace/coverage/default/18.pwrmgr_reset_invalid.3702393818 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:31 PM PDT 24 |
158131812 ps |
| T544 |
/workspace/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3033252247 |
|
|
Mar 31 01:53:26 PM PDT 24 |
Mar 31 01:53:28 PM PDT 24 |
1015551505 ps |
| T545 |
/workspace/coverage/default/38.pwrmgr_aborted_low_power.1300399572 |
|
|
Mar 31 01:55:44 PM PDT 24 |
Mar 31 01:55:46 PM PDT 24 |
118379124 ps |
| T77 |
/workspace/coverage/default/12.pwrmgr_stress_all_with_rand_reset.78945617 |
|
|
Mar 31 01:53:59 PM PDT 24 |
Mar 31 01:54:11 PM PDT 24 |
2785893197 ps |
| T546 |
/workspace/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3339513453 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:58 PM PDT 24 |
1293041018 ps |
| T547 |
/workspace/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.160980892 |
|
|
Mar 31 01:56:14 PM PDT 24 |
Mar 31 01:56:16 PM PDT 24 |
1695900607 ps |
| T548 |
/workspace/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.434697695 |
|
|
Mar 31 01:55:05 PM PDT 24 |
Mar 31 01:55:06 PM PDT 24 |
56111403 ps |
| T549 |
/workspace/coverage/default/40.pwrmgr_reset.3122181063 |
|
|
Mar 31 01:55:58 PM PDT 24 |
Mar 31 01:55:59 PM PDT 24 |
42052361 ps |
| T550 |
/workspace/coverage/default/8.pwrmgr_escalation_timeout.1865886692 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:42 PM PDT 24 |
311694401 ps |
| T551 |
/workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1382473237 |
|
|
Mar 31 01:56:08 PM PDT 24 |
Mar 31 01:56:10 PM PDT 24 |
1066268640 ps |
| T552 |
/workspace/coverage/default/24.pwrmgr_escalation_timeout.826856332 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:55 PM PDT 24 |
569656421 ps |
| T553 |
/workspace/coverage/default/22.pwrmgr_stress_all_with_rand_reset.1184907808 |
|
|
Mar 31 01:54:47 PM PDT 24 |
Mar 31 01:55:16 PM PDT 24 |
7652118892 ps |
| T554 |
/workspace/coverage/default/27.pwrmgr_aborted_low_power.640900153 |
|
|
Mar 31 01:55:04 PM PDT 24 |
Mar 31 01:55:05 PM PDT 24 |
46063483 ps |
| T555 |
/workspace/coverage/default/17.pwrmgr_wakeup.3160041502 |
|
|
Mar 31 01:54:24 PM PDT 24 |
Mar 31 01:54:25 PM PDT 24 |
139208275 ps |
| T556 |
/workspace/coverage/default/23.pwrmgr_reset_invalid.866432316 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:55 PM PDT 24 |
116505740 ps |
| T557 |
/workspace/coverage/default/43.pwrmgr_stress_all_with_rand_reset.4133162508 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:23 PM PDT 24 |
17367942376 ps |
| T558 |
/workspace/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2281086177 |
|
|
Mar 31 01:56:07 PM PDT 24 |
Mar 31 01:56:09 PM PDT 24 |
2006345730 ps |
| T559 |
/workspace/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.1435152655 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:35 PM PDT 24 |
51358035 ps |
| T560 |
/workspace/coverage/default/29.pwrmgr_lowpower_wakeup_race.369033823 |
|
|
Mar 31 01:55:13 PM PDT 24 |
Mar 31 01:55:14 PM PDT 24 |
30253102 ps |
| T561 |
/workspace/coverage/default/21.pwrmgr_stress_all.3690448767 |
|
|
Mar 31 01:54:46 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
3308418155 ps |