T562 |
/workspace/coverage/default/23.pwrmgr_aborted_low_power.2488832180 |
|
|
Mar 31 01:54:48 PM PDT 24 |
Mar 31 01:54:49 PM PDT 24 |
45514209 ps |
T563 |
/workspace/coverage/default/27.pwrmgr_disable_rom_integrity_check.1399283505 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:09 PM PDT 24 |
60027137 ps |
T564 |
/workspace/coverage/default/40.pwrmgr_stress_all_with_rand_reset.764620124 |
|
|
Mar 31 01:55:58 PM PDT 24 |
Mar 31 01:56:05 PM PDT 24 |
9951167488 ps |
T565 |
/workspace/coverage/default/23.pwrmgr_stress_all.3822555576 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:58 PM PDT 24 |
1131282659 ps |
T566 |
/workspace/coverage/default/35.pwrmgr_lowpower_invalid.3631663881 |
|
|
Mar 31 01:55:45 PM PDT 24 |
Mar 31 01:55:46 PM PDT 24 |
44798671 ps |
T567 |
/workspace/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.520569760 |
|
|
Mar 31 01:54:10 PM PDT 24 |
Mar 31 01:54:11 PM PDT 24 |
31120327 ps |
T568 |
/workspace/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.750688826 |
|
|
Mar 31 01:53:39 PM PDT 24 |
Mar 31 01:53:40 PM PDT 24 |
128529148 ps |
T569 |
/workspace/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.148354191 |
|
|
Mar 31 01:55:52 PM PDT 24 |
Mar 31 01:55:53 PM PDT 24 |
92602916 ps |
T570 |
/workspace/coverage/default/49.pwrmgr_lowpower_invalid.1780850106 |
|
|
Mar 31 01:56:34 PM PDT 24 |
Mar 31 01:56:34 PM PDT 24 |
47423747 ps |
T571 |
/workspace/coverage/default/31.pwrmgr_glitch.3206659471 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
74663182 ps |
T572 |
/workspace/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.2678399931 |
|
|
Mar 31 01:56:08 PM PDT 24 |
Mar 31 01:56:09 PM PDT 24 |
175988063 ps |
T573 |
/workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.800707746 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
255835278 ps |
T574 |
/workspace/coverage/default/18.pwrmgr_smoke.2461606276 |
|
|
Mar 31 01:54:29 PM PDT 24 |
Mar 31 01:54:30 PM PDT 24 |
60202635 ps |
T575 |
/workspace/coverage/default/37.pwrmgr_lowpower_wakeup_race.1807693486 |
|
|
Mar 31 01:55:46 PM PDT 24 |
Mar 31 01:55:47 PM PDT 24 |
148639892 ps |
T576 |
/workspace/coverage/default/26.pwrmgr_disable_rom_integrity_check.4004947164 |
|
|
Mar 31 01:55:01 PM PDT 24 |
Mar 31 01:55:02 PM PDT 24 |
51106960 ps |
T577 |
/workspace/coverage/default/48.pwrmgr_escalation_timeout.2264126286 |
|
|
Mar 31 01:56:34 PM PDT 24 |
Mar 31 01:56:35 PM PDT 24 |
312710743 ps |
T578 |
/workspace/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.3663128027 |
|
|
Mar 31 01:55:57 PM PDT 24 |
Mar 31 01:55:58 PM PDT 24 |
37242732 ps |
T579 |
/workspace/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1695619562 |
|
|
Mar 31 01:55:40 PM PDT 24 |
Mar 31 01:55:43 PM PDT 24 |
941855308 ps |
T580 |
/workspace/coverage/default/18.pwrmgr_glitch.2211019633 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
120960577 ps |
T581 |
/workspace/coverage/default/24.pwrmgr_disable_rom_integrity_check.3006877261 |
|
|
Mar 31 01:54:53 PM PDT 24 |
Mar 31 01:54:54 PM PDT 24 |
80684249 ps |
T582 |
/workspace/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.442791600 |
|
|
Mar 31 01:54:29 PM PDT 24 |
Mar 31 01:54:30 PM PDT 24 |
30963801 ps |
T583 |
/workspace/coverage/default/2.pwrmgr_reset.3267700612 |
|
|
Mar 31 01:53:08 PM PDT 24 |
Mar 31 01:53:10 PM PDT 24 |
43164987 ps |
T142 |
/workspace/coverage/default/38.pwrmgr_stress_all_with_rand_reset.3405748384 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:56:15 PM PDT 24 |
10432555236 ps |
T584 |
/workspace/coverage/default/44.pwrmgr_escalation_timeout.896131908 |
|
|
Mar 31 01:56:11 PM PDT 24 |
Mar 31 01:56:12 PM PDT 24 |
701658082 ps |
T585 |
/workspace/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.1148850105 |
|
|
Mar 31 01:55:38 PM PDT 24 |
Mar 31 01:55:40 PM PDT 24 |
274353814 ps |
T586 |
/workspace/coverage/default/15.pwrmgr_stress_all.4087926877 |
|
|
Mar 31 01:54:22 PM PDT 24 |
Mar 31 01:54:25 PM PDT 24 |
787187287 ps |
T587 |
/workspace/coverage/default/1.pwrmgr_smoke.1239783489 |
|
|
Mar 31 01:53:02 PM PDT 24 |
Mar 31 01:53:04 PM PDT 24 |
43605519 ps |
T588 |
/workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1316650513 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:35 PM PDT 24 |
862156317 ps |
T589 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2649070837 |
|
|
Mar 31 01:56:10 PM PDT 24 |
Mar 31 01:56:12 PM PDT 24 |
1185014050 ps |
T590 |
/workspace/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.201471863 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:23 PM PDT 24 |
344615545 ps |
T591 |
/workspace/coverage/default/27.pwrmgr_wakeup.1810866755 |
|
|
Mar 31 01:55:05 PM PDT 24 |
Mar 31 01:55:06 PM PDT 24 |
228637789 ps |
T592 |
/workspace/coverage/default/5.pwrmgr_esc_clk_rst_malfunc.2538199098 |
|
|
Mar 31 01:53:31 PM PDT 24 |
Mar 31 01:53:32 PM PDT 24 |
28852958 ps |
T593 |
/workspace/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1925361838 |
|
|
Mar 31 01:55:22 PM PDT 24 |
Mar 31 01:55:24 PM PDT 24 |
758310832 ps |
T594 |
/workspace/coverage/default/20.pwrmgr_wakeup.2382397527 |
|
|
Mar 31 01:54:37 PM PDT 24 |
Mar 31 01:54:38 PM PDT 24 |
213289994 ps |
T595 |
/workspace/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.3906805593 |
|
|
Mar 31 01:54:13 PM PDT 24 |
Mar 31 01:54:14 PM PDT 24 |
384689898 ps |
T596 |
/workspace/coverage/default/30.pwrmgr_reset_invalid.4073531029 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
156741916 ps |
T597 |
/workspace/coverage/default/45.pwrmgr_escalation_timeout.864592212 |
|
|
Mar 31 01:56:12 PM PDT 24 |
Mar 31 01:56:13 PM PDT 24 |
636624652 ps |
T598 |
/workspace/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2275934954 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:25 PM PDT 24 |
855161954 ps |
T599 |
/workspace/coverage/default/13.pwrmgr_lowpower_invalid.4293480089 |
|
|
Mar 31 01:54:08 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
261467428 ps |
T28 |
/workspace/coverage/default/0.pwrmgr_sec_cm.3170655978 |
|
|
Mar 31 01:53:06 PM PDT 24 |
Mar 31 01:53:07 PM PDT 24 |
374762559 ps |
T600 |
/workspace/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3212926968 |
|
|
Mar 31 01:55:35 PM PDT 24 |
Mar 31 01:55:36 PM PDT 24 |
39311702 ps |
T601 |
/workspace/coverage/default/0.pwrmgr_escalation_timeout.765010383 |
|
|
Mar 31 01:53:02 PM PDT 24 |
Mar 31 01:53:04 PM PDT 24 |
564790741 ps |
T602 |
/workspace/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.3192221403 |
|
|
Mar 31 01:54:13 PM PDT 24 |
Mar 31 01:54:14 PM PDT 24 |
32861941 ps |
T603 |
/workspace/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4073171427 |
|
|
Mar 31 01:55:19 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
723802202 ps |
T604 |
/workspace/coverage/default/48.pwrmgr_global_esc.4070360912 |
|
|
Mar 31 01:56:30 PM PDT 24 |
Mar 31 01:56:31 PM PDT 24 |
33315637 ps |
T605 |
/workspace/coverage/default/4.pwrmgr_reset_invalid.534770875 |
|
|
Mar 31 01:53:31 PM PDT 24 |
Mar 31 01:53:32 PM PDT 24 |
100415394 ps |
T606 |
/workspace/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4268009846 |
|
|
Mar 31 01:56:07 PM PDT 24 |
Mar 31 01:56:10 PM PDT 24 |
878075499 ps |
T607 |
/workspace/coverage/default/26.pwrmgr_wakeup.2562491965 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
365426458 ps |
T608 |
/workspace/coverage/default/28.pwrmgr_reset_invalid.2897287495 |
|
|
Mar 31 01:55:14 PM PDT 24 |
Mar 31 01:55:14 PM PDT 24 |
177598451 ps |
T609 |
/workspace/coverage/default/31.pwrmgr_reset_invalid.3283331571 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
100217572 ps |
T610 |
/workspace/coverage/default/26.pwrmgr_aborted_low_power.4083137220 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:56 PM PDT 24 |
35636439 ps |
T611 |
/workspace/coverage/default/48.pwrmgr_aborted_low_power.24401709 |
|
|
Mar 31 01:56:24 PM PDT 24 |
Mar 31 01:56:25 PM PDT 24 |
34754647 ps |
T612 |
/workspace/coverage/default/26.pwrmgr_lowpower_invalid.856983094 |
|
|
Mar 31 01:55:02 PM PDT 24 |
Mar 31 01:55:03 PM PDT 24 |
165403503 ps |
T613 |
/workspace/coverage/default/33.pwrmgr_escalation_timeout.356569764 |
|
|
Mar 31 01:55:33 PM PDT 24 |
Mar 31 01:55:34 PM PDT 24 |
162911058 ps |
T614 |
/workspace/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.4173791266 |
|
|
Mar 31 01:55:28 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
87386116 ps |
T615 |
/workspace/coverage/default/39.pwrmgr_lowpower_wakeup_race.956525068 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:55:54 PM PDT 24 |
306154341 ps |
T616 |
/workspace/coverage/default/6.pwrmgr_global_esc.2135221696 |
|
|
Mar 31 01:53:32 PM PDT 24 |
Mar 31 01:53:33 PM PDT 24 |
31302305 ps |
T617 |
/workspace/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.2138574229 |
|
|
Mar 31 01:54:42 PM PDT 24 |
Mar 31 01:54:43 PM PDT 24 |
149528464 ps |
T618 |
/workspace/coverage/default/34.pwrmgr_aborted_low_power.545687486 |
|
|
Mar 31 01:55:30 PM PDT 24 |
Mar 31 01:55:31 PM PDT 24 |
33489775 ps |
T619 |
/workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4073408443 |
|
|
Mar 31 01:52:57 PM PDT 24 |
Mar 31 01:53:00 PM PDT 24 |
956399524 ps |
T620 |
/workspace/coverage/default/22.pwrmgr_lowpower_wakeup_race.2369571519 |
|
|
Mar 31 01:54:44 PM PDT 24 |
Mar 31 01:54:45 PM PDT 24 |
134132922 ps |
T621 |
/workspace/coverage/default/31.pwrmgr_lowpower_wakeup_race.1921758049 |
|
|
Mar 31 01:55:19 PM PDT 24 |
Mar 31 01:55:20 PM PDT 24 |
514823802 ps |
T622 |
/workspace/coverage/default/35.pwrmgr_disable_rom_integrity_check.1069973758 |
|
|
Mar 31 01:55:38 PM PDT 24 |
Mar 31 01:55:39 PM PDT 24 |
66925426 ps |
T623 |
/workspace/coverage/default/28.pwrmgr_aborted_low_power.1987340802 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:09 PM PDT 24 |
45968297 ps |
T624 |
/workspace/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.4234300300 |
|
|
Mar 31 01:53:13 PM PDT 24 |
Mar 31 01:53:13 PM PDT 24 |
30311855 ps |
T29 |
/workspace/coverage/default/1.pwrmgr_sec_cm.4056184036 |
|
|
Mar 31 01:53:08 PM PDT 24 |
Mar 31 01:53:11 PM PDT 24 |
1178434542 ps |
T625 |
/workspace/coverage/default/32.pwrmgr_global_esc.243515098 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:28 PM PDT 24 |
79289498 ps |
T626 |
/workspace/coverage/default/20.pwrmgr_wakeup_reset.3037737244 |
|
|
Mar 31 01:54:55 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
242631874 ps |
T627 |
/workspace/coverage/default/38.pwrmgr_glitch.1240034138 |
|
|
Mar 31 01:55:50 PM PDT 24 |
Mar 31 01:55:51 PM PDT 24 |
63925235 ps |
T628 |
/workspace/coverage/default/9.pwrmgr_reset.3382585672 |
|
|
Mar 31 01:53:42 PM PDT 24 |
Mar 31 01:53:43 PM PDT 24 |
145865903 ps |
T629 |
/workspace/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3269984373 |
|
|
Mar 31 01:54:50 PM PDT 24 |
Mar 31 01:54:53 PM PDT 24 |
827392282 ps |
T630 |
/workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3192454172 |
|
|
Mar 31 01:55:41 PM PDT 24 |
Mar 31 01:55:43 PM PDT 24 |
801518597 ps |
T631 |
/workspace/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3953424782 |
|
|
Mar 31 01:54:21 PM PDT 24 |
Mar 31 01:54:25 PM PDT 24 |
813177131 ps |
T632 |
/workspace/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2155182809 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:11 PM PDT 24 |
1007097409 ps |
T633 |
/workspace/coverage/default/27.pwrmgr_smoke.3852976039 |
|
|
Mar 31 01:55:05 PM PDT 24 |
Mar 31 01:55:06 PM PDT 24 |
44625499 ps |
T634 |
/workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.3735557976 |
|
|
Mar 31 01:53:52 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
63249343 ps |
T635 |
/workspace/coverage/default/10.pwrmgr_aborted_low_power.519554469 |
|
|
Mar 31 01:53:53 PM PDT 24 |
Mar 31 01:53:54 PM PDT 24 |
25008545 ps |
T636 |
/workspace/coverage/default/2.pwrmgr_lowpower_invalid.3590458783 |
|
|
Mar 31 01:53:13 PM PDT 24 |
Mar 31 01:53:14 PM PDT 24 |
53749428 ps |
T637 |
/workspace/coverage/default/26.pwrmgr_stress_all_with_rand_reset.109513817 |
|
|
Mar 31 01:55:03 PM PDT 24 |
Mar 31 01:55:17 PM PDT 24 |
11206572979 ps |
T638 |
/workspace/coverage/default/31.pwrmgr_wakeup_reset.2143933594 |
|
|
Mar 31 01:55:22 PM PDT 24 |
Mar 31 01:55:23 PM PDT 24 |
242343208 ps |
T639 |
/workspace/coverage/default/49.pwrmgr_global_esc.2954643239 |
|
|
Mar 31 01:56:39 PM PDT 24 |
Mar 31 01:56:39 PM PDT 24 |
76156059 ps |
T640 |
/workspace/coverage/default/27.pwrmgr_global_esc.4112295086 |
|
|
Mar 31 01:55:06 PM PDT 24 |
Mar 31 01:55:07 PM PDT 24 |
110712604 ps |
T641 |
/workspace/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.3418939607 |
|
|
Mar 31 01:55:35 PM PDT 24 |
Mar 31 01:55:36 PM PDT 24 |
65783932 ps |
T642 |
/workspace/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.4066872576 |
|
|
Mar 31 01:55:43 PM PDT 24 |
Mar 31 01:55:45 PM PDT 24 |
54622627 ps |
T643 |
/workspace/coverage/default/29.pwrmgr_glitch.3158497560 |
|
|
Mar 31 01:55:14 PM PDT 24 |
Mar 31 01:55:15 PM PDT 24 |
62533318 ps |
T644 |
/workspace/coverage/default/49.pwrmgr_escalation_timeout.2861326197 |
|
|
Mar 31 01:56:39 PM PDT 24 |
Mar 31 01:56:40 PM PDT 24 |
689894445 ps |
T645 |
/workspace/coverage/default/13.pwrmgr_glitch.1307779936 |
|
|
Mar 31 01:54:05 PM PDT 24 |
Mar 31 01:54:06 PM PDT 24 |
32893368 ps |
T646 |
/workspace/coverage/default/46.pwrmgr_wakeup_reset.1139948909 |
|
|
Mar 31 01:56:17 PM PDT 24 |
Mar 31 01:56:18 PM PDT 24 |
421614076 ps |
T647 |
/workspace/coverage/default/20.pwrmgr_reset_invalid.3048815743 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:39 PM PDT 24 |
114328183 ps |
T648 |
/workspace/coverage/default/18.pwrmgr_stress_all.456834827 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:36 PM PDT 24 |
1698859694 ps |
T649 |
/workspace/coverage/default/21.pwrmgr_global_esc.3600483514 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
46229364 ps |
T650 |
/workspace/coverage/default/13.pwrmgr_global_esc.3826149021 |
|
|
Mar 31 01:54:05 PM PDT 24 |
Mar 31 01:54:06 PM PDT 24 |
243314854 ps |
T651 |
/workspace/coverage/default/12.pwrmgr_reset_invalid.3053521578 |
|
|
Mar 31 01:54:00 PM PDT 24 |
Mar 31 01:54:01 PM PDT 24 |
164380218 ps |
T652 |
/workspace/coverage/default/26.pwrmgr_lowpower_wakeup_race.180503838 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:55 PM PDT 24 |
412145776 ps |
T653 |
/workspace/coverage/default/15.pwrmgr_wakeup_reset.4003052520 |
|
|
Mar 31 01:54:16 PM PDT 24 |
Mar 31 01:54:18 PM PDT 24 |
275344269 ps |
T654 |
/workspace/coverage/default/22.pwrmgr_reset.1930634906 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
110142676 ps |
T655 |
/workspace/coverage/default/31.pwrmgr_lowpower_invalid.3794563748 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
44892462 ps |
T656 |
/workspace/coverage/default/37.pwrmgr_disable_rom_integrity_check.4207631230 |
|
|
Mar 31 01:55:52 PM PDT 24 |
Mar 31 01:55:53 PM PDT 24 |
61502066 ps |
T657 |
/workspace/coverage/default/42.pwrmgr_disable_rom_integrity_check.3568073776 |
|
|
Mar 31 01:56:04 PM PDT 24 |
Mar 31 01:56:04 PM PDT 24 |
84524031 ps |
T658 |
/workspace/coverage/default/37.pwrmgr_reset.29402005 |
|
|
Mar 31 01:55:46 PM PDT 24 |
Mar 31 01:55:47 PM PDT 24 |
43181100 ps |
T659 |
/workspace/coverage/default/7.pwrmgr_smoke.961495205 |
|
|
Mar 31 01:53:34 PM PDT 24 |
Mar 31 01:53:35 PM PDT 24 |
41286079 ps |
T660 |
/workspace/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.3471158242 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
29372747 ps |
T661 |
/workspace/coverage/default/40.pwrmgr_wakeup_reset.63224850 |
|
|
Mar 31 01:56:03 PM PDT 24 |
Mar 31 01:56:04 PM PDT 24 |
669801585 ps |
T662 |
/workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.2605230206 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:55:55 PM PDT 24 |
318919771 ps |
T663 |
/workspace/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3498817013 |
|
|
Mar 31 01:55:09 PM PDT 24 |
Mar 31 01:55:12 PM PDT 24 |
746992767 ps |
T664 |
/workspace/coverage/default/9.pwrmgr_global_esc.3342358591 |
|
|
Mar 31 01:53:51 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
37948431 ps |
T665 |
/workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.217258213 |
|
|
Mar 31 01:55:23 PM PDT 24 |
Mar 31 01:55:24 PM PDT 24 |
126650433 ps |
T666 |
/workspace/coverage/default/3.pwrmgr_lowpower_wakeup_race.2126684282 |
|
|
Mar 31 01:53:17 PM PDT 24 |
Mar 31 01:53:18 PM PDT 24 |
269463187 ps |
T96 |
/workspace/coverage/default/17.pwrmgr_stress_all_with_rand_reset.1866205782 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:34 PM PDT 24 |
4626111332 ps |
T667 |
/workspace/coverage/default/2.pwrmgr_aborted_low_power.3771415052 |
|
|
Mar 31 01:53:14 PM PDT 24 |
Mar 31 01:53:15 PM PDT 24 |
45329508 ps |
T668 |
/workspace/coverage/default/47.pwrmgr_lowpower_wakeup_race.4022716893 |
|
|
Mar 31 01:56:25 PM PDT 24 |
Mar 31 01:56:26 PM PDT 24 |
120420522 ps |
T669 |
/workspace/coverage/default/20.pwrmgr_reset.1829037065 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:54:41 PM PDT 24 |
46158131 ps |
T670 |
/workspace/coverage/default/7.pwrmgr_wakeup_reset.302201815 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:34 PM PDT 24 |
349942390 ps |
T671 |
/workspace/coverage/default/26.pwrmgr_escalation_timeout.1323172040 |
|
|
Mar 31 01:55:04 PM PDT 24 |
Mar 31 01:55:05 PM PDT 24 |
162099320 ps |
T672 |
/workspace/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.549482684 |
|
|
Mar 31 01:56:00 PM PDT 24 |
Mar 31 01:56:03 PM PDT 24 |
746196882 ps |
T673 |
/workspace/coverage/default/19.pwrmgr_stress_all.1331626976 |
|
|
Mar 31 01:54:41 PM PDT 24 |
Mar 31 01:54:44 PM PDT 24 |
1293033449 ps |
T674 |
/workspace/coverage/default/8.pwrmgr_disable_rom_integrity_check.2190228330 |
|
|
Mar 31 01:53:44 PM PDT 24 |
Mar 31 01:53:45 PM PDT 24 |
61137510 ps |
T675 |
/workspace/coverage/default/7.pwrmgr_reset_invalid.3551336656 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:42 PM PDT 24 |
159560639 ps |
T676 |
/workspace/coverage/default/38.pwrmgr_lowpower_invalid.617639948 |
|
|
Mar 31 01:55:53 PM PDT 24 |
Mar 31 01:55:54 PM PDT 24 |
43957784 ps |
T677 |
/workspace/coverage/default/6.pwrmgr_glitch.1317040904 |
|
|
Mar 31 01:53:34 PM PDT 24 |
Mar 31 01:53:34 PM PDT 24 |
38222548 ps |
T678 |
/workspace/coverage/default/12.pwrmgr_disable_rom_integrity_check.1455973437 |
|
|
Mar 31 01:54:06 PM PDT 24 |
Mar 31 01:54:07 PM PDT 24 |
44154262 ps |
T679 |
/workspace/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.2635099932 |
|
|
Mar 31 01:56:20 PM PDT 24 |
Mar 31 01:56:21 PM PDT 24 |
134941337 ps |
T680 |
/workspace/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.33308091 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:36 PM PDT 24 |
2215030674 ps |
T681 |
/workspace/coverage/default/34.pwrmgr_smoke.2195502967 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:34 PM PDT 24 |
61150228 ps |
T682 |
/workspace/coverage/default/4.pwrmgr_lowpower_invalid.1270178097 |
|
|
Mar 31 01:53:26 PM PDT 24 |
Mar 31 01:53:27 PM PDT 24 |
116773165 ps |
T683 |
/workspace/coverage/default/5.pwrmgr_lowpower_wakeup_race.713027917 |
|
|
Mar 31 01:53:26 PM PDT 24 |
Mar 31 01:53:27 PM PDT 24 |
307940894 ps |
T684 |
/workspace/coverage/default/1.pwrmgr_wakeup_reset.2531174124 |
|
|
Mar 31 01:53:02 PM PDT 24 |
Mar 31 01:53:04 PM PDT 24 |
122449740 ps |
T685 |
/workspace/coverage/default/34.pwrmgr_stress_all_with_rand_reset.73335525 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:57 PM PDT 24 |
14352294661 ps |
T686 |
/workspace/coverage/default/26.pwrmgr_smoke.2073059701 |
|
|
Mar 31 01:54:59 PM PDT 24 |
Mar 31 01:55:00 PM PDT 24 |
67481611 ps |
T687 |
/workspace/coverage/default/37.pwrmgr_wakeup_reset.825942073 |
|
|
Mar 31 01:55:45 PM PDT 24 |
Mar 31 01:55:46 PM PDT 24 |
194755235 ps |
T688 |
/workspace/coverage/default/1.pwrmgr_global_esc.2578711370 |
|
|
Mar 31 01:53:07 PM PDT 24 |
Mar 31 01:53:08 PM PDT 24 |
40859218 ps |
T689 |
/workspace/coverage/default/36.pwrmgr_lowpower_wakeup_race.3715052962 |
|
|
Mar 31 01:55:39 PM PDT 24 |
Mar 31 01:55:40 PM PDT 24 |
69788109 ps |
T690 |
/workspace/coverage/default/9.pwrmgr_reset_invalid.3720464468 |
|
|
Mar 31 01:53:45 PM PDT 24 |
Mar 31 01:53:46 PM PDT 24 |
251914102 ps |
T691 |
/workspace/coverage/default/19.pwrmgr_reset.1680550439 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:39 PM PDT 24 |
82965177 ps |
T692 |
/workspace/coverage/default/36.pwrmgr_smoke.330967573 |
|
|
Mar 31 01:55:41 PM PDT 24 |
Mar 31 01:55:42 PM PDT 24 |
33334939 ps |
T693 |
/workspace/coverage/default/29.pwrmgr_reset_invalid.2031091629 |
|
|
Mar 31 01:55:18 PM PDT 24 |
Mar 31 01:55:19 PM PDT 24 |
111609589 ps |
T694 |
/workspace/coverage/default/6.pwrmgr_smoke.2467088337 |
|
|
Mar 31 01:53:32 PM PDT 24 |
Mar 31 01:53:33 PM PDT 24 |
30677479 ps |
T695 |
/workspace/coverage/default/49.pwrmgr_glitch.2960492132 |
|
|
Mar 31 01:56:36 PM PDT 24 |
Mar 31 01:56:37 PM PDT 24 |
64813072 ps |
T696 |
/workspace/coverage/default/25.pwrmgr_smoke.1618823770 |
|
|
Mar 31 01:54:57 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
38094296 ps |
T697 |
/workspace/coverage/default/44.pwrmgr_stress_all.765609733 |
|
|
Mar 31 01:56:10 PM PDT 24 |
Mar 31 01:56:15 PM PDT 24 |
3989064043 ps |
T698 |
/workspace/coverage/default/32.pwrmgr_reset.3194219181 |
|
|
Mar 31 01:55:19 PM PDT 24 |
Mar 31 01:55:20 PM PDT 24 |
70642798 ps |
T699 |
/workspace/coverage/default/19.pwrmgr_smoke.4206426568 |
|
|
Mar 31 01:54:36 PM PDT 24 |
Mar 31 01:54:37 PM PDT 24 |
55482760 ps |
T700 |
/workspace/coverage/default/49.pwrmgr_wakeup_reset.1078002460 |
|
|
Mar 31 01:56:34 PM PDT 24 |
Mar 31 01:56:35 PM PDT 24 |
305335558 ps |
T701 |
/workspace/coverage/default/26.pwrmgr_stress_all.4042322481 |
|
|
Mar 31 01:55:03 PM PDT 24 |
Mar 31 01:55:07 PM PDT 24 |
2903172210 ps |
T702 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.3621644645 |
|
|
Mar 31 01:56:10 PM PDT 24 |
Mar 31 01:56:11 PM PDT 24 |
72779744 ps |
T703 |
/workspace/coverage/default/48.pwrmgr_lowpower_invalid.3620349246 |
|
|
Mar 31 01:56:34 PM PDT 24 |
Mar 31 01:56:34 PM PDT 24 |
67655115 ps |
T704 |
/workspace/coverage/default/4.pwrmgr_escalation_timeout.2523359025 |
|
|
Mar 31 01:53:24 PM PDT 24 |
Mar 31 01:53:25 PM PDT 24 |
1161349859 ps |
T705 |
/workspace/coverage/default/8.pwrmgr_wakeup_reset.591107536 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
90531102 ps |
T706 |
/workspace/coverage/default/44.pwrmgr_glitch.480046440 |
|
|
Mar 31 01:56:10 PM PDT 24 |
Mar 31 01:56:11 PM PDT 24 |
52848128 ps |
T707 |
/workspace/coverage/default/5.pwrmgr_disable_rom_integrity_check.1125655519 |
|
|
Mar 31 01:53:31 PM PDT 24 |
Mar 31 01:53:31 PM PDT 24 |
203786029 ps |
T708 |
/workspace/coverage/default/1.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3801874050 |
|
|
Mar 31 01:53:00 PM PDT 24 |
Mar 31 01:53:03 PM PDT 24 |
1227794839 ps |
T143 |
/workspace/coverage/default/11.pwrmgr_stress_all_with_rand_reset.25300695 |
|
|
Mar 31 01:54:01 PM PDT 24 |
Mar 31 01:54:18 PM PDT 24 |
7771440506 ps |
T709 |
/workspace/coverage/default/21.pwrmgr_disable_rom_integrity_check.3133973188 |
|
|
Mar 31 01:54:48 PM PDT 24 |
Mar 31 01:54:49 PM PDT 24 |
65850550 ps |
T710 |
/workspace/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.486851546 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:35 PM PDT 24 |
210834813 ps |
T711 |
/workspace/coverage/default/5.pwrmgr_aborted_low_power.3059555720 |
|
|
Mar 31 01:53:26 PM PDT 24 |
Mar 31 01:53:27 PM PDT 24 |
48707304 ps |
T712 |
/workspace/coverage/default/17.pwrmgr_lowpower_invalid.696877198 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
46301839 ps |
T713 |
/workspace/coverage/default/44.pwrmgr_wakeup.1245625193 |
|
|
Mar 31 01:56:14 PM PDT 24 |
Mar 31 01:56:16 PM PDT 24 |
262246496 ps |
T714 |
/workspace/coverage/default/30.pwrmgr_disable_rom_integrity_check.3125431962 |
|
|
Mar 31 01:55:20 PM PDT 24 |
Mar 31 01:55:21 PM PDT 24 |
122739906 ps |
T144 |
/workspace/coverage/default/14.pwrmgr_stress_all_with_rand_reset.2497055211 |
|
|
Mar 31 01:54:18 PM PDT 24 |
Mar 31 01:54:33 PM PDT 24 |
34245844412 ps |
T715 |
/workspace/coverage/default/16.pwrmgr_reset_invalid.491899872 |
|
|
Mar 31 01:54:21 PM PDT 24 |
Mar 31 01:54:22 PM PDT 24 |
164513852 ps |
T716 |
/workspace/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3807798360 |
|
|
Mar 31 01:53:03 PM PDT 24 |
Mar 31 01:53:07 PM PDT 24 |
933826857 ps |
T717 |
/workspace/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1595092951 |
|
|
Mar 31 01:56:27 PM PDT 24 |
Mar 31 01:56:29 PM PDT 24 |
1273450685 ps |
T718 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2496253710 |
|
|
Mar 31 01:53:46 PM PDT 24 |
Mar 31 01:53:48 PM PDT 24 |
1959040984 ps |
T719 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.2089075314 |
|
|
Mar 31 01:54:48 PM PDT 24 |
Mar 31 01:54:49 PM PDT 24 |
192244172 ps |
T720 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.555432116 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:40 PM PDT 24 |
1146274662 ps |
T721 |
/workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1644054723 |
|
|
Mar 31 01:53:24 PM PDT 24 |
Mar 31 01:53:27 PM PDT 24 |
778774265 ps |
T722 |
/workspace/coverage/default/25.pwrmgr_wakeup.583574540 |
|
|
Mar 31 01:54:56 PM PDT 24 |
Mar 31 01:54:57 PM PDT 24 |
34974930 ps |
T723 |
/workspace/coverage/default/3.pwrmgr_glitch.1918574086 |
|
|
Mar 31 01:53:23 PM PDT 24 |
Mar 31 01:53:23 PM PDT 24 |
60654160 ps |
T61 |
/workspace/coverage/default/20.pwrmgr_stress_all_with_rand_reset.2305289570 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:55:27 PM PDT 24 |
11012603012 ps |
T724 |
/workspace/coverage/default/25.pwrmgr_reset_invalid.3565137056 |
|
|
Mar 31 01:54:59 PM PDT 24 |
Mar 31 01:55:00 PM PDT 24 |
165141868 ps |
T725 |
/workspace/coverage/default/36.pwrmgr_aborted_low_power.3096093625 |
|
|
Mar 31 01:55:40 PM PDT 24 |
Mar 31 01:55:41 PM PDT 24 |
92920774 ps |
T726 |
/workspace/coverage/default/10.pwrmgr_reset.4260352533 |
|
|
Mar 31 01:53:51 PM PDT 24 |
Mar 31 01:53:52 PM PDT 24 |
50487202 ps |
T727 |
/workspace/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2697700559 |
|
|
Mar 31 01:54:05 PM PDT 24 |
Mar 31 01:54:09 PM PDT 24 |
801945036 ps |
T728 |
/workspace/coverage/default/7.pwrmgr_wakeup.341722545 |
|
|
Mar 31 01:53:33 PM PDT 24 |
Mar 31 01:53:34 PM PDT 24 |
526840125 ps |
T729 |
/workspace/coverage/default/44.pwrmgr_reset_invalid.455188709 |
|
|
Mar 31 01:56:12 PM PDT 24 |
Mar 31 01:56:13 PM PDT 24 |
132355440 ps |
T85 |
/workspace/coverage/default/6.pwrmgr_stress_all_with_rand_reset.2249759020 |
|
|
Mar 31 01:53:34 PM PDT 24 |
Mar 31 01:53:54 PM PDT 24 |
12525140183 ps |
T730 |
/workspace/coverage/default/17.pwrmgr_stress_all.2479657252 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:31 PM PDT 24 |
716065377 ps |
T731 |
/workspace/coverage/default/30.pwrmgr_smoke.3103712989 |
|
|
Mar 31 01:55:15 PM PDT 24 |
Mar 31 01:55:16 PM PDT 24 |
68631429 ps |
T732 |
/workspace/coverage/default/26.pwrmgr_wakeup_reset.3674410554 |
|
|
Mar 31 01:54:55 PM PDT 24 |
Mar 31 01:54:56 PM PDT 24 |
150511062 ps |
T733 |
/workspace/coverage/default/24.pwrmgr_reset.409292639 |
|
|
Mar 31 01:54:50 PM PDT 24 |
Mar 31 01:54:51 PM PDT 24 |
61165983 ps |
T734 |
/workspace/coverage/default/5.pwrmgr_reset.2375524072 |
|
|
Mar 31 01:53:28 PM PDT 24 |
Mar 31 01:53:29 PM PDT 24 |
37863725 ps |
T735 |
/workspace/coverage/default/27.pwrmgr_lowpower_invalid.2079346944 |
|
|
Mar 31 01:55:11 PM PDT 24 |
Mar 31 01:55:11 PM PDT 24 |
38718542 ps |
T736 |
/workspace/coverage/default/21.pwrmgr_wakeup_reset.2093000476 |
|
|
Mar 31 01:54:40 PM PDT 24 |
Mar 31 01:54:41 PM PDT 24 |
115269182 ps |
T737 |
/workspace/coverage/default/2.pwrmgr_global_esc.2857057120 |
|
|
Mar 31 01:53:13 PM PDT 24 |
Mar 31 01:53:14 PM PDT 24 |
240109638 ps |
T738 |
/workspace/coverage/default/47.pwrmgr_aborted_low_power.3587587238 |
|
|
Mar 31 01:56:25 PM PDT 24 |
Mar 31 01:56:26 PM PDT 24 |
25775445 ps |
T739 |
/workspace/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3844225645 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:54:41 PM PDT 24 |
823789980 ps |
T740 |
/workspace/coverage/default/31.pwrmgr_smoke.1873353058 |
|
|
Mar 31 01:55:21 PM PDT 24 |
Mar 31 01:55:22 PM PDT 24 |
40486074 ps |
T741 |
/workspace/coverage/default/15.pwrmgr_reset_invalid.2523551443 |
|
|
Mar 31 01:54:12 PM PDT 24 |
Mar 31 01:54:13 PM PDT 24 |
390429028 ps |
T742 |
/workspace/coverage/default/19.pwrmgr_disable_rom_integrity_check.3763178789 |
|
|
Mar 31 01:54:38 PM PDT 24 |
Mar 31 01:54:39 PM PDT 24 |
76897946 ps |
T743 |
/workspace/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3416468250 |
|
|
Mar 31 01:55:56 PM PDT 24 |
Mar 31 01:55:57 PM PDT 24 |
35497689 ps |
T744 |
/workspace/coverage/default/15.pwrmgr_global_esc.3036021156 |
|
|
Mar 31 01:54:12 PM PDT 24 |
Mar 31 01:54:13 PM PDT 24 |
24552714 ps |
T745 |
/workspace/coverage/default/18.pwrmgr_aborted_low_power.380303485 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
38801619 ps |
T746 |
/workspace/coverage/default/42.pwrmgr_aborted_low_power.3087031600 |
|
|
Mar 31 01:56:07 PM PDT 24 |
Mar 31 01:56:08 PM PDT 24 |
43477346 ps |
T747 |
/workspace/coverage/default/20.pwrmgr_disable_rom_integrity_check.4148944965 |
|
|
Mar 31 01:54:48 PM PDT 24 |
Mar 31 01:54:49 PM PDT 24 |
46299780 ps |
T748 |
/workspace/coverage/default/15.pwrmgr_smoke.3380642308 |
|
|
Mar 31 01:54:10 PM PDT 24 |
Mar 31 01:54:11 PM PDT 24 |
39538502 ps |
T749 |
/workspace/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.1423308328 |
|
|
Mar 31 01:54:28 PM PDT 24 |
Mar 31 01:54:29 PM PDT 24 |
41381631 ps |
T750 |
/workspace/coverage/default/0.pwrmgr_stress_all_with_rand_reset.3729994875 |
|
|
Mar 31 01:53:06 PM PDT 24 |
Mar 31 01:53:14 PM PDT 24 |
5655384374 ps |
T751 |
/workspace/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.4219293037 |
|
|
Mar 31 01:54:18 PM PDT 24 |
Mar 31 01:54:19 PM PDT 24 |
74901860 ps |
T752 |
/workspace/coverage/default/41.pwrmgr_lowpower_invalid.255601140 |
|
|
Mar 31 01:56:00 PM PDT 24 |
Mar 31 01:56:01 PM PDT 24 |
102714487 ps |
T753 |
/workspace/coverage/default/30.pwrmgr_glitch.2717762625 |
|
|
Mar 31 01:55:22 PM PDT 24 |
Mar 31 01:55:23 PM PDT 24 |
28220485 ps |
T754 |
/workspace/coverage/default/22.pwrmgr_smoke.1239465595 |
|
|
Mar 31 01:54:45 PM PDT 24 |
Mar 31 01:54:46 PM PDT 24 |
71308215 ps |
T755 |
/workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.637654512 |
|
|
Mar 31 01:56:05 PM PDT 24 |
Mar 31 01:56:08 PM PDT 24 |
836215039 ps |
T756 |
/workspace/coverage/default/2.pwrmgr_escalation_timeout.3858018999 |
|
|
Mar 31 01:53:14 PM PDT 24 |
Mar 31 01:53:15 PM PDT 24 |
850829234 ps |
T757 |
/workspace/coverage/default/42.pwrmgr_stress_all.3658246109 |
|
|
Mar 31 01:56:05 PM PDT 24 |
Mar 31 01:56:06 PM PDT 24 |
94761784 ps |
T758 |
/workspace/coverage/default/45.pwrmgr_smoke.1360898118 |
|
|
Mar 31 01:56:14 PM PDT 24 |
Mar 31 01:56:15 PM PDT 24 |
29858836 ps |
T759 |
/workspace/coverage/default/0.pwrmgr_disable_rom_integrity_check.1518822303 |
|
|
Mar 31 01:52:57 PM PDT 24 |
Mar 31 01:52:58 PM PDT 24 |
80977772 ps |
T760 |
/workspace/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3041628288 |
|
|
Mar 31 01:54:14 PM PDT 24 |
Mar 31 01:54:16 PM PDT 24 |
983981725 ps |
T761 |
/workspace/coverage/default/40.pwrmgr_lowpower_invalid.1968107213 |
|
|
Mar 31 01:56:03 PM PDT 24 |
Mar 31 01:56:04 PM PDT 24 |
53103539 ps |
T762 |
/workspace/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.1749035694 |
|
|
Mar 31 01:53:52 PM PDT 24 |
Mar 31 01:53:53 PM PDT 24 |
408412321 ps |
T763 |
/workspace/coverage/default/13.pwrmgr_disable_rom_integrity_check.3888380898 |
|
|
Mar 31 01:54:06 PM PDT 24 |
Mar 31 01:54:08 PM PDT 24 |
67633182 ps |
T86 |
/workspace/coverage/default/15.pwrmgr_stress_all_with_rand_reset.1369363104 |
|
|
Mar 31 01:54:19 PM PDT 24 |
Mar 31 01:54:31 PM PDT 24 |
11741223692 ps |
T764 |
/workspace/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.803270906 |
|
|
Mar 31 01:55:07 PM PDT 24 |
Mar 31 01:55:07 PM PDT 24 |
39053105 ps |
T765 |
/workspace/coverage/default/3.pwrmgr_disable_rom_integrity_check.2577327863 |
|
|
Mar 31 01:53:20 PM PDT 24 |
Mar 31 01:53:21 PM PDT 24 |
70900902 ps |
T766 |
/workspace/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1847874137 |
|
|
Mar 31 01:55:16 PM PDT 24 |
Mar 31 01:55:17 PM PDT 24 |
38284723 ps |
T767 |
/workspace/coverage/default/43.pwrmgr_stress_all.3477958737 |
|
|
Mar 31 01:56:10 PM PDT 24 |
Mar 31 01:56:15 PM PDT 24 |
2572642316 ps |
T768 |
/workspace/coverage/default/1.pwrmgr_esc_clk_rst_malfunc.2172969361 |
|
|
Mar 31 01:53:08 PM PDT 24 |
Mar 31 01:53:10 PM PDT 24 |
37033385 ps |
T769 |
/workspace/coverage/default/48.pwrmgr_wakeup.1377049222 |
|
|
Mar 31 01:56:24 PM PDT 24 |
Mar 31 01:56:25 PM PDT 24 |
147764068 ps |
T770 |
/workspace/coverage/default/25.pwrmgr_aborted_low_power.623744885 |
|
|
Mar 31 01:54:59 PM PDT 24 |
Mar 31 01:55:00 PM PDT 24 |
141529763 ps |
T771 |
/workspace/coverage/default/47.pwrmgr_smoke.821475835 |
|
|
Mar 31 01:56:26 PM PDT 24 |
Mar 31 01:56:27 PM PDT 24 |
30181568 ps |
T772 |
/workspace/coverage/default/21.pwrmgr_smoke.1232256609 |
|
|
Mar 31 01:54:39 PM PDT 24 |
Mar 31 01:54:40 PM PDT 24 |
169513141 ps |
T773 |
/workspace/coverage/default/13.pwrmgr_wakeup.4237889729 |
|
|
Mar 31 01:54:08 PM PDT 24 |
Mar 31 01:54:10 PM PDT 24 |
152569648 ps |
T774 |
/workspace/coverage/default/13.pwrmgr_stress_all.4116481960 |
|
|
Mar 31 01:54:07 PM PDT 24 |
Mar 31 01:54:10 PM PDT 24 |
1064646647 ps |
T775 |
/workspace/coverage/default/20.pwrmgr_lowpower_wakeup_race.1176795929 |
|
|
Mar 31 01:54:35 PM PDT 24 |
Mar 31 01:54:36 PM PDT 24 |
138603212 ps |
T776 |
/workspace/coverage/default/35.pwrmgr_stress_all.3239873891 |
|
|
Mar 31 01:55:39 PM PDT 24 |
Mar 31 01:55:45 PM PDT 24 |
1388671987 ps |
T777 |
/workspace/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1776045119 |
|
|
Mar 31 01:53:12 PM PDT 24 |
Mar 31 01:53:15 PM PDT 24 |
809091803 ps |
T778 |
/workspace/coverage/default/34.pwrmgr_global_esc.3853598302 |
|
|
Mar 31 01:55:32 PM PDT 24 |
Mar 31 01:55:33 PM PDT 24 |
35800877 ps |
T779 |
/workspace/coverage/default/37.pwrmgr_aborted_low_power.1075852735 |
|
|
Mar 31 01:55:44 PM PDT 24 |
Mar 31 01:55:45 PM PDT 24 |
27315987 ps |
T780 |
/workspace/coverage/default/8.pwrmgr_glitch.3283074746 |
|
|
Mar 31 01:53:41 PM PDT 24 |
Mar 31 01:53:41 PM PDT 24 |
75648884 ps |
T781 |
/workspace/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.2993295563 |
|
|
Mar 31 01:56:23 PM PDT 24 |
Mar 31 01:56:24 PM PDT 24 |
260002210 ps |
T782 |
/workspace/coverage/default/46.pwrmgr_wakeup.3769362640 |
|
|
Mar 31 01:56:20 PM PDT 24 |
Mar 31 01:56:21 PM PDT 24 |
90999556 ps |
T783 |
/workspace/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.2361250411 |
|
|
Mar 31 01:54:54 PM PDT 24 |
Mar 31 01:54:55 PM PDT 24 |
181930197 ps |
T784 |
/workspace/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3368473320 |
|
|
Mar 31 01:56:13 PM PDT 24 |
Mar 31 01:56:14 PM PDT 24 |
177210183 ps |
T785 |
/workspace/coverage/default/40.pwrmgr_lowpower_wakeup_race.2759533225 |
|
|
Mar 31 01:55:59 PM PDT 24 |
Mar 31 01:56:01 PM PDT 24 |
135270272 ps |
T786 |
/workspace/coverage/default/33.pwrmgr_smoke.876241691 |
|
|
Mar 31 01:55:27 PM PDT 24 |
Mar 31 01:55:28 PM PDT 24 |
48798829 ps |
T787 |
/workspace/coverage/default/47.pwrmgr_escalation_timeout.3786654379 |
|
|
Mar 31 01:56:26 PM PDT 24 |
Mar 31 01:56:27 PM PDT 24 |
161216229 ps |
T788 |
/workspace/coverage/default/16.pwrmgr_aborted_low_power.4233179654 |
|
|
Mar 31 01:54:21 PM PDT 24 |
Mar 31 01:54:23 PM PDT 24 |
68479137 ps |
T789 |
/workspace/coverage/default/47.pwrmgr_reset_invalid.4079656303 |
|
|
Mar 31 01:56:26 PM PDT 24 |
Mar 31 01:56:27 PM PDT 24 |
102929993 ps |
T790 |
/workspace/coverage/default/35.pwrmgr_wakeup.1745981793 |
|
|
Mar 31 01:55:30 PM PDT 24 |
Mar 31 01:55:32 PM PDT 24 |
239569958 ps |
T791 |
/workspace/coverage/default/28.pwrmgr_global_esc.479064633 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:08 PM PDT 24 |
35832020 ps |
T792 |
/workspace/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2279817578 |
|
|
Mar 31 01:55:26 PM PDT 24 |
Mar 31 01:55:29 PM PDT 24 |
1050957680 ps |
T793 |
/workspace/coverage/default/18.pwrmgr_escalation_timeout.1159711887 |
|
|
Mar 31 01:54:30 PM PDT 24 |
Mar 31 01:54:31 PM PDT 24 |
170064254 ps |
T153 |
/workspace/coverage/default/27.pwrmgr_stress_all_with_rand_reset.2556475923 |
|
|
Mar 31 01:55:08 PM PDT 24 |
Mar 31 01:55:25 PM PDT 24 |
28227890635 ps |
T794 |
/workspace/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.4223022436 |
|
|
Mar 31 01:53:38 PM PDT 24 |
Mar 31 01:53:39 PM PDT 24 |
30571747 ps |
T145 |
/workspace/coverage/default/39.pwrmgr_stress_all_with_rand_reset.2772952314 |
|
|
Mar 31 01:55:59 PM PDT 24 |
Mar 31 01:56:12 PM PDT 24 |
14617854602 ps |
T795 |
/workspace/coverage/default/45.pwrmgr_global_esc.190236271 |
|
|
Mar 31 01:56:09 PM PDT 24 |
Mar 31 01:56:10 PM PDT 24 |
61534789 ps |
T796 |
/workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.158342348 |
|
|
Mar 31 01:56:11 PM PDT 24 |
Mar 31 01:56:11 PM PDT 24 |
42992501 ps |
T797 |
/workspace/coverage/default/47.pwrmgr_disable_rom_integrity_check.788811216 |
|
|
Mar 31 01:56:30 PM PDT 24 |
Mar 31 01:56:31 PM PDT 24 |
60434909 ps |
T798 |
/workspace/coverage/default/22.pwrmgr_wakeup.1810829634 |
|
|
Mar 31 01:54:44 PM PDT 24 |
Mar 31 01:54:45 PM PDT 24 |
83222459 ps |
T799 |
/workspace/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.607376024 |
|
|
Mar 31 01:54:44 PM PDT 24 |
Mar 31 01:54:48 PM PDT 24 |
860974235 ps |
T800 |
/workspace/coverage/default/34.pwrmgr_wakeup.2172998565 |
|
|
Mar 31 01:55:34 PM PDT 24 |
Mar 31 01:55:35 PM PDT 24 |
119979061 ps |