Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9331 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T9 |
6 |
auto[1] |
11412 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T9 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9903 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T4 |
1 |
auto[1] |
10840 |
1 |
|
|
T9 |
5 |
|
T26 |
3 |
|
T15 |
24 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1175 |
1 |
|
|
T26 |
1 |
|
T36 |
3 |
|
T27 |
10 |
auto[0] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T36 |
1 |
|
T183 |
2 |
|
T27 |
8 |
auto[0] |
auto[1] |
auto[0] |
3656 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T9 |
4 |
auto[0] |
auto[1] |
auto[1] |
3382 |
1 |
|
|
T9 |
2 |
|
T15 |
7 |
|
T41 |
1 |
auto[1] |
auto[0] |
auto[0] |
1219 |
1 |
|
|
T3 |
2 |
|
T26 |
2 |
|
T35 |
1 |
auto[1] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T26 |
2 |
|
T33 |
2 |
|
T35 |
1 |
auto[1] |
auto[1] |
auto[0] |
3853 |
1 |
|
|
T4 |
1 |
|
T9 |
4 |
|
T26 |
1 |
auto[1] |
auto[1] |
auto[1] |
4694 |
1 |
|
|
T9 |
3 |
|
T26 |
1 |
|
T15 |
17 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9349 |
1 |
|
|
T3 |
2 |
|
T9 |
9 |
|
T26 |
1 |
auto[1] |
11394 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9890 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T9 |
3 |
auto[1] |
10853 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T9 |
10 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1210 |
1 |
|
|
T3 |
1 |
|
T33 |
1 |
|
T35 |
1 |
auto[0] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T36 |
2 |
|
T184 |
1 |
|
T183 |
2 |
auto[0] |
auto[1] |
auto[0] |
3608 |
1 |
|
|
T3 |
1 |
|
T9 |
3 |
|
T15 |
12 |
auto[0] |
auto[1] |
auto[1] |
3399 |
1 |
|
|
T9 |
6 |
|
T26 |
1 |
|
T15 |
13 |
auto[1] |
auto[0] |
auto[0] |
1200 |
1 |
|
|
T26 |
2 |
|
T33 |
1 |
|
T35 |
1 |
auto[1] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T3 |
1 |
|
T26 |
3 |
|
T36 |
4 |
auto[1] |
auto[1] |
auto[0] |
3872 |
1 |
|
|
T4 |
1 |
|
T26 |
1 |
|
T15 |
9 |
auto[1] |
auto[1] |
auto[1] |
4706 |
1 |
|
|
T2 |
1 |
|
T9 |
4 |
|
T15 |
16 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9313 |
1 |
|
|
T9 |
8 |
|
T26 |
4 |
|
T15 |
22 |
auto[1] |
11430 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T4 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9819 |
1 |
|
|
T3 |
1 |
|
T9 |
8 |
|
T26 |
3 |
auto[1] |
10924 |
1 |
|
|
T2 |
1 |
|
T3 |
2 |
|
T4 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1178 |
1 |
|
|
T26 |
1 |
|
T36 |
1 |
|
T183 |
3 |
auto[0] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T26 |
2 |
|
T33 |
2 |
|
T35 |
2 |
auto[0] |
auto[1] |
auto[0] |
3619 |
1 |
|
|
T9 |
6 |
|
T26 |
1 |
|
T15 |
14 |
auto[0] |
auto[1] |
auto[1] |
3340 |
1 |
|
|
T9 |
2 |
|
T15 |
8 |
|
T41 |
1 |
auto[1] |
auto[0] |
auto[0] |
1217 |
1 |
|
|
T3 |
1 |
|
T26 |
1 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T3 |
1 |
|
T26 |
1 |
|
T36 |
4 |
auto[1] |
auto[1] |
auto[0] |
3805 |
1 |
|
|
T9 |
2 |
|
T15 |
12 |
|
T37 |
8 |
auto[1] |
auto[1] |
auto[1] |
4821 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9359 |
1 |
|
|
T3 |
1 |
|
T9 |
6 |
|
T26 |
3 |
auto[1] |
11384 |
1 |
|
|
T2 |
1 |
|
T3 |
2 |
|
T4 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9782 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T4 |
1 |
auto[1] |
10961 |
1 |
|
|
T9 |
8 |
|
T26 |
5 |
|
T15 |
27 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1128 |
1 |
|
|
T3 |
1 |
|
T33 |
1 |
|
T36 |
2 |
auto[0] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T26 |
2 |
|
T35 |
1 |
|
T36 |
2 |
auto[0] |
auto[1] |
auto[0] |
3633 |
1 |
|
|
T9 |
1 |
|
T15 |
12 |
|
T41 |
1 |
auto[0] |
auto[1] |
auto[1] |
3402 |
1 |
|
|
T9 |
5 |
|
T26 |
1 |
|
T15 |
13 |
auto[1] |
auto[0] |
auto[0] |
1241 |
1 |
|
|
T3 |
1 |
|
T26 |
2 |
|
T35 |
1 |
auto[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T26 |
1 |
|
T33 |
1 |
|
T36 |
2 |
auto[1] |
auto[1] |
auto[0] |
3780 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
4770 |
1 |
|
|
T9 |
3 |
|
T26 |
1 |
|
T15 |
14 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9319 |
1 |
|
|
T2 |
1 |
|
T3 |
2 |
|
T9 |
8 |
auto[1] |
11424 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T9 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9981 |
1 |
|
|
T2 |
1 |
|
T3 |
2 |
|
T9 |
7 |
auto[1] |
10762 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T9 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1231 |
1 |
|
|
T3 |
1 |
|
T26 |
1 |
|
T33 |
1 |
auto[0] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T3 |
1 |
|
T26 |
3 |
|
T35 |
1 |
auto[0] |
auto[1] |
auto[0] |
3668 |
1 |
|
|
T2 |
1 |
|
T9 |
5 |
|
T26 |
1 |
auto[0] |
auto[1] |
auto[1] |
3254 |
1 |
|
|
T9 |
3 |
|
T15 |
8 |
|
T37 |
9 |
auto[1] |
auto[0] |
auto[0] |
1228 |
1 |
|
|
T26 |
1 |
|
T35 |
1 |
|
T184 |
1 |
auto[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T33 |
1 |
|
T36 |
2 |
|
T27 |
10 |
auto[1] |
auto[1] |
auto[0] |
3854 |
1 |
|
|
T3 |
1 |
|
T9 |
2 |
|
T15 |
14 |
auto[1] |
auto[1] |
auto[1] |
4809 |
1 |
|
|
T4 |
1 |
|
T9 |
3 |
|
T26 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5158 |
1 |
|
|
T3 |
2 |
|
T26 |
5 |
|
T33 |
2 |
auto[1] |
15585 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9259 |
1 |
|
|
T3 |
2 |
|
T9 |
3 |
|
T26 |
2 |
auto[1] |
11484 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9872 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T9 |
6 |
auto[1] |
10871 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T9 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1243 |
1 |
|
|
T36 |
1 |
|
T183 |
1 |
|
T27 |
7 |
auto[0] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T3 |
1 |
|
T26 |
2 |
|
T27 |
10 |
auto[0] |
auto[1] |
auto[0] |
3551 |
1 |
|
|
T9 |
2 |
|
T15 |
14 |
|
T41 |
1 |
auto[0] |
auto[1] |
auto[1] |
3281 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T15 |
12 |
auto[1] |
auto[0] |
auto[0] |
1138 |
1 |
|
|
T3 |
1 |
|
T26 |
1 |
|
T33 |
2 |
auto[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T26 |
2 |
|
T35 |
1 |
|
T36 |
4 |
auto[1] |
auto[1] |
auto[0] |
3940 |
1 |
|
|
T2 |
1 |
|
T9 |
4 |
|
T26 |
2 |
auto[1] |
auto[1] |
auto[1] |
4813 |
1 |
|
|
T4 |
1 |
|
T9 |
6 |
|
T15 |
8 |